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From: Stylon Wang <stylon.wang@amd.com>
To: amd-gfx@lists.freedesktop.org
Cc: Stylon Wang <stylon.wang@amd.com>,
	Eryk.Brol@amd.com, Sunpeng.Li@amd.com, Harry.Wentland@amd.com,
	Qingqing.Zhuo@amd.com, Rodrigo.Siqueira@amd.com,
	Wenjing Liu <Wenjing.Liu@amd.com>,
	Anson.Jacob@amd.com, Aurabindo.Pillai@amd.com,
	George Shen <george.shen@amd.com>,
	Bhawanpreet.Lakha@amd.com, bindu.r@amd.com
Subject: [PATCH 07/20] drm/amd/display: Minor refactor of DP PHY test automation
Date: Fri, 14 May 2021 12:49:50 +0800	[thread overview]
Message-ID: <20210514045003.3069681-8-stylon.wang@amd.com> (raw)
In-Reply-To: <20210514045003.3069681-1-stylon.wang@amd.com>

From: George Shen <george.shen@amd.com>

[Why]
Improve readability and maintainability of code.

[How]
Refactor test pattern size calculation out of function
call parameter and store value in variable.

Signed-off-by: George Shen <george.shen@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
---
 .../gpu/drm/amd/display/dc/core/dc_link_dp.c    | 17 ++++++++++-------
 1 file changed, 10 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index ba4883fca616..69d511717828 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -2773,9 +2773,10 @@ static void dp_test_send_phy_test_pattern(struct dc_link *link)
 	union phy_test_pattern dpcd_test_pattern;
 	union lane_adjust dpcd_lane_adjustment[2];
 	unsigned char dpcd_post_cursor_2_adjustment = 0;
-	unsigned char test_80_bit_pattern[
+	unsigned char test_pattern_buffer[
 			(DP_TEST_80BIT_CUSTOM_PATTERN_79_72 -
 			DP_TEST_80BIT_CUSTOM_PATTERN_7_0)+1] = {0};
+	unsigned int test_pattern_size = 0;
 	enum dp_test_pattern test_pattern;
 	struct dc_link_training_settings link_settings;
 	union lane_adjust dpcd_lane_adjust;
@@ -2845,12 +2846,15 @@ static void dp_test_send_phy_test_pattern(struct dc_link *link)
 	break;
 	}
 
-	if (test_pattern == DP_TEST_PATTERN_80BIT_CUSTOM)
+	if (test_pattern == DP_TEST_PATTERN_80BIT_CUSTOM) {
+		test_pattern_size = (DP_TEST_80BIT_CUSTOM_PATTERN_79_72 -
+				DP_TEST_80BIT_CUSTOM_PATTERN_7_0) + 1;
 		core_link_read_dpcd(
 				link,
 				DP_TEST_80BIT_CUSTOM_PATTERN_7_0,
-				test_80_bit_pattern,
-				sizeof(test_80_bit_pattern));
+				test_pattern_buffer,
+				test_pattern_size);
+	}
 
 	/* prepare link training settings */
 	link_settings.link = link->cur_link_settings;
@@ -2888,9 +2892,8 @@ static void dp_test_send_phy_test_pattern(struct dc_link *link)
 		test_pattern,
 		DP_TEST_PATTERN_COLOR_SPACE_UNDEFINED,
 		&link_training_settings,
-		test_80_bit_pattern,
-		(DP_TEST_80BIT_CUSTOM_PATTERN_79_72 -
-		DP_TEST_80BIT_CUSTOM_PATTERN_7_0)+1);
+		test_pattern_buffer,
+		test_pattern_size);
 }
 
 static void dp_test_send_link_test_pattern(struct dc_link *link)
-- 
2.25.1

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  parent reply	other threads:[~2021-05-14  4:50 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-14  4:49 [PATCH 00/20] DC Patches May 17, 2021 Stylon Wang
2021-05-14  4:49 ` [PATCH 01/20] drm/amd/display: treat memory as a single-channel for asymmetric memory V3 Stylon Wang
2021-05-14  4:49 ` [PATCH 02/20] drm/amd/display: Add get_current_time interface to dmub_srv Stylon Wang
2021-05-14  4:49 ` [PATCH 03/20] drm/amd/display: Add documentation for power gate plane Stylon Wang
2021-05-14  4:49 ` [PATCH 04/20] drm/amd/display: Remove legacy comments Stylon Wang
2021-05-14  4:49 ` [PATCH 05/20] drm/amd/display: Add kernel-doc to some hubp functions Stylon Wang
2021-05-14  4:49 ` [PATCH 06/20] drm/amd/display: Document set RECOUT operation Stylon Wang
2021-05-14  4:49 ` Stylon Wang [this message]
2021-05-14  4:49 ` [PATCH 08/20] drm/amd/display: Disconnect non-DP with no EDID Stylon Wang
2021-05-14  4:49 ` [PATCH 09/20] drm/amd/display: determine dp link encoding format from link settings Stylon Wang
2021-05-14  4:49 ` [PATCH 10/20] drm/amd/display: decide link training settings based on channel coding Stylon Wang
2021-05-14  4:49 ` [PATCH 11/20] drm/amd/display: rename perform_link_training_int function Stylon Wang
2021-05-14  4:49 ` [PATCH 12/20] drm/amd/display: consider channel coding in configure lttpr mode Stylon Wang
2021-05-14  4:49 ` [PATCH 13/20] drm/amd/display: Refactor suspend/resume of Secure display Stylon Wang
2021-05-14  4:49 ` [PATCH 14/20] drm/amd/display: Add Overflow check to skip MALL Stylon Wang
2021-05-14  4:49 ` [PATCH 15/20] drm/amd/display: Correct DPCD revision for eDP v1.4 Stylon Wang
2021-05-14  4:49 ` [PATCH 16/20] drm/amd/display: Avoid get/put vblank when stream disabled Stylon Wang
2021-05-14  4:50 ` [PATCH 17/20] drm/amd/display: Use the correct max downscaling value for DCN3.x family Stylon Wang
2021-05-14  4:50 ` [PATCH 18/20] drm/amd/display: Refactor and add visual confirm for HW Flip Queue Stylon Wang
2021-05-14  4:50 ` [PATCH 19/20] drm/amd/display: [FW Promotion] Release 0.0.66 Stylon Wang
2021-05-14  4:50 ` [PATCH 20/20] drm/amd/display: 3.2.136 Stylon Wang
2021-05-14 19:32 ` [PATCH 00/20] DC Patches May 17, 2021 Wheeler, Daniel

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