From: Boyuan Zhang <Boyuan.Zhang@amd.com>
To: Alex Deucher <alexander.deucher@amd.com>, amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 09/44] drm/amdgpu/vcn: make powergating status per instance
Date: Tue, 4 Feb 2025 20:50:09 -0500 [thread overview]
Message-ID: <3aed8145-8d98-40b1-ad63-e4896a189b7c@amd.com> (raw)
In-Reply-To: <20250131165741.1798488-10-alexander.deucher@amd.com>
[-- Attachment #1: Type: text/plain, Size: 27768 bytes --]
On 2025-01-31 11:57, Alex Deucher wrote:
> Store it per instance so we can track it per instance.
>
> v2: index instances directly on vcn1.0 and 2.0 to make
> it clear that they only support a single instance (Lijo)
>
> Signed-off-by: Alex Deucher<alexander.deucher@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
<mailto:Boyuan.Zhang@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 2 +-
> drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 6 +--
> drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 11 ++--
> drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 43 +++++++++++-----
> drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 49 ++++++++++++------
> drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 60 ++++++++++++---------
> drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c | 63 ++++++++++++++---------
> drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c | 48 +++++++++++------
> drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c | 48 +++++++++++------
> drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c | 40 +++++++++-----
> drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 8 +--
> 11 files changed, 241 insertions(+), 137 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
> index f1685283c2f13..0bcf4d1c7175d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
> @@ -320,6 +320,7 @@ struct amdgpu_vcn_inst {
> uint32_t vcn_codec_disable_mask;
> atomic_t total_submission_cnt;
> struct mutex vcn_pg_lock;
> + enum amd_powergating_state cur_state;
> struct delayed_work idle_work;
> };
>
> @@ -330,7 +331,6 @@ struct amdgpu_vcn_ras {
> struct amdgpu_vcn {
> unsigned fw_version;
> unsigned num_enc_rings;
> - enum amd_powergating_state cur_state;
> bool indirect_sram;
>
> uint8_t num_vcn_inst;
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> index b90d41cd001c8..757cacf11a817 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> @@ -280,7 +280,7 @@ static int vcn_v1_0_hw_fini(struct amdgpu_ip_block *ip_block)
> cancel_delayed_work_sync(&adev->vcn.inst[0].idle_work);
>
> if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) ||
> - (adev->vcn.cur_state != AMD_PG_STATE_GATE &&
> + (adev->vcn.inst[0].cur_state != AMD_PG_STATE_GATE &&
> RREG32_SOC15(VCN, 0, mmUVD_STATUS))) {
> vcn_v1_0_set_powergating_state(ip_block, AMD_PG_STATE_GATE);
> }
> @@ -1813,7 +1813,7 @@ static int vcn_v1_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
> int ret;
> struct amdgpu_device *adev = ip_block->adev;
>
> - if (state == adev->vcn.cur_state)
> + if (state == adev->vcn.inst[0].cur_state)
> return 0;
>
> if (state == AMD_PG_STATE_GATE)
> @@ -1822,7 +1822,7 @@ static int vcn_v1_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
> ret = vcn_v1_0_start(adev);
>
> if (!ret)
> - adev->vcn.cur_state = state;
> + adev->vcn.inst[0].cur_state = state;
> return ret;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> index a51691c6d6110..e55c1f8f260e9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> @@ -316,8 +316,8 @@ static int vcn_v2_0_hw_fini(struct amdgpu_ip_block *ip_block)
> cancel_delayed_work_sync(&adev->vcn.inst[0].idle_work);
>
> if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) ||
> - (adev->vcn.cur_state != AMD_PG_STATE_GATE &&
> - RREG32_SOC15(VCN, 0, mmUVD_STATUS)))
> + (adev->vcn.inst[0].cur_state != AMD_PG_STATE_GATE &&
> + RREG32_SOC15(VCN, 0, mmUVD_STATUS)))
> vcn_v2_0_set_powergating_state(ip_block, AMD_PG_STATE_GATE);
>
> return 0;
> @@ -1810,11 +1810,11 @@ static int vcn_v2_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
> struct amdgpu_device *adev = ip_block->adev;
>
> if (amdgpu_sriov_vf(adev)) {
> - adev->vcn.cur_state = AMD_PG_STATE_UNGATE;
> + adev->vcn.inst[0].cur_state = AMD_PG_STATE_UNGATE;
> return 0;
> }
>
> - if (state == adev->vcn.cur_state)
> + if (state == adev->vcn.inst[0].cur_state)
> return 0;
>
> if (state == AMD_PG_STATE_GATE)
> @@ -1823,7 +1823,8 @@ static int vcn_v2_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
> ret = vcn_v2_0_start(adev);
>
> if (!ret)
> - adev->vcn.cur_state = state;
> + adev->vcn.inst[0].cur_state = state;
> +
> return ret;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
> index 6fb08ed093101..1d3780a2d8513 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
> @@ -95,8 +95,11 @@ static const struct amdgpu_hwip_reg_entry vcn_reg_list_2_5[] = {
> static void vcn_v2_5_set_dec_ring_funcs(struct amdgpu_device *adev);
> static void vcn_v2_5_set_enc_ring_funcs(struct amdgpu_device *adev);
> static void vcn_v2_5_set_irq_funcs(struct amdgpu_device *adev);
> +static int vcn_v2_5_set_powergating_state_inst(struct amdgpu_ip_block *ip_block,
> + enum amd_powergating_state state,
> + int i);
> static int vcn_v2_5_set_powergating_state(struct amdgpu_ip_block *ip_block,
> - enum amd_powergating_state state);
> + enum amd_powergating_state state);
> static int vcn_v2_5_pause_dpg_mode(struct amdgpu_device *adev,
> int inst_idx, struct dpg_pause_state *new_state);
> static int vcn_v2_5_sriov_start(struct amdgpu_device *adev);
> @@ -397,9 +400,9 @@ static int vcn_v2_5_hw_fini(struct amdgpu_ip_block *ip_block)
> cancel_delayed_work_sync(&adev->vcn.inst[i].idle_work);
>
> if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) ||
> - (adev->vcn.cur_state != AMD_PG_STATE_GATE &&
> + (adev->vcn.inst[i].cur_state != AMD_PG_STATE_GATE &&
> RREG32_SOC15(VCN, i, mmUVD_STATUS)))
> - vcn_v2_5_set_powergating_state(ip_block, AMD_PG_STATE_GATE);
> + vcn_v2_5_set_powergating_state_inst(ip_block, AMD_PG_STATE_GATE, i);
>
> if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__VCN))
> amdgpu_irq_put(adev, &adev->vcn.inst[i].ras_poison_irq, 0);
> @@ -1805,27 +1808,39 @@ static int vcn_v2_5_set_clockgating_state(struct amdgpu_ip_block *ip_block,
> return 0;
> }
>
> -static int vcn_v2_5_set_powergating_state(struct amdgpu_ip_block *ip_block,
> - enum amd_powergating_state state)
> +static int vcn_v2_5_set_powergating_state_inst(struct amdgpu_ip_block *ip_block,
> + enum amd_powergating_state state,
> + int i)
> {
> struct amdgpu_device *adev = ip_block->adev;
> - int ret = 0, i;
> + int ret;
>
> if (amdgpu_sriov_vf(adev))
> return 0;
>
> - if (state == adev->vcn.cur_state)
> + if (state == adev->vcn.inst[i].cur_state)
> return 0;
>
> - for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
> - if (state == AMD_PG_STATE_GATE)
> - ret |= vcn_v2_5_stop(adev, i);
> - else
> - ret |= vcn_v2_5_start(adev, i);
> - }
> + if (state == AMD_PG_STATE_GATE)
> + ret = vcn_v2_5_stop(adev, i);
> + else
> + ret = vcn_v2_5_start(adev, i);
>
> if (!ret)
> - adev->vcn.cur_state = state;
> + adev->vcn.inst[i].cur_state = state;
> +
> + return ret;
> +}
> +
> +static int vcn_v2_5_set_powergating_state(struct amdgpu_ip_block *ip_block,
> + enum amd_powergating_state state)
> +{
> + struct amdgpu_device *adev = ip_block->adev;
> + int ret = 0, i;
> +
> + for (i = 0; i < adev->vcn.num_vcn_inst; ++i)
> + ret |= vcn_v2_5_set_powergating_state_inst(ip_block,
> + state, i);
>
> return ret;
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
> index 70a1b85a4efae..13b9ed96cccda 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
> @@ -105,8 +105,11 @@ static int vcn_v3_0_start_sriov(struct amdgpu_device *adev);
> static void vcn_v3_0_set_dec_ring_funcs(struct amdgpu_device *adev);
> static void vcn_v3_0_set_enc_ring_funcs(struct amdgpu_device *adev);
> static void vcn_v3_0_set_irq_funcs(struct amdgpu_device *adev);
> +static int vcn_v3_0_set_powergating_state_inst(struct amdgpu_ip_block *ip_block,
> + enum amd_powergating_state state,
> + int i);
> static int vcn_v3_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
> - enum amd_powergating_state state);
> + enum amd_powergating_state state);
> static int vcn_v3_0_pause_dpg_mode(struct amdgpu_device *adev,
> int inst_idx, struct dpg_pause_state *new_state);
>
> @@ -430,9 +433,11 @@ static int vcn_v3_0_hw_fini(struct amdgpu_ip_block *ip_block)
>
> if (!amdgpu_sriov_vf(adev)) {
> if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) ||
> - (adev->vcn.cur_state != AMD_PG_STATE_GATE &&
> - RREG32_SOC15(VCN, i, mmUVD_STATUS))) {
> - vcn_v3_0_set_powergating_state(ip_block, AMD_PG_STATE_GATE);
> + (adev->vcn.inst[i].cur_state != AMD_PG_STATE_GATE &&
> + RREG32_SOC15(VCN, i, mmUVD_STATUS))) {
> + vcn_v3_0_set_powergating_state_inst(ip_block,
> + AMD_PG_STATE_GATE,
> + i);
> }
> }
> }
> @@ -2147,33 +2152,45 @@ static int vcn_v3_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
> return 0;
> }
>
> -static int vcn_v3_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
> - enum amd_powergating_state state)
> +static int vcn_v3_0_set_powergating_state_inst(struct amdgpu_ip_block *ip_block,
> + enum amd_powergating_state state,
> + int i)
> {
> struct amdgpu_device *adev = ip_block->adev;
> - int ret = 0, i;
> + int ret = 0;
>
> /* for SRIOV, guest should not control VCN Power-gating
> * MMSCH FW should control Power-gating and clock-gating
> * guest should avoid touching CGC and PG
> */
> if (amdgpu_sriov_vf(adev)) {
> - adev->vcn.cur_state = AMD_PG_STATE_UNGATE;
> + adev->vcn.inst[i].cur_state = AMD_PG_STATE_UNGATE;
> return 0;
> }
>
> - if (state == adev->vcn.cur_state)
> + if (state == adev->vcn.inst[i].cur_state)
> return 0;
>
> - for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
> - if (state == AMD_PG_STATE_GATE)
> - ret |= vcn_v3_0_stop(adev, i);
> - else
> - ret |= vcn_v3_0_start(adev, i);
> - }
> + if (state == AMD_PG_STATE_GATE)
> + ret = vcn_v3_0_stop(adev, i);
> + else
> + ret = vcn_v3_0_start(adev, i);
>
> if (!ret)
> - adev->vcn.cur_state = state;
> + adev->vcn.inst[i].cur_state = state;
> +
> + return ret;
> +}
> +
> +static int vcn_v3_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
> + enum amd_powergating_state state)
> +{
> + struct amdgpu_device *adev = ip_block->adev;
> + int ret = 0, i;
> +
> + for (i = 0; i < adev->vcn.num_vcn_inst; ++i)
> + ret |= vcn_v3_0_set_powergating_state_inst(ip_block,
> + state, i);
>
> return ret;
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> index 4a846c9a2b039..dbbeeffc90726 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> @@ -96,8 +96,11 @@ static int amdgpu_ih_clientid_vcns[] = {
> static int vcn_v4_0_start_sriov(struct amdgpu_device *adev);
> static void vcn_v4_0_set_unified_ring_funcs(struct amdgpu_device *adev);
> static void vcn_v4_0_set_irq_funcs(struct amdgpu_device *adev);
> +static int vcn_v4_0_set_powergating_state_inst(struct amdgpu_ip_block *ip_block,
> + enum amd_powergating_state state,
> + int i);
> static int vcn_v4_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
> - enum amd_powergating_state state);
> + enum amd_powergating_state state);
> static int vcn_v4_0_pause_dpg_mode(struct amdgpu_device *adev,
> int inst_idx, struct dpg_pause_state *new_state);
> static void vcn_v4_0_unified_ring_set_wptr(struct amdgpu_ring *ring);
> @@ -367,9 +370,9 @@ static int vcn_v4_0_hw_fini(struct amdgpu_ip_block *ip_block)
>
> if (!amdgpu_sriov_vf(adev)) {
> if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) ||
> - (adev->vcn.cur_state != AMD_PG_STATE_GATE &&
> + (adev->vcn.inst[i].cur_state != AMD_PG_STATE_GATE &&
> RREG32_SOC15(VCN, i, regUVD_STATUS))) {
> - vcn_v4_0_set_powergating_state(ip_block, AMD_PG_STATE_GATE);
> + vcn_v4_0_set_powergating_state_inst(ip_block, AMD_PG_STATE_GATE, i);
> }
> }
> if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__VCN))
> @@ -2032,41 +2035,52 @@ static int vcn_v4_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
> return 0;
> }
>
> -/**
> - * vcn_v4_0_set_powergating_state - set VCN block powergating state
> - *
> - * @ip_block: amdgpu_ip_block pointer
> - * @state: power gating state
> - *
> - * Set VCN block powergating state
> - */
> -static int vcn_v4_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
> - enum amd_powergating_state state)
> +static int vcn_v4_0_set_powergating_state_inst(struct amdgpu_ip_block *ip_block,
> + enum amd_powergating_state state,
> + int i)
> {
> struct amdgpu_device *adev = ip_block->adev;
> - int ret = 0, i;
> + int ret = 0;
>
> /* for SRIOV, guest should not control VCN Power-gating
> * MMSCH FW should control Power-gating and clock-gating
> * guest should avoid touching CGC and PG
> */
> if (amdgpu_sriov_vf(adev)) {
> - adev->vcn.cur_state = AMD_PG_STATE_UNGATE;
> + adev->vcn.inst[i].cur_state = AMD_PG_STATE_UNGATE;
> return 0;
> }
>
> - if (state == adev->vcn.cur_state)
> + if (state == adev->vcn.inst[i].cur_state)
> return 0;
>
> - for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
> - if (state == AMD_PG_STATE_GATE)
> - ret |= vcn_v4_0_stop(adev, i);
> - else
> - ret |= vcn_v4_0_start(adev, i);
> - }
> + if (state == AMD_PG_STATE_GATE)
> + ret = vcn_v4_0_stop(adev, i);
> + else
> + ret = vcn_v4_0_start(adev, i);
>
> if (!ret)
> - adev->vcn.cur_state = state;
> + adev->vcn.inst[i].cur_state = state;
> +
> + return ret;
> +}
> +
> +/**
> + * vcn_v4_0_set_powergating_state - set VCN block powergating state
> + *
> + * @ip_block: amdgpu_ip_block pointer
> + * @state: power gating state
> + *
> + * Set VCN block powergating state
> + */
> +static int vcn_v4_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
> + enum amd_powergating_state state)
> +{
> + struct amdgpu_device *adev = ip_block->adev;
> + int ret = 0, i;
> +
> + for (i = 0; i < adev->vcn.num_vcn_inst; ++i)
> + ret |= vcn_v4_0_set_powergating_state_inst(ip_block, state, i);
>
> return ret;
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
> index 8343cee899c71..8396ef6831b69 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
> @@ -87,8 +87,11 @@ static const struct amdgpu_hwip_reg_entry vcn_reg_list_4_0_3[] = {
> static int vcn_v4_0_3_start_sriov(struct amdgpu_device *adev);
> static void vcn_v4_0_3_set_unified_ring_funcs(struct amdgpu_device *adev);
> static void vcn_v4_0_3_set_irq_funcs(struct amdgpu_device *adev);
> +static int vcn_v4_0_3_set_powergating_state_inst(struct amdgpu_ip_block *ip_block,
> + enum amd_powergating_state state,
> + int i);
> static int vcn_v4_0_3_set_powergating_state(struct amdgpu_ip_block *ip_block,
> - enum amd_powergating_state state);
> + enum amd_powergating_state state);
> static int vcn_v4_0_3_pause_dpg_mode(struct amdgpu_device *adev,
> int inst_idx, struct dpg_pause_state *new_state);
> static void vcn_v4_0_3_unified_ring_set_wptr(struct amdgpu_ring *ring);
> @@ -351,11 +354,12 @@ static int vcn_v4_0_3_hw_fini(struct amdgpu_ip_block *ip_block)
> struct amdgpu_device *adev = ip_block->adev;
> int i;
>
> - for (i = 0; i < adev->vcn.num_vcn_inst; ++i)
> + for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
> cancel_delayed_work_sync(&adev->vcn.inst[i].idle_work);
>
> - if (adev->vcn.cur_state != AMD_PG_STATE_GATE)
> - vcn_v4_0_3_set_powergating_state(ip_block, AMD_PG_STATE_GATE);
> + if (adev->vcn.inst[i].cur_state != AMD_PG_STATE_GATE)
> + vcn_v4_0_3_set_powergating_state_inst(ip_block, AMD_PG_STATE_GATE, i);
> + }
>
> return 0;
> }
> @@ -1646,41 +1650,52 @@ static int vcn_v4_0_3_set_clockgating_state(struct amdgpu_ip_block *ip_block,
> return 0;
> }
>
> -/**
> - * vcn_v4_0_3_set_powergating_state - set VCN block powergating state
> - *
> - * @ip_block: amdgpu_ip_block pointer
> - * @state: power gating state
> - *
> - * Set VCN block powergating state
> - */
> -static int vcn_v4_0_3_set_powergating_state(struct amdgpu_ip_block *ip_block,
> - enum amd_powergating_state state)
> +static int vcn_v4_0_3_set_powergating_state_inst(struct amdgpu_ip_block *ip_block,
> + enum amd_powergating_state state,
> + int i)
> {
> struct amdgpu_device *adev = ip_block->adev;
> - int ret = 0, i;
> + int ret = 0;
>
> /* for SRIOV, guest should not control VCN Power-gating
> * MMSCH FW should control Power-gating and clock-gating
> * guest should avoid touching CGC and PG
> */
> if (amdgpu_sriov_vf(adev)) {
> - adev->vcn.cur_state = AMD_PG_STATE_UNGATE;
> + adev->vcn.inst[i].cur_state = AMD_PG_STATE_UNGATE;
> return 0;
> }
>
> - if (state == adev->vcn.cur_state)
> + if (state == adev->vcn.inst[i].cur_state)
> return 0;
>
> - for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
> - if (state == AMD_PG_STATE_GATE)
> - ret |= vcn_v4_0_3_stop(adev, i);
> - else
> - ret |= vcn_v4_0_3_start(adev, i);
> - }
> + if (state == AMD_PG_STATE_GATE)
> + ret = vcn_v4_0_3_stop(adev, i);
> + else
> + ret = vcn_v4_0_3_start(adev, i);
>
> if (!ret)
> - adev->vcn.cur_state = state;
> + adev->vcn.inst[i].cur_state = state;
> +
> + return ret;
> +}
> +
> +/**
> + * vcn_v4_0_3_set_powergating_state - set VCN block powergating state
> + *
> + * @ip_block: amdgpu_ip_block pointer
> + * @state: power gating state
> + *
> + * Set VCN block powergating state
> + */
> +static int vcn_v4_0_3_set_powergating_state(struct amdgpu_ip_block *ip_block,
> + enum amd_powergating_state state)
> +{
> + struct amdgpu_device *adev = ip_block->adev;
> + int ret = 0, i;
> +
> + for (i = 0; i < adev->vcn.num_vcn_inst; ++i)
> + vcn_v4_0_3_set_powergating_state_inst(ip_block, state, i);
>
> return ret;
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
> index e784f1457ee0a..f6b347fcdb7ed 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
> @@ -95,8 +95,11 @@ static int amdgpu_ih_clientid_vcns[] = {
>
> static void vcn_v4_0_5_set_unified_ring_funcs(struct amdgpu_device *adev);
> static void vcn_v4_0_5_set_irq_funcs(struct amdgpu_device *adev);
> +static int vcn_v4_0_5_set_powergating_state_inst(struct amdgpu_ip_block *ip_block,
> + enum amd_powergating_state state,
> + int i);
> static int vcn_v4_0_5_set_powergating_state(struct amdgpu_ip_block *ip_block,
> - enum amd_powergating_state state);
> + enum amd_powergating_state state);
> static int vcn_v4_0_5_pause_dpg_mode(struct amdgpu_device *adev,
> int inst_idx, struct dpg_pause_state *new_state);
> static void vcn_v4_0_5_unified_ring_set_wptr(struct amdgpu_ring *ring);
> @@ -308,9 +311,9 @@ static int vcn_v4_0_5_hw_fini(struct amdgpu_ip_block *ip_block)
>
> if (!amdgpu_sriov_vf(adev)) {
> if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) ||
> - (adev->vcn.cur_state != AMD_PG_STATE_GATE &&
> - RREG32_SOC15(VCN, i, regUVD_STATUS))) {
> - vcn_v4_0_5_set_powergating_state(ip_block, AMD_PG_STATE_GATE);
> + (adev->vcn.inst[i].cur_state != AMD_PG_STATE_GATE &&
> + RREG32_SOC15(VCN, i, regUVD_STATUS))) {
> + vcn_v4_0_5_set_powergating_state_inst(ip_block, AMD_PG_STATE_GATE, i);
> }
> }
> }
> @@ -1517,6 +1520,27 @@ static int vcn_v4_0_5_set_clockgating_state(struct amdgpu_ip_block *ip_block,
> return 0;
> }
>
> +static int vcn_v4_0_5_set_powergating_state_inst(struct amdgpu_ip_block *ip_block,
> + enum amd_powergating_state state,
> + int i)
> +{
> + struct amdgpu_device *adev = ip_block->adev;
> + int ret = 0;
> +
> + if (state == adev->vcn.inst[i].cur_state)
> + return 0;
> +
> + if (state == AMD_PG_STATE_GATE)
> + ret = vcn_v4_0_5_stop(adev, i);
> + else
> + ret = vcn_v4_0_5_start(adev, i);
> +
> + if (!ret)
> + adev->vcn.inst[i].cur_state = state;
> +
> + return ret;
> +}
> +
> /**
> * vcn_v4_0_5_set_powergating_state - set VCN block powergating state
> *
> @@ -1526,23 +1550,13 @@ static int vcn_v4_0_5_set_clockgating_state(struct amdgpu_ip_block *ip_block,
> * Set VCN block powergating state
> */
> static int vcn_v4_0_5_set_powergating_state(struct amdgpu_ip_block *ip_block,
> - enum amd_powergating_state state)
> + enum amd_powergating_state state)
> {
> struct amdgpu_device *adev = ip_block->adev;
> int ret = 0, i;
>
> - if (state == adev->vcn.cur_state)
> - return 0;
> -
> - for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
> - if (state == AMD_PG_STATE_GATE)
> - ret |= vcn_v4_0_5_stop(adev, i);
> - else
> - ret |= vcn_v4_0_5_start(adev, i);
> - }
> -
> - if (!ret)
> - adev->vcn.cur_state = state;
> + for (i = 0; i < adev->vcn.num_vcn_inst; ++i)
> + vcn_v4_0_5_set_powergating_state_inst(ip_block, state, i);
>
> return ret;
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
> index 03c7252e28ba9..c5d59edf3a482 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
> @@ -78,8 +78,11 @@ static int amdgpu_ih_clientid_vcns[] = {
>
> static void vcn_v5_0_0_set_unified_ring_funcs(struct amdgpu_device *adev);
> static void vcn_v5_0_0_set_irq_funcs(struct amdgpu_device *adev);
> +static int vcn_v5_0_0_set_powergating_state_inst(struct amdgpu_ip_block *ip_block,
> + enum amd_powergating_state state,
> + int i);
> static int vcn_v5_0_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
> - enum amd_powergating_state state);
> + enum amd_powergating_state state);
> static int vcn_v5_0_0_pause_dpg_mode(struct amdgpu_device *adev,
> int inst_idx, struct dpg_pause_state *new_state);
> static void vcn_v5_0_0_unified_ring_set_wptr(struct amdgpu_ring *ring);
> @@ -288,9 +291,9 @@ static int vcn_v5_0_0_hw_fini(struct amdgpu_ip_block *ip_block)
>
> if (!amdgpu_sriov_vf(adev)) {
> if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) ||
> - (adev->vcn.cur_state != AMD_PG_STATE_GATE &&
> - RREG32_SOC15(VCN, i, regUVD_STATUS))) {
> - vcn_v5_0_0_set_powergating_state(ip_block, AMD_PG_STATE_GATE);
> + (adev->vcn.inst[i].cur_state != AMD_PG_STATE_GATE &&
> + RREG32_SOC15(VCN, i, regUVD_STATUS))) {
> + vcn_v5_0_0_set_powergating_state_inst(ip_block, AMD_PG_STATE_GATE, i);
> }
> }
> }
> @@ -1260,6 +1263,27 @@ static int vcn_v5_0_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
> return 0;
> }
>
> +static int vcn_v5_0_0_set_powergating_state_inst(struct amdgpu_ip_block *ip_block,
> + enum amd_powergating_state state,
> + int i)
> +{
> + struct amdgpu_device *adev = ip_block->adev;
> + int ret = 0;
> +
> + if (state == adev->vcn.inst[i].cur_state)
> + return 0;
> +
> + if (state == AMD_PG_STATE_GATE)
> + ret = vcn_v5_0_0_stop(adev, i);
> + else
> + ret = vcn_v5_0_0_start(adev, i);
> +
> + if (!ret)
> + adev->vcn.inst[i].cur_state = state;
> +
> + return ret;
> +}
> +
> /**
> * vcn_v5_0_0_set_powergating_state - set VCN block powergating state
> *
> @@ -1269,23 +1293,13 @@ static int vcn_v5_0_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
> * Set VCN block powergating state
> */
> static int vcn_v5_0_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
> - enum amd_powergating_state state)
> + enum amd_powergating_state state)
> {
> struct amdgpu_device *adev = ip_block->adev;
> int ret = 0, i;
>
> - if (state == adev->vcn.cur_state)
> - return 0;
> -
> - for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
> - if (state == AMD_PG_STATE_GATE)
> - ret |= vcn_v5_0_0_stop(adev, i);
> - else
> - ret |= vcn_v5_0_0_start(adev, i);
> - }
> -
> - if (!ret)
> - adev->vcn.cur_state = state;
> + for (i = 0; i < adev->vcn.num_vcn_inst; ++i)
> + vcn_v5_0_0_set_powergating_state_inst(ip_block, state, i);
>
> return ret;
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
> index 5950ec4c7f6db..51a2d70a65c9e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
> @@ -40,8 +40,11 @@
>
> static void vcn_v5_0_1_set_unified_ring_funcs(struct amdgpu_device *adev);
> static void vcn_v5_0_1_set_irq_funcs(struct amdgpu_device *adev);
> +static int vcn_v5_0_1_set_powergating_state_inst(struct amdgpu_ip_block *ip_block,
> + enum amd_powergating_state state,
> + int i);
> static int vcn_v5_0_1_set_powergating_state(struct amdgpu_ip_block *ip_block,
> - enum amd_powergating_state state);
> + enum amd_powergating_state state);
> static void vcn_v5_0_1_unified_ring_set_wptr(struct amdgpu_ring *ring);
>
> /**
> @@ -994,6 +997,27 @@ static int vcn_v5_0_1_set_clockgating_state(struct amdgpu_ip_block *ip_block,
> return 0;
> }
>
> +static int vcn_v5_0_1_set_powergating_state_inst(struct amdgpu_ip_block *ip_block,
> + enum amd_powergating_state state,
> + int i)
> +{
> + struct amdgpu_device *adev = ip_block->adev;
> + int ret = 0;
> +
> + if (state == adev->vcn.inst[i].cur_state)
> + return 0;
> +
> + if (state == AMD_PG_STATE_GATE)
> + ret = vcn_v5_0_1_stop(adev, i);
> + else
> + ret = vcn_v5_0_1_start(adev, i);
> +
> + if (!ret)
> + adev->vcn.inst[i].cur_state = state;
> +
> + return ret;
> +}
> +
> /**
> * vcn_v5_0_1_set_powergating_state - set VCN block powergating state
> *
> @@ -1008,18 +1032,8 @@ static int vcn_v5_0_1_set_powergating_state(struct amdgpu_ip_block *ip_block,
> struct amdgpu_device *adev = ip_block->adev;
> int ret = 0, i;
>
> - if (state == adev->vcn.cur_state)
> - return 0;
> -
> - for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
> - if (state == AMD_PG_STATE_GATE)
> - ret = vcn_v5_0_1_stop(adev, i);
> - else
> - ret = vcn_v5_0_1_start(adev, i);
> - }
> -
> - if (!ret)
> - adev->vcn.cur_state = state;
> + for (i = 0; i < adev->vcn.num_vcn_inst; ++i)
> + vcn_v5_0_1_set_powergating_state_inst(ip_block, state, i);
>
> return ret;
> }
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> index 51c2a7f4aba28..e8cf4aa6c43dd 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> @@ -2037,15 +2037,15 @@ static int smu_hw_fini(struct amdgpu_ip_block *ip_block)
> if (amdgpu_sriov_vf(adev) && !amdgpu_sriov_is_pp_one_vf(adev))
> return 0;
>
> - for (i = 0; i < adev->vcn.num_vcn_inst; i++)
> + for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
> smu_dpm_set_vcn_enable(smu, false, i);
> + adev->vcn.inst[i].cur_state = AMD_PG_STATE_GATE;
> + }
> smu_dpm_set_jpeg_enable(smu, false);
> + adev->jpeg.cur_state = AMD_PG_STATE_GATE;
> smu_dpm_set_vpe_enable(smu, false);
> smu_dpm_set_umsch_mm_enable(smu, false);
>
> - adev->vcn.cur_state = AMD_PG_STATE_GATE;
> - adev->jpeg.cur_state = AMD_PG_STATE_GATE;
> -
> if (!smu->pm_enabled)
> return 0;
>
[-- Attachment #2: Type: text/html, Size: 27574 bytes --]
next prev parent reply other threads:[~2025-02-05 1:54 UTC|newest]
Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-31 16:56 [PATCH V3 00/44] VCN instance rework Alex Deucher
2025-01-31 16:56 ` [PATCH 01/44] drm/amdgpu/vcn2.5: split code along instances Alex Deucher
2025-02-04 15:35 ` Boyuan Zhang
2025-01-31 16:56 ` [PATCH 02/44] drm/amdgpu/vcn3.0: " Alex Deucher
2025-02-04 15:40 ` Boyuan Zhang
2025-01-31 16:56 ` [PATCH 03/44] drm/amdgpu/vcn4.0: " Alex Deucher
2025-02-04 15:50 ` Boyuan Zhang
2025-01-31 16:57 ` [PATCH 04/44] drm/amdgpu/vcn4.0.3: " Alex Deucher
2025-02-04 15:50 ` Boyuan Zhang
2025-01-31 16:57 ` [PATCH 05/44] drm/amdgpu/vcn4.0.5: " Alex Deucher
2025-02-04 15:51 ` Boyuan Zhang
2025-01-31 16:57 ` [PATCH 06/44] drm/amdgpu/vcn5.0.0: " Alex Deucher
2025-02-04 15:56 ` Boyuan Zhang
2025-01-31 16:57 ` [PATCH 07/44] drm/amdgpu/vcn5.0.1: " Alex Deucher
2025-02-04 15:57 ` Boyuan Zhang
2025-01-31 16:57 ` [PATCH 08/44] drm/amdgpu/vcn: switch work handler to be per instance Alex Deucher
2025-02-04 20:59 ` Boyuan Zhang
2025-01-31 16:57 ` [PATCH 09/44] drm/amdgpu/vcn: make powergating status " Alex Deucher
2025-02-05 1:50 ` Boyuan Zhang [this message]
2025-01-31 16:57 ` [PATCH 10/44] drm/amdgpu/vcn: move more instanced data to vcn_instance Alex Deucher
2025-02-05 3:06 ` Boyuan Zhang
2025-02-05 20:09 ` Alex Deucher
2025-02-06 13:39 ` Boyuan Zhang
2025-01-31 16:57 ` [PATCH 11/44] drm/amdgpu/vcn: switch vcn helpers to be instance based Alex Deucher
2025-02-05 13:23 ` Boyuan Zhang
2025-01-31 16:57 ` [PATCH 12/44] drm/amdgpu/vcn3.0: convert internal functions to use vcn_inst Alex Deucher
2025-02-05 15:00 ` Boyuan Zhang
2025-01-31 16:57 ` [PATCH 13/44] drm/amdgpu/vcn1.0: " Alex Deucher
2025-02-05 15:01 ` Boyuan Zhang
2025-01-31 16:57 ` [PATCH 14/44] drm/amdgpu/vcn2.0: " Alex Deucher
2025-02-05 15:01 ` Boyuan Zhang
2025-01-31 16:57 ` [PATCH 15/44] drm/amdgpu/vcn2.5: " Alex Deucher
2025-02-05 15:02 ` Boyuan Zhang
2025-01-31 16:57 ` [PATCH 16/44] drm/amdgpu/vcn4.0: " Alex Deucher
2025-02-05 15:03 ` Boyuan Zhang
2025-01-31 16:57 ` [PATCH 17/44] drm/amdgpu/vcn4.0.3: " Alex Deucher
2025-02-05 15:03 ` Boyuan Zhang
2025-01-31 16:57 ` [PATCH 18/44] drm/amdgpu/vcn4.0.5: " Alex Deucher
2025-02-05 15:04 ` Boyuan Zhang
2025-01-31 16:57 ` [PATCH 19/44] drm/amdgpu/vcn5.0.0: " Alex Deucher
2025-02-05 15:05 ` Boyuan Zhang
2025-01-31 16:57 ` [PATCH 20/44] drm/amdgpu/vcn5.0.1: " Alex Deucher
2025-02-05 15:05 ` Boyuan Zhang
2025-01-31 16:57 ` [PATCH 21/44] drm/amdgpu/vcn: adjust pause_dpg_mode function signature Alex Deucher
2025-02-06 13:40 ` Boyuan Zhang
2025-01-31 16:57 ` [PATCH 22/44] drm/amdgpu/vcn: add new per instance callback for powergating Alex Deucher
2025-02-06 13:40 ` Boyuan Zhang
2025-01-31 16:57 ` [PATCH 23/44] drm/amdgpu/vcn1.0: add set_pg_state callback Alex Deucher
2025-02-06 13:46 ` Boyuan Zhang
2025-01-31 16:57 ` [PATCH 24/44] drm/amdgpu/vcn2.0: " Alex Deucher
2025-01-31 16:57 ` [PATCH 25/44] drm/amdgpu/vcn2.5: " Alex Deucher
2025-01-31 16:57 ` [PATCH 26/44] drm/amdgpu/vcn3.0: " Alex Deucher
2025-01-31 16:57 ` [PATCH 27/44] drm/amdgpu/vcn4.0: " Alex Deucher
2025-01-31 16:57 ` [PATCH 28/44] drm/amdgpu/vcn4.0.3: " Alex Deucher
2025-01-31 16:57 ` [PATCH 29/44] drm/amdgpu/vcn4.0.5: " Alex Deucher
2025-01-31 16:57 ` [PATCH 30/44] drm/amdgpu/vcn5.0.0: " Alex Deucher
2025-01-31 16:57 ` [PATCH 31/44] drm/amdgpu/vcn5.0.1: " Alex Deucher
2025-01-31 16:57 ` [PATCH 32/44] drm/amdgpu/vcn: use per instance callbacks for idle work handler Alex Deucher
2025-02-06 13:53 ` Boyuan Zhang
2025-01-31 16:57 ` [PATCH 33/44] drm/amdgpu/vcn: add a generic helper for set_power_gating_state Alex Deucher
2025-02-06 13:54 ` Boyuan Zhang
2025-01-31 16:57 ` [PATCH 34/44] drm/amdgpu/vcn1.0: use generic set_power_gating_state helper Alex Deucher
2025-01-31 16:57 ` [PATCH 35/44] drm/amdgpu/vcn2.0: " Alex Deucher
2025-01-31 16:57 ` [PATCH 36/44] drm/amdgpu/vcn2.5: " Alex Deucher
2025-01-31 16:57 ` [PATCH 37/44] drm/amdgpu/vcn3.0: " Alex Deucher
2025-01-31 16:57 ` [PATCH 38/44] drm/amdgpu/vcn4.0: " Alex Deucher
2025-01-31 16:57 ` [PATCH 39/44] drm/amdgpu/vcn4.0.3: " Alex Deucher
2025-01-31 16:57 ` [PATCH 40/44] drm/amdgpu/vcn4.0.5: " Alex Deucher
2025-01-31 16:57 ` [PATCH 41/44] drm/amdgpu/vcn5.0.0: " Alex Deucher
2025-01-31 16:57 ` [PATCH 42/44] drm/amdgpu/vcn5.0.1: " Alex Deucher
2025-01-31 16:57 ` [PATCH 43/44] drm/amdgpu/vcn: optimize firmware storage Alex Deucher
2025-02-06 14:48 ` Boyuan Zhang
2025-01-31 16:57 ` [PATCH 44/44] drm/amdgpu/vcn: use dev_info() for firmware information Alex Deucher
2025-02-06 14:49 ` Boyuan Zhang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=3aed8145-8d98-40b1-ad63-e4896a189b7c@amd.com \
--to=boyuan.zhang@amd.com \
--cc=alexander.deucher@amd.com \
--cc=amd-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox