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From: "Kazlauskas, Nicholas" <Nicholas.Kazlauskas-5C7GfCeVMHo@public.gmane.org>
To: "Li, Sun peng (Leo)" <Sunpeng.Li-5C7GfCeVMHo@public.gmane.org>,
	"amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org"
	<amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>
Cc: "mario.kleiner.de-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org"
	<mario.kleiner.de-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	"Wentland, Harry" <Harry.Wentland-5C7GfCeVMHo@public.gmane.org>
Subject: Re: [PATCH 2/2 v2] drm/amd/display: Disable VUpdate interrupt for DCN hardware
Date: Tue, 5 Nov 2019 16:16:31 +0000	[thread overview]
Message-ID: <47f9dd1b-66c1-a521-d6c8-b9422616cf2e@amd.com> (raw)
In-Reply-To: <20191105155802.1302-1-sunpeng.li-5C7GfCeVMHo@public.gmane.org>

On 2019-11-05 10:58 a.m., sunpeng.li@amd.com wrote:
> From: Leo Li <sunpeng.li@amd.com>
> 
> [Why]
> 
> On DCN hardware, the crtc_high_irq handler makes vupdate_high_irq
> handler redundant.
> 
> All the vupdate handler does is handle vblank events, and update vrr
> for DCE hw (excluding VEGA, more on that later). As far as usermode is
> concerned. vstartup happens close enough to vupdate on DCN that it can
> be considered the "same". Handling vblank and updating vrr at vstartup
> effectively replaces vupdate on DCN.
> 
> Vega is a bit special. Like DCN, the VRR registers on Vega are
> double-buffered, and swapped at vupdate. But Unlike DCN, it lacks a
> vstartup interrupt. This means we can't quite remove the vupdate handler
> for it, since delayerd user events due to vrr are sent off there.
> 
> [How]
> 
> Remove registration of VUpdate interrupt handler for DCN. Disable
> vupdate interrupt if asic family DCN, enable otherwise.
> 
> Signed-off-by: Leo Li <sunpeng.li@amd.com>
> ---
> 
> v2: Don't exclude vega when enabling vupdate interrupts
> 
>   .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 34 +++----------------
>   1 file changed, 4 insertions(+), 30 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 256a23a0ec28..3664af3b41a1 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -2241,34 +2241,6 @@ static int dcn10_register_irq_handlers(struct amdgpu_device *adev)
>   				dm_dcn_crtc_high_irq, c_irq_params);
>   	}
> 
> -	/* Use VUPDATE_NO_LOCK interrupt on DCN, which seems to correspond to
> -	 * the regular VUPDATE interrupt on DCE. We want DC_IRQ_SOURCE_VUPDATEx
> -	 * to trigger at end of each vblank, regardless of state of the lock,
> -	 * matching DCE behaviour.
> -	 */
> -	for (i = DCN_1_0__SRCID__OTG0_IHC_V_UPDATE_NO_LOCK_INTERRUPT;
> -	     i <= DCN_1_0__SRCID__OTG0_IHC_V_UPDATE_NO_LOCK_INTERRUPT + adev->mode_info.num_crtc - 1;
> -	     i++) {
> -		r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_DCE, i, &adev->vupdate_irq);
> -
> -		if (r) {
> -			DRM_ERROR("Failed to add vupdate irq id!\n");
> -			return r;
> -		}
> -
> -		int_params.int_context = INTERRUPT_HIGH_IRQ_CONTEXT;
> -		int_params.irq_source =
> -			dc_interrupt_to_irq_source(dc, i, 0);
> -
> -		c_irq_params = &adev->dm.vupdate_params[int_params.irq_source - DC_IRQ_SOURCE_VUPDATE1];
> -
> -		c_irq_params->adev = adev;
> -		c_irq_params->irq_src = int_params.irq_source;
> -
> -		amdgpu_dm_irq_register_interrupt(adev, &int_params,
> -				dm_vupdate_high_irq, c_irq_params);
> -	}
> -
>   	/* Use GRPH_PFLIP interrupt */
>   	for (i = DCN_1_0__SRCID__HUBP0_FLIP_INTERRUPT;
>   			i <= DCN_1_0__SRCID__HUBP0_FLIP_INTERRUPT + adev->mode_info.num_crtc - 1;
> @@ -4266,7 +4238,7 @@ static inline int dm_set_vblank(struct drm_crtc *crtc, bool enable)
>   	struct dm_crtc_state *acrtc_state = to_dm_crtc_state(crtc->state);
>   	int rc = 0;
> 
> -	if (enable) {
> +	if (enable && adev->family <= AMDGPU_FAMILY_AI) {
>   		/* vblank irq on -> Only need vupdate irq in vrr mode */
>   		if (amdgpu_dm_vrr_active(acrtc_state))
>   			rc = dm_set_vupdate_irq(crtc, true);
> @@ -6243,6 +6215,7 @@ static void pre_update_freesync_state_on_stream(
>   static void amdgpu_dm_handle_vrr_transition(struct dm_crtc_state *old_state,
>   					    struct dm_crtc_state *new_state)
>   {
> +	struct amdgpu_device *adev = old_state->base.crtc->dev->dev_private;
>   	bool old_vrr_active = amdgpu_dm_vrr_active(old_state);
>   	bool new_vrr_active = amdgpu_dm_vrr_active(new_state);
> 
> @@ -6255,7 +6228,8 @@ static void amdgpu_dm_handle_vrr_transition(struct dm_crtc_state *old_state,
>   		 * We also need vupdate irq for the actual core vblank handling
>   		 * at end of vblank.
>   		 */
> -		dm_set_vupdate_irq(new_state->base.crtc, true);
> +		if (adev->family <= AMDGPU_FAMILY_AI)
> +			dm_set_vupdate_irq(new_state->base.crtc, true);

Can we move the if into dm_set_vupdate_irq directly? We're setting it to 
false even when we don't have it with this patch.

Nicholas Kazlauskas

>   		drm_crtc_vblank_get(new_state->base.crtc);
>   		DRM_DEBUG_DRIVER("%s: crtc=%u VRR off->on: Get vblank ref\n",
>   				 __func__, new_state->base.crtc->base.id);
> --
> 2.23.0
> 

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

WARNING: multiple messages have this Message-ID (diff)
From: "Kazlauskas, Nicholas" <Nicholas.Kazlauskas@amd.com>
To: "Li, Sun peng (Leo)" <Sunpeng.Li@amd.com>,
	"amd-gfx@lists.freedesktop.org" <amd-gfx@lists.freedesktop.org>
Cc: "mario.kleiner.de@gmail.com" <mario.kleiner.de@gmail.com>,
	"Wentland, Harry" <Harry.Wentland@amd.com>
Subject: Re: [PATCH 2/2 v2] drm/amd/display: Disable VUpdate interrupt for DCN hardware
Date: Tue, 5 Nov 2019 16:16:31 +0000	[thread overview]
Message-ID: <47f9dd1b-66c1-a521-d6c8-b9422616cf2e@amd.com> (raw)
Message-ID: <20191105161631.1QL35f3MEBZzIIfq4k2G2rx5Shd_jclXiE6InDdK-bE@z> (raw)
In-Reply-To: <20191105155802.1302-1-sunpeng.li@amd.com>

On 2019-11-05 10:58 a.m., sunpeng.li@amd.com wrote:
> From: Leo Li <sunpeng.li@amd.com>
> 
> [Why]
> 
> On DCN hardware, the crtc_high_irq handler makes vupdate_high_irq
> handler redundant.
> 
> All the vupdate handler does is handle vblank events, and update vrr
> for DCE hw (excluding VEGA, more on that later). As far as usermode is
> concerned. vstartup happens close enough to vupdate on DCN that it can
> be considered the "same". Handling vblank and updating vrr at vstartup
> effectively replaces vupdate on DCN.
> 
> Vega is a bit special. Like DCN, the VRR registers on Vega are
> double-buffered, and swapped at vupdate. But Unlike DCN, it lacks a
> vstartup interrupt. This means we can't quite remove the vupdate handler
> for it, since delayerd user events due to vrr are sent off there.
> 
> [How]
> 
> Remove registration of VUpdate interrupt handler for DCN. Disable
> vupdate interrupt if asic family DCN, enable otherwise.
> 
> Signed-off-by: Leo Li <sunpeng.li@amd.com>
> ---
> 
> v2: Don't exclude vega when enabling vupdate interrupts
> 
>   .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 34 +++----------------
>   1 file changed, 4 insertions(+), 30 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 256a23a0ec28..3664af3b41a1 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -2241,34 +2241,6 @@ static int dcn10_register_irq_handlers(struct amdgpu_device *adev)
>   				dm_dcn_crtc_high_irq, c_irq_params);
>   	}
> 
> -	/* Use VUPDATE_NO_LOCK interrupt on DCN, which seems to correspond to
> -	 * the regular VUPDATE interrupt on DCE. We want DC_IRQ_SOURCE_VUPDATEx
> -	 * to trigger at end of each vblank, regardless of state of the lock,
> -	 * matching DCE behaviour.
> -	 */
> -	for (i = DCN_1_0__SRCID__OTG0_IHC_V_UPDATE_NO_LOCK_INTERRUPT;
> -	     i <= DCN_1_0__SRCID__OTG0_IHC_V_UPDATE_NO_LOCK_INTERRUPT + adev->mode_info.num_crtc - 1;
> -	     i++) {
> -		r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_DCE, i, &adev->vupdate_irq);
> -
> -		if (r) {
> -			DRM_ERROR("Failed to add vupdate irq id!\n");
> -			return r;
> -		}
> -
> -		int_params.int_context = INTERRUPT_HIGH_IRQ_CONTEXT;
> -		int_params.irq_source =
> -			dc_interrupt_to_irq_source(dc, i, 0);
> -
> -		c_irq_params = &adev->dm.vupdate_params[int_params.irq_source - DC_IRQ_SOURCE_VUPDATE1];
> -
> -		c_irq_params->adev = adev;
> -		c_irq_params->irq_src = int_params.irq_source;
> -
> -		amdgpu_dm_irq_register_interrupt(adev, &int_params,
> -				dm_vupdate_high_irq, c_irq_params);
> -	}
> -
>   	/* Use GRPH_PFLIP interrupt */
>   	for (i = DCN_1_0__SRCID__HUBP0_FLIP_INTERRUPT;
>   			i <= DCN_1_0__SRCID__HUBP0_FLIP_INTERRUPT + adev->mode_info.num_crtc - 1;
> @@ -4266,7 +4238,7 @@ static inline int dm_set_vblank(struct drm_crtc *crtc, bool enable)
>   	struct dm_crtc_state *acrtc_state = to_dm_crtc_state(crtc->state);
>   	int rc = 0;
> 
> -	if (enable) {
> +	if (enable && adev->family <= AMDGPU_FAMILY_AI) {
>   		/* vblank irq on -> Only need vupdate irq in vrr mode */
>   		if (amdgpu_dm_vrr_active(acrtc_state))
>   			rc = dm_set_vupdate_irq(crtc, true);
> @@ -6243,6 +6215,7 @@ static void pre_update_freesync_state_on_stream(
>   static void amdgpu_dm_handle_vrr_transition(struct dm_crtc_state *old_state,
>   					    struct dm_crtc_state *new_state)
>   {
> +	struct amdgpu_device *adev = old_state->base.crtc->dev->dev_private;
>   	bool old_vrr_active = amdgpu_dm_vrr_active(old_state);
>   	bool new_vrr_active = amdgpu_dm_vrr_active(new_state);
> 
> @@ -6255,7 +6228,8 @@ static void amdgpu_dm_handle_vrr_transition(struct dm_crtc_state *old_state,
>   		 * We also need vupdate irq for the actual core vblank handling
>   		 * at end of vblank.
>   		 */
> -		dm_set_vupdate_irq(new_state->base.crtc, true);
> +		if (adev->family <= AMDGPU_FAMILY_AI)
> +			dm_set_vupdate_irq(new_state->base.crtc, true);

Can we move the if into dm_set_vupdate_irq directly? We're setting it to 
false even when we don't have it with this patch.

Nicholas Kazlauskas

>   		drm_crtc_vblank_get(new_state->base.crtc);
>   		DRM_DEBUG_DRIVER("%s: crtc=%u VRR off->on: Get vblank ref\n",
>   				 __func__, new_state->base.crtc->base.id);
> --
> 2.23.0
> 

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

  parent reply	other threads:[~2019-11-05 16:16 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-05 15:34 [PATCH 1/2] drm/amd/display: Send vblank and user events at vsartup for DCN sunpeng.li-5C7GfCeVMHo
2019-11-05 15:34 ` sunpeng.li
     [not found] ` <20191105153416.32049-1-sunpeng.li-5C7GfCeVMHo@public.gmane.org>
2019-11-05 15:34   ` [PATCH 2/2] drm/amd/display: Disable VUpdate interrupt for DCN hardware sunpeng.li-5C7GfCeVMHo
2019-11-05 15:34     ` sunpeng.li
     [not found]     ` <20191105153416.32049-2-sunpeng.li-5C7GfCeVMHo@public.gmane.org>
2019-11-05 15:58       ` [PATCH 2/2 v2] " sunpeng.li-5C7GfCeVMHo
2019-11-05 15:58         ` sunpeng.li
     [not found]         ` <20191105155802.1302-1-sunpeng.li-5C7GfCeVMHo@public.gmane.org>
2019-11-05 16:16           ` Kazlauskas, Nicholas [this message]
2019-11-05 16:16             ` Kazlauskas, Nicholas
     [not found]             ` <47f9dd1b-66c1-a521-d6c8-b9422616cf2e-5C7GfCeVMHo@public.gmane.org>
2019-11-05 18:54               ` Li, Sun peng (Leo)
2019-11-05 18:54                 ` Li, Sun peng (Leo)
2019-11-05 19:01           ` [PATCH v3] " sunpeng.li-5C7GfCeVMHo
2019-11-05 19:01             ` sunpeng.li
     [not found]             ` <20191105190147.7283-1-sunpeng.li-5C7GfCeVMHo@public.gmane.org>
2019-11-05 19:04               ` Li, Sun peng (Leo)
2019-11-05 19:04                 ` Li, Sun peng (Leo)
2019-11-05 19:07           ` [PATCH v4] " sunpeng.li-5C7GfCeVMHo
2019-11-05 19:07             ` sunpeng.li
     [not found]             ` <20191105190709.7816-1-sunpeng.li-5C7GfCeVMHo@public.gmane.org>
2019-11-05 20:21               ` Kazlauskas, Nicholas
2019-11-05 20:21                 ` Kazlauskas, Nicholas
2019-11-05 16:15   ` [PATCH 1/2] drm/amd/display: Send vblank and user events at vsartup for DCN Kazlauskas, Nicholas
2019-11-05 16:15     ` Kazlauskas, Nicholas
     [not found]     ` <c93c503d-48dc-1ea5-19f7-42ff9392e162-5C7GfCeVMHo@public.gmane.org>
2019-11-05 18:32       ` Li, Sun peng (Leo)
2019-11-05 18:32         ` Li, Sun peng (Leo)
     [not found]         ` <ed7b7f5e-4a53-f3e1-912f-e0ae5181288c-5C7GfCeVMHo@public.gmane.org>
2019-11-05 20:21           ` Kazlauskas, Nicholas
2019-11-05 20:21             ` Kazlauskas, Nicholas
2019-11-29 19:20         ` Mario Kleiner

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