[PATCH] drm/amd/pp: Clean register first to avoid read original value

[PATCH] drm/amd/pp: Clean register first to avoid read original value

[Rex Zhu]

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
---
 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index aaa9f5b..38cf3a1 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -3368,6 +3368,19 @@ static int smu7_get_gpu_power(struct pp_hwmgr *hwmgr,
 			"Failed to start pm status log!",
 			return -1);
 
+	cgs_write_ind_register(hwmgr->device,
+			CGS_IND_REG__SMC,
+			ixSMU_PM_STATUS_40, 0);
+	cgs_write_ind_register(hwmgr->device,
+			CGS_IND_REG__SMC,
+			ixSMU_PM_STATUS_49, 0);
+	cgs_write_ind_register(hwmgr->device,
+			CGS_IND_REG__SMC,
+			ixSMU_PM_STATUS_94, 0);
+	cgs_write_ind_register(hwmgr->device,
+			CGS_IND_REG__SMC,
+			ixSMU_PM_STATUS_95, 0);
+
 	/* Sampling period from 50ms to 4sec */
 	msleep_interruptible(200);
 
-- 
1.9.1

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Re: [PATCH] drm/amd/pp: Clean register first to avoid read original value

[Deucher, Alexander]

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Reviewed-by: Alex Deucher <alexander.deucher-5C7GfCeVMHo@public.gmane.org>

________________________________
From: amd-gfx <amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of Rex Zhu <Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
Sent: Friday, March 30, 2018 3:33:26 AM
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Zhu, Rex
Subject: [PATCH] drm/amd/pp: Clean register first to avoid read original value

Signed-off-by: Rex Zhu <Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
---
 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index aaa9f5b..38cf3a1 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -3368,6 +3368,19 @@ static int smu7_get_gpu_power(struct pp_hwmgr *hwmgr,
                         "Failed to start pm status log!",
                         return -1);

+       cgs_write_ind_register(hwmgr->device,
+                       CGS_IND_REG__SMC,
+                       ixSMU_PM_STATUS_40, 0);
+       cgs_write_ind_register(hwmgr->device,
+                       CGS_IND_REG__SMC,
+                       ixSMU_PM_STATUS_49, 0);
+       cgs_write_ind_register(hwmgr->device,
+                       CGS_IND_REG__SMC,
+                       ixSMU_PM_STATUS_94, 0);
+       cgs_write_ind_register(hwmgr->device,
+                       CGS_IND_REG__SMC,
+                       ixSMU_PM_STATUS_95, 0);
+
         /* Sampling period from 50ms to 4sec */
         msleep_interruptible(200);

--
1.9.1

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Re: [PATCH] drm/amd/pp: Clean register first to avoid read original value

[Eric Huang]

It is not necessary to do that. The register will reset to 0 after reading.

Eric


On 03/30/2018 03:33 AM, Rex Zhu wrote:
> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
> ---
>   drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 13 +++++++++++++
>   1 file changed, 13 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> index aaa9f5b..38cf3a1 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> @@ -3368,6 +3368,19 @@ static int smu7_get_gpu_power(struct pp_hwmgr *hwmgr,
>   			"Failed to start pm status log!",
>   			return -1);
>   
> +	cgs_write_ind_register(hwmgr->device,
> +			CGS_IND_REG__SMC,
> +			ixSMU_PM_STATUS_40, 0);
> +	cgs_write_ind_register(hwmgr->device,
> +			CGS_IND_REG__SMC,
> +			ixSMU_PM_STATUS_49, 0);
> +	cgs_write_ind_register(hwmgr->device,
> +			CGS_IND_REG__SMC,
> +			ixSMU_PM_STATUS_94, 0);
> +	cgs_write_ind_register(hwmgr->device,
> +			CGS_IND_REG__SMC,
> +			ixSMU_PM_STATUS_95, 0);
> +
>   	/* Sampling period from 50ms to 4sec */
>   	msleep_interruptible(200);
>   

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Re: [PATCH] drm/amd/pp: Clean register first to avoid read original value

[Eric Huang]

On 03/30/2018 10:36 AM, Eric Huang wrote:
> It is not necessary to do that. The register will reset to 0 after 
> reading.
The register is not reset after reading. Actually after 
PPSMC_MSG_PmStatusLogSample sent, the register will be updated. So it is 
still not necessary to do that.

Eric
>
> Eric
>
>
> On 03/30/2018 03:33 AM, Rex Zhu wrote:
>> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
>> ---
>>   drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 13 +++++++++++++
>>   1 file changed, 13 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 
>> b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
>> index aaa9f5b..38cf3a1 100644
>> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
>> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
>> @@ -3368,6 +3368,19 @@ static int smu7_get_gpu_power(struct pp_hwmgr 
>> *hwmgr,
>>               "Failed to start pm status log!",
>>               return -1);
>>   +    cgs_write_ind_register(hwmgr->device,
>> +            CGS_IND_REG__SMC,
>> +            ixSMU_PM_STATUS_40, 0);
>> +    cgs_write_ind_register(hwmgr->device,
>> +            CGS_IND_REG__SMC,
>> +            ixSMU_PM_STATUS_49, 0);
>> +    cgs_write_ind_register(hwmgr->device,
>> +            CGS_IND_REG__SMC,
>> +            ixSMU_PM_STATUS_94, 0);
>> +    cgs_write_ind_register(hwmgr->device,
>> +            CGS_IND_REG__SMC,
>> +            ixSMU_PM_STATUS_95, 0);
>> +
>>       /* Sampling period from 50ms to 4sec */
>>       msleep_interruptible(200);
>

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Re: [PATCH] drm/amd/pp: Clean register first to avoid read original value

[Zhu, Rex]

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when PPSMC_MSG_PmStatusLogSample sent, firmware will clean the temp sampling date, and add the sample task to dpm loop.

but firmware not  clean the registers.  if firmware not update the registers, we will read out the original value.


Best Regards

Rex



________________________________
From: amd-gfx <amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of Eric Huang <jinhuieric.huang-5C7GfCeVMHo@public.gmane.org>
Sent: Friday, March 30, 2018 11:22 PM
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Subject: Re: [PATCH] drm/amd/pp: Clean register first to avoid read original value


On 03/30/2018 10:36 AM, Eric Huang wrote:
> It is not necessary to do that. The register will reset to 0 after
> reading.
The register is not reset after reading. Actually after
PPSMC_MSG_PmStatusLogSample sent, the register will be updated. So it is
still not necessary to do that.

Eric
>
> Eric
>
>
> On 03/30/2018 03:33 AM, Rex Zhu wrote:
>> Signed-off-by: Rex Zhu <Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
>> ---
>>   drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 13 +++++++++++++
>>   1 file changed, 13 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
>> b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
>> index aaa9f5b..38cf3a1 100644
>> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
>> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
>> @@ -3368,6 +3368,19 @@ static int smu7_get_gpu_power(struct pp_hwmgr
>> *hwmgr,
>>               "Failed to start pm status log!",
>>               return -1);
>>   +    cgs_write_ind_register(hwmgr->device,
>> +            CGS_IND_REG__SMC,
>> +            ixSMU_PM_STATUS_40, 0);
>> +    cgs_write_ind_register(hwmgr->device,
>> +            CGS_IND_REG__SMC,
>> +            ixSMU_PM_STATUS_49, 0);
>> +    cgs_write_ind_register(hwmgr->device,
>> +            CGS_IND_REG__SMC,
>> +            ixSMU_PM_STATUS_94, 0);
>> +    cgs_write_ind_register(hwmgr->device,
>> +            CGS_IND_REG__SMC,
>> +            ixSMU_PM_STATUS_95, 0);
>> +
>>       /* Sampling period from 50ms to 4sec */
>>       msleep_interruptible(200);
>

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Re: [PATCH] drm/amd/pp: Clean register first to avoid read original value

[Eric Huang]

[-- Attachment #1.1: Type: text/plain, Size: 3064 bytes --]

Please confirm this with SMU team about your assumption.


Regards,

Eric


On 03/30/2018 08:28 PM, Zhu, Rex wrote:
>
> when PPSMC_MSG_PmStatusLogSample sent, firmware will clean the temp 
> sampling date, and add the sample task to dpm loop.
>
> but firmware not  clean the registers.  if firmware not update the 
> registers, we will read out the original value.
>
>
> Best Regards
>
> Rex
>
>
>
>
> ------------------------------------------------------------------------
> *From:* amd-gfx <amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of 
> Eric Huang <jinhuieric.huang-5C7GfCeVMHo@public.gmane.org>
> *Sent:* Friday, March 30, 2018 11:22 PM
> *To:* amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
> *Subject:* Re: [PATCH] drm/amd/pp: Clean register first to avoid read 
> original value
>
> On 03/30/2018 10:36 AM, Eric Huang wrote:
> > It is not necessary to do that. The register will reset to 0 after
> > reading.
> The register is not reset after reading. Actually after
> PPSMC_MSG_PmStatusLogSample sent, the register will be updated. So it is
> still not necessary to do that.
>
> Eric
> >
> > Eric
> >
> >
> > On 03/30/2018 03:33 AM, Rex Zhu wrote:
> >> Signed-off-by: Rex Zhu <Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
> >> ---
> >> drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 13 +++++++++++++
> >>   1 file changed, 13 insertions(+)
> >>
> >> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> >> b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> >> index aaa9f5b..38cf3a1 100644
> >> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> >> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> >> @@ -3368,6 +3368,19 @@ static int smu7_get_gpu_power(struct pp_hwmgr
> >> *hwmgr,
> >>               "Failed to start pm status log!",
> >>               return -1);
> >>   + cgs_write_ind_register(hwmgr->device,
> >> +            CGS_IND_REG__SMC,
> >> +            ixSMU_PM_STATUS_40, 0);
> >> +    cgs_write_ind_register(hwmgr->device,
> >> +            CGS_IND_REG__SMC,
> >> +            ixSMU_PM_STATUS_49, 0);
> >> +    cgs_write_ind_register(hwmgr->device,
> >> +            CGS_IND_REG__SMC,
> >> +            ixSMU_PM_STATUS_94, 0);
> >> +    cgs_write_ind_register(hwmgr->device,
> >> +            CGS_IND_REG__SMC,
> >> +            ixSMU_PM_STATUS_95, 0);
> >> +
> >>       /* Sampling period from 50ms to 4sec */
> >>       msleep_interruptible(200);
> >
>
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