DMA Engine development
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From: sashiko-bot@kernel.org
To: "Claudiu Beznea" <claudiu.beznea@kernel.org>
Cc: dmaengine@vger.kernel.org, Frank.Li@kernel.org,
	wsa+renesas@sang-engineering.com, vkoul@kernel.org
Subject: Re: [PATCH v6 09/18] dmaengine: sh: rz-dmac: Use virt-dma APIs for channel descriptor processing
Date: Tue, 26 May 2026 09:28:51 +0000	[thread overview]
Message-ID: <20260526092851.A49EE1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260526084710.3491480-10-claudiu.beznea@kernel.org>

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] Missing cleanup of the active descriptor (`channel->desc`) in `rz_dmac_free_chan_resources` causes permanent memory leaks and channel breakage.
- [High] Premature tasklet synchronization in `rz_dmac_device_synchronize` violates DMA synchronization guarantees by allowing callbacks to execute after the function returns.
--

commit d09437d0a9b5a01f2fe83f477e60abbcf577d287
Author: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>

dmaengine: sh: rz-dmac: Use virt-dma APIs for channel descriptor processing

This commit updates the driver to fully rely on the virt-dma APIs for
descriptor management. It replaces custom active and queue lists with a
single channel->desc pointer to track the current descriptor and relies
on virt-dma to handle the rest.

> diff --git a/drivers/dma/sh/rz-dmac.c b/drivers/dma/sh/rz-dmac.c
> index 217657513fa76..1f884ec101f80 100644
> --- a/drivers/dma/sh/rz-dmac.c
> +++ b/drivers/dma/sh/rz-dmac.c

[ ... ]

> @@ -494,8 +485,6 @@ static void rz_dmac_free_chan_resources(struct dma_chan *chan)
>  	rz_lmdesc_setup(channel, channel->lmdesc.base);
>  
>  	rz_dmac_disable_hw(channel);
> -	list_splice_tail_init(&channel->ld_active, &channel->ld_free);
> -	list_splice_tail_init(&channel->ld_queue, &channel->ld_free);
>  
>  	if (channel->mid_rid >= 0) {
>  		clear_bit(channel->mid_rid, dmac->modules);
> @@ -504,13 +493,19 @@ static void rz_dmac_free_chan_resources(struct dma_chan *chan)
>  
>  	spin_unlock_irqrestore(&channel->vc.lock, flags);
>  
> +	vchan_free_chan_resources(&channel->vc);
> +
> +	spin_lock_irqsave(&channel->vc.lock, flags);
> +
>  	list_for_each_entry_safe(desc, _desc, &channel->ld_free, node) {
> +		list_del(&desc->node);
>  		kfree(desc);
>  		channel->descs_allocated--;
>  	}
>  
>  	INIT_LIST_HEAD(&channel->ld_free);
> -	vchan_free_chan_resources(&channel->vc);
> +
> +	spin_unlock_irqrestore(&channel->vc.lock, flags);
>  }

[Severity: High]
Does this code leak the active descriptor? If channel->desc is currently set,
vchan_free_chan_resources only clears virt-dma's internal lists, leaving
the memory allocated for channel->desc dangling.

Could this also cause the channel to be permanently broken for future clients?

If channel->desc remains non-NULL, a subsequent request for the channel
might cause rz_dmac_issue_pending to see channel->desc != NULL and
silently refuse to start new transfers. Unlike rz_dmac_terminate_all,
this function does not appear to terminate and clear channel->desc.

[ ... ]

> @@ -692,6 +681,8 @@ static void rz_dmac_device_synchronize(struct dma_chan *chan)
>  	u32 chstat;
>  	int ret;
>  
> +	vchan_synchronize(&channel->vc);
> +
>  	ret = read_poll_timeout(rz_dmac_ch_readl, chstat, !(chstat & CHSTAT_EN),
>  				100, 100000, false, channel, CHSTAT, 1);
>  	if (ret < 0)

[Severity: High]
Does calling vchan_synchronize here allow client completion callbacks to
run after this function returns?

If the hardware is still actively transferring, vchan_synchronize will
return immediately. Then, the polling loop waits for the hardware to stop.
Once the hardware finishes, it raises an interrupt, and the IRQ handler
calls vchan_cookie_complete, which schedules the virt-dma tasklet again.

This seems like it could expose clients to use-after-free bugs if they rely
on the DMA synchronization guarantee to safely free DMA buffers after
calling dmaengine_synchronize. 

Should vchan_synchronize be called after the hardware polling loop finishes?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260526084710.3491480-1-claudiu.beznea@kernel.org?part=9

  reply	other threads:[~2026-05-26  9:28 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-26  8:46 [PATCH v6 00/18] Renesas: dmaengine and ASoC fixes Claudiu Beznea
2026-05-26  8:46 ` [PATCH v6 01/18] dmaengine: sh: rz-dmac: Move interrupt request after everything is set up Claudiu Beznea
2026-05-26  8:54   ` Biju Das
2026-05-26  9:45     ` Claudiu Beznea
2026-05-26  9:51       ` Biju Das
2026-05-26 10:25         ` Claudiu Beznea
2026-05-26 10:39           ` Biju Das
2026-05-26  9:20   ` sashiko-bot
2026-05-28 13:44   ` Tommaso Merciai
2026-05-26  8:46 ` [PATCH v6 02/18] dmaengine: sh: rz-dmac: Fix incorrect NULL check for list_first_entry() Claudiu Beznea
2026-05-26  9:03   ` sashiko-bot
2026-05-28 13:45   ` Tommaso Merciai
2026-05-26  8:46 ` [PATCH v6 03/18] dmaengine: sh: rz-dmac: Use list_first_entry_or_null() Claudiu Beznea
2026-05-28 13:45   ` Tommaso Merciai
2026-05-26  8:46 ` [PATCH v6 04/18] dmaengine: sh: rz-dmac: Use rz_dmac_disable_hw() Claudiu Beznea
2026-05-26  9:15   ` sashiko-bot
2026-05-28 13:46   ` Tommaso Merciai
2026-05-26  8:46 ` [PATCH v6 05/18] dmaengine: sh: rz-dmac: Add helper to compute the lmdesc address Claudiu Beznea
2026-05-28 13:47   ` Tommaso Merciai
2026-05-26  8:46 ` [PATCH v6 06/18] dmaengine: sh: rz-dmac: Save the start LM descriptor Claudiu Beznea
2026-05-26  9:41   ` sashiko-bot
2026-05-28 13:47   ` Tommaso Merciai
2026-05-26  8:46 ` [PATCH v6 07/18] dmaengine: sh: rz-dmac: Add helper to check if the channel is enabled Claudiu Beznea
2026-05-28 13:48   ` Tommaso Merciai
2026-05-26  8:47 ` [PATCH v6 08/18] dmaengine: sh: rz-dmac: Add helper to check if the channel is paused Claudiu Beznea
2026-05-28 13:48   ` Tommaso Merciai
2026-05-26  8:47 ` [PATCH v6 09/18] dmaengine: sh: rz-dmac: Use virt-dma APIs for channel descriptor processing Claudiu Beznea
2026-05-26  9:28   ` sashiko-bot [this message]
2026-05-28 13:49   ` Tommaso Merciai
2026-05-26  8:47 ` [PATCH v6 10/18] dmaengine: sh: rz-dmac: Refactor pause/resume code Claudiu Beznea
2026-05-26  9:28   ` sashiko-bot
2026-05-28 13:50   ` Tommaso Merciai
2026-05-26  8:47 ` [PATCH v6 11/18] dmaengine: sh: rz-dmac: Drop the update of channel->chctrl with CHCTRL_SETEN Claudiu Beznea
2026-05-26  9:11   ` sashiko-bot
2026-05-28 13:50   ` Tommaso Merciai
2026-05-26  8:47 ` [PATCH v6 12/18] dmaengine: sh: rz-dmac: Add cyclic DMA support Claudiu Beznea
2026-05-26  9:31   ` sashiko-bot
2026-05-28 13:51   ` Tommaso Merciai
2026-05-26  8:47 ` [PATCH v6 13/18] dmaengine: sh: rz-dmac: Adjust rz_dmac_chan_get_residue() to return error codes Claudiu Beznea
2026-05-28 13:51   ` Tommaso Merciai
2026-05-26  8:47 ` [PATCH v6 14/18] dmaengine: sh: rz-dmac: Add runtime PM support Claudiu Beznea
2026-05-26  9:57   ` sashiko-bot
2026-05-28 13:52   ` Tommaso Merciai
2026-05-26  8:47 ` [PATCH v6 15/18] dmaengine: sh: rz-dmac: Add suspend to RAM support Claudiu Beznea
2026-05-26  9:43   ` sashiko-bot
2026-05-28 14:38   ` Tommaso Merciai
2026-05-26  8:47 ` [PATCH v6 16/18] ASoC: renesas: rz-ssi: Add pause support Claudiu Beznea
2026-05-26  9:46   ` sashiko-bot
2026-05-26  8:47 ` [PATCH v6 17/18] ASoC: renesas: rz-ssi: Use generic PCM dmaengine APIs Claudiu Beznea
2026-05-26 10:00   ` sashiko-bot
2026-05-26  8:47 ` [PATCH v6 18/18] dmaengine: sh: rz-dmac: Set the Link End (LE) bit on the last descriptor Claudiu Beznea
2026-05-26  9:43   ` sashiko-bot
2026-05-28 14:39   ` Tommaso Merciai

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