DMA Engine development
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From: Linus Walleij <linusw@kernel.org>
To: Vinod Koul <vkoul@kernel.org>, Frank Li <Frank.Li@kernel.org>
Cc: dmaengine@vger.kernel.org, phone-devel@vger.kernel.org,
	 Linus Walleij <linusw@kernel.org>,
	sashiko-bot@kernel.org
Subject: [PATCH v2 12/13] dmaengine: ste_dma40: Validate memcpy configuration
Date: Thu, 20 Aug 2026 15:15:06 +0200	[thread overview]
Message-ID: <20260820-dma40-fixes-v2-12-63238334c707@kernel.org> (raw)
In-Reply-To: <20260820-dma40-fixes-v2-0-63238334c707@kernel.org>

d40_config_memcpy() builds a default memcpy configuration without passing
it through d40_validate_conf(). A dev_type supplied through the
memcpy-channels device tree property can therefore bypass the bounds
checks added for client configurations.

Validate the generated memcpy configuration before deriving logical
channel registers or allocating the channel.

Reported-by: sashiko-bot@kernel.org
Closes: https://lore.kernel.org/dmaengine/20260819225008.5F9651F000E9@smtp.kernel.org/
Assisted-by: Codex:gpt-5-5
Signed-off-by: Linus Walleij <linusw@kernel.org>
---
 drivers/dma/ste_dma40.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index e0c694a1fc8b..49bca706b638 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -2013,11 +2013,16 @@ static int d40_allocate_channel(struct d40_chan *d40c, bool *first_phy_user)
 static int d40_config_memcpy(struct d40_chan *d40c)
 {
 	dma_cap_mask_t cap = d40c->chan.device->cap_mask;
+	int ret;
 
 	if (dma_has_cap(DMA_MEMCPY, cap) && !dma_has_cap(DMA_SLAVE, cap)) {
 		d40c->dma_cfg = dma40_memcpy_conf_log;
 		d40c->dma_cfg.dev_type = dma40_memcpy_channels[d40c->chan.chan_id];
 
+		ret = d40_validate_conf(d40c, &d40c->dma_cfg);
+		if (ret)
+			return ret;
+
 		d40_log_cfg(&d40c->dma_cfg,
 			    &d40c->log_def.lcsp1, &d40c->log_def.lcsp3);
 
@@ -2025,6 +2030,10 @@ static int d40_config_memcpy(struct d40_chan *d40c)
 		   dma_has_cap(DMA_SLAVE, cap)) {
 		d40c->dma_cfg = dma40_memcpy_conf_phy;
 
+		ret = d40_validate_conf(d40c, &d40c->dma_cfg);
+		if (ret)
+			return ret;
+
 		/* Generate interrupt at end of transfer or relink. */
 		d40c->dst_def_cfg |= BIT(D40_SREG_CFG_TIM_POS);
 

-- 
2.55.0


  parent reply	other threads:[~2026-08-20 13:15 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-20 13:14 [PATCH v2 00/13] dmaengine: ste_dma40: Fix probe and allocation bugs Linus Walleij
2026-08-20 13:14 ` [PATCH v2 01/13] dmaengine: ste_dma40: Fix failed start cleanup Linus Walleij
2026-08-20 13:30   ` sashiko-bot
2026-08-20 13:14 ` [PATCH v2 02/13] dmaengine: ste_dma40: Check runtime PM in IRQ Linus Walleij
2026-08-20 13:31   ` sashiko-bot
2026-08-20 13:14 ` [PATCH v2 03/13] dmaengine: ste_dma40: Init hardware before registration Linus Walleij
2026-08-20 13:14 ` [PATCH v2 04/13] dmaengine: ste_dma40: Fix DMA registration unwind Linus Walleij
2026-08-20 13:30   ` sashiko-bot
2026-08-20 13:14 ` [PATCH v2 05/13] dmaengine: ste_dma40: Fix LCLA allocation order Linus Walleij
2026-08-20 13:29   ` sashiko-bot
2026-08-20 13:15 ` [PATCH v2 06/13] dmaengine: ste_dma40: Fix probe LCLA free Linus Walleij
2026-08-20 13:15 ` [PATCH v2 07/13] dmaengine: ste_dma40: Fix probe runtime PM disable Linus Walleij
2026-08-20 13:29   ` sashiko-bot
2026-08-20 13:15 ` [PATCH v2 08/13] dmaengine: ste_dma40: Fix probe IRQ leak Linus Walleij
2026-08-20 13:29   ` sashiko-bot
2026-08-20 13:15 ` [PATCH v2 09/13] dmaengine: ste_dma40: Fix memcpy channel parsing Linus Walleij
2026-08-20 13:29   ` sashiko-bot
2026-08-20 13:15 ` [PATCH v2 10/13] dmaengine: ste_dma40: Fix logical channel bounds check Linus Walleij
2026-08-20 13:32   ` sashiko-bot
2026-08-20 13:15 ` [PATCH v2 11/13] dmaengine: ste_dma40: Fix event group bounds Linus Walleij
2026-08-20 13:34   ` sashiko-bot
2026-08-20 13:15 ` Linus Walleij [this message]
2026-08-20 13:37   ` [PATCH v2 12/13] dmaengine: ste_dma40: Validate memcpy configuration sashiko-bot
2026-08-20 13:15 ` [PATCH v2 13/13] dmaengine: Use unique debugfs names Linus Walleij

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