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From: Rodrigo Vivi <rodrigo.vivi@gmail.com>
To: intel-gfx@lists.freedesktop.org
Cc: Shobhit Kumar <shobhit.kumar@intel.com>, dri-devel@lists.freedesktop.org
Subject: [PATCH 3/9] drm/i915: Added SDP and VSC structures for handling PSR for eDP
Date: Wed, 30 Jan 2013 16:24:45 -0200	[thread overview]
Message-ID: <1359570291-2170-4-git-send-email-rodrigo.vivi@gmail.com> (raw)
In-Reply-To: <1359570291-2170-1-git-send-email-rodrigo.vivi@gmail.com>

From: Shobhit Kumar <shobhit.kumar@intel.com>

Signed-off-by: Sateesh Kavuri <sateesh.kavuri@intel.com>

v2: Modified and corrected the structures to be more in line for
kernel coding guidelines and rebased the code on Paulo's DP patchset

Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>

v3: removing unecessary identation at DP_RECEIVER_CAP_SIZE
v4: moving them to include/drm/drm_dp_helper.h and also already
    icluding EDP_PSR_RECEIVER_CAP_SIZE to add everything needed
    for PSR at once at drm_dp_helper.h

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
---
 include/drm/drm_dp_helper.h | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index e8e1417..e9b7c4b 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -343,12 +343,41 @@ u8 drm_dp_get_adjust_request_pre_emphasis(u8 link_status[DP_LINK_STATUS_SIZE],
 					  int lane);
 
 #define DP_RECEIVER_CAP_SIZE	0xf
+#define EDP_PSR_RECEIVER_CAP_SIZE      2
+
 void drm_dp_link_train_clock_recovery_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]);
 void drm_dp_link_train_channel_eq_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]);
 
 u8 drm_dp_link_rate_to_bw_code(int link_rate);
 int drm_dp_bw_code_to_link_rate(u8 link_bw);
 
+/* SDP header as per eDP 1.3 spec, section 3.6 */
+struct edp_sdp_header {
+	u8 id;
+	u8 type;
+	u8 revision : 5;   	    /* Bits 0:4 */
+	u8 rsvd1    : 3;   	    /* Bits 5:7 */
+	u8 valid_payload_bytes : 5; /* Bits 0:4 */
+	u8 rsvd2	       : 3; /* Bits 5:7 */
+} __attribute__((packed));
+
+/* SDP VSC header as per eDP 1.3 spec, section 3.6 */
+struct edp_vsc_psr {
+	struct edp_sdp_header sdp_header;
+	u8 unused;
+	u8 psr_state  : 1; 	/* Bit 0 */
+	u8 update_rfb : 1;	/* Bit 1 */
+	u8 valid_crc  : 1;	/* Bit 2 */
+	u8 reserved1  : 5;	/* Bits 3:7 */
+	u8 crc_r_lower;
+	u8 crc_r_higher;
+	u8 crc_g_lower;
+	u8 crc_g_higher;
+	u8 crc_b_lower;
+	u8 crc_b_higher;
+	u8 reserved2[24];
+} __attribute__((packed));
+
 static inline int
 drm_dp_max_link_rate(u8 dpcd[DP_RECEIVER_CAP_SIZE])
 {
-- 
1.7.11.7

  parent reply	other threads:[~2013-01-30 18:24 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-01-30 18:24 [PATCH 0/9] Enable eDP PSR functionality at HSW - v2 Rodrigo Vivi
2013-01-30 18:24 ` [PATCH 1/9] drm/i915: Organize VBT stuff inside drm_i915_private Rodrigo Vivi
2013-01-31  9:08   ` Jani Nikula
2013-01-30 18:24 ` [PATCH 2/9] drm/i915: Use cpu_transcoder for HSW_TVIDEO_DIP_* instead of pipe Rodrigo Vivi
2013-01-31  8:32   ` [Intel-gfx] " Jani Nikula
2013-01-31 20:26     ` Paulo Zanoni
2013-01-31 20:18   ` [Intel-gfx] " Paulo Zanoni
2013-01-30 18:24 ` Rodrigo Vivi [this message]
2013-01-31  9:07   ` [PATCH 3/9] drm/i915: Added SDP and VSC structures for handling PSR for eDP Jani Nikula
2013-01-30 18:24 ` [PATCH 4/9] drm/i915: Read the EDP DPCD and PSR Capability Rodrigo Vivi
2013-01-31  9:12   ` [Intel-gfx] " Jani Nikula
2013-01-30 18:24 ` [PATCH 5/9] drm/i915: Setup EDP PSR AUX Registers Rodrigo Vivi
2013-01-31 10:17   ` Jani Nikula
2013-01-31 21:35   ` Paulo Zanoni
2013-01-30 18:24 ` [PATCH 6/9] drm/i915: VBT Parsing for the PSR Feature Block for HSW Rodrigo Vivi
2013-01-30 18:24 ` [PATCH 7/9] drm/i915: Enable/Disable PSR on HSW Rodrigo Vivi
2013-01-31 10:40   ` Jani Nikula
2013-01-31 22:01   ` Paulo Zanoni
2013-01-30 18:24 ` [PATCH 8/9] drm/i915: Added debugfs support for PSR Status Rodrigo Vivi
2013-01-31 10:48   ` Jani Nikula
2013-01-30 18:24 ` [PATCH 9/9] drm/i915: Hook PSR functionality Rodrigo Vivi
2013-01-31 10:50   ` [Intel-gfx] " Jani Nikula

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