From: Rodrigo Vivi <rodrigo.vivi@gmail.com>
To: intel-gfx@lists.freedesktop.org
Cc: Shobhit Kumar <shobhit.kumar@intel.com>, dri-devel@lists.freedesktop.org
Subject: [PATCH 6/9] drm/i915: VBT Parsing for the PSR Feature Block for HSW
Date: Wed, 30 Jan 2013 16:24:48 -0200 [thread overview]
Message-ID: <1359570291-2170-7-git-send-email-rodrigo.vivi@gmail.com> (raw)
In-Reply-To: <1359570291-2170-1-git-send-email-rodrigo.vivi@gmail.com>
From: Shobhit Kumar <shobhit.kumar@intel.com>
Parse and store useful information in i915_dev_private
Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
v2: Add to new vbt struct and call them psr_*
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
---
drivers/gpu/drm/i915/i915_drv.h | 7 +++++++
drivers/gpu/drm/i915/intel_bios.c | 30 ++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_bios.h | 20 +++++++++++++++++++-
3 files changed, 56 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e22f6bd..b5f1842 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -689,6 +689,13 @@ struct intel_vbt_data {
int edp_bpp;
struct edp_power_seq edp_pps;
+ /* eDP PSR*/
+ u8 psr_full_link_state;
+ u8 psr_wait_lines;
+ u8 psr_idle_frames;
+ u16 psr_wakeup_tp1;
+ u16 psr_wakeup_tp2_tp3;
+
int crt_ddc_pin;
int child_dev_num;
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index e145151..2a3fa8b 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -381,6 +381,35 @@ parse_general_definitions(struct drm_i915_private *dev_priv,
}
}
+
+static void
+parse_edp_psr(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
+{
+ struct bdb_psr_features *psr;
+ struct bdb_lvds_options *lvds_opts;
+ int index = 0;
+ lvds_opts = find_section(bdb, BDB_LVDS_OPTIONS);
+ if (!lvds_opts) {
+ DRM_DEBUG_KMS("No LVDS Options block found.\n");
+ return;
+ }
+
+ index = lvds_opts->panel_type;
+
+ psr = find_section(bdb, BDB_PSR_FEATURES);
+ if (!psr) {
+ DRM_DEBUG_KMS("No PSR feature block found.\n");
+ return;
+ }
+
+ dev_priv->vbt.psr_full_link_state = psr[index].link_disable;
+ dev_priv->vbt.psr_wait_lines = psr[index].wait_lines;
+ dev_priv->vbt.psr_idle_frames = psr[index].idle_frames;
+ dev_priv->vbt.psr_wakeup_tp1 = psr[index].wakeup_tp1;
+ dev_priv->vbt.psr_wakeup_tp2_tp3 = psr[index].wakeup_tp2;
+}
+
+
static void
parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
struct bdb_header *bdb)
@@ -740,6 +769,7 @@ intel_parse_bios(struct drm_device *dev)
parse_device_mapping(dev_priv, bdb);
parse_driver_features(dev_priv, bdb);
parse_edp(dev_priv, bdb);
+ parse_edp_psr(dev_priv, bdb);
if (bios)
pci_unmap_rom(pdev, bios);
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
index 36e57f9..c1d39de 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -80,7 +80,7 @@ struct vbios_data {
#define BDB_EXT_MMIO_REGS 6
#define BDB_SWF_IO 7
#define BDB_SWF_MMIO 8
-#define BDB_DOT_CLOCK_TABLE 9
+#define BDB_PSR_FEATURES 9
#define BDB_MODE_REMOVAL_TABLE 10
#define BDB_CHILD_DEVICE_TABLE 11
#define BDB_DRIVER_FEATURES 12
@@ -263,6 +263,24 @@ struct bdb_lvds_options {
u8 rsvd4;
} __attribute__((packed));
+struct bdb_psr_features {
+ /* psr_enable byte */
+ u8 link_disable:1;
+ u8 require_aux:1;
+ u8 rsvd1:6;
+
+ /* panel wait times */
+ u8 idle_frames:4;
+ u8 wait_lines:3;
+ u8 rsvd2:1;
+
+ /* TP1 wakeup time */
+ u16 wakeup_tp1;
+
+ /* TP2 wakeup time */
+ u16 wakeup_tp2;
+} __attribute__((packed));
+
/* LFP pointer table contains entries to the struct below */
struct bdb_lvds_lfp_data_ptr {
u16 fp_timing_offset; /* offsets are from start of bdb */
--
1.7.11.7
next prev parent reply other threads:[~2013-01-30 18:24 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-01-30 18:24 [PATCH 0/9] Enable eDP PSR functionality at HSW - v2 Rodrigo Vivi
2013-01-30 18:24 ` [PATCH 1/9] drm/i915: Organize VBT stuff inside drm_i915_private Rodrigo Vivi
2013-01-31 9:08 ` Jani Nikula
2013-01-30 18:24 ` [PATCH 2/9] drm/i915: Use cpu_transcoder for HSW_TVIDEO_DIP_* instead of pipe Rodrigo Vivi
2013-01-31 8:32 ` [Intel-gfx] " Jani Nikula
2013-01-31 20:26 ` Paulo Zanoni
2013-01-31 20:18 ` [Intel-gfx] " Paulo Zanoni
2013-01-30 18:24 ` [PATCH 3/9] drm/i915: Added SDP and VSC structures for handling PSR for eDP Rodrigo Vivi
2013-01-31 9:07 ` Jani Nikula
2013-01-30 18:24 ` [PATCH 4/9] drm/i915: Read the EDP DPCD and PSR Capability Rodrigo Vivi
2013-01-31 9:12 ` [Intel-gfx] " Jani Nikula
2013-01-30 18:24 ` [PATCH 5/9] drm/i915: Setup EDP PSR AUX Registers Rodrigo Vivi
2013-01-31 10:17 ` Jani Nikula
2013-01-31 21:35 ` Paulo Zanoni
2013-01-30 18:24 ` Rodrigo Vivi [this message]
2013-01-30 18:24 ` [PATCH 7/9] drm/i915: Enable/Disable PSR on HSW Rodrigo Vivi
2013-01-31 10:40 ` Jani Nikula
2013-01-31 22:01 ` Paulo Zanoni
2013-01-30 18:24 ` [PATCH 8/9] drm/i915: Added debugfs support for PSR Status Rodrigo Vivi
2013-01-31 10:48 ` Jani Nikula
2013-01-30 18:24 ` [PATCH 9/9] drm/i915: Hook PSR functionality Rodrigo Vivi
2013-01-31 10:50 ` [Intel-gfx] " Jani Nikula
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