[PATCH 8/9] drm/i915: Added debugfs support for PSR Status

[Rodrigo Vivi <rodrigo.vivi@gmail.com>]

From: Shobhit Kumar <shobhit.kumar@intel.com>

Added support for PSR entry counter and performance counters

Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>

v2: Add psr enabled yes/no info
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 90a6fc5..11d2896 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1659,6 +1659,39 @@ static int i915_dpio_info(struct seq_file *m, void *data)
 	return 0;
 }
 
+static int i915_edp_psr_status(struct seq_file *m, void *data)
+{
+	struct drm_info_node *node = (struct drm_info_node *) m->private;
+	struct drm_device *dev = node->minor->dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	int count;
+	u32 psrctl, psrstat, psrperf;
+
+	/* Bit 31 gives the PSR enabled */
+	psrctl = I915_READ(EDP_PSR_CTL);
+	seq_printf(m, "PSR Enabled: %s\n",
+		   yesno(psrctl & EDP_PSR_ENABLE));
+
+	/* Bits 19:16 gives the PSR entry count */
+	psrstat = I915_READ(EDP_PSR_STATUS_CTL);
+	count = ((psrstat >> 16) & 0xf);
+
+	/* Format the PSR Entry Count only for now.
+	 * TBD: Other status information
+	 */
+	seq_printf(m, "EDP_PSR_ENTRY_COUNT: %u\n", count);
+
+	/* Current PSR state */
+	count = ((psrstat >> 29) & 0x7);
+	seq_printf(m, "EDP_PSR_CURRENT_STATE: 0x%x\n", count);
+
+	/* Perfromance counter bit 23:0 */
+	psrperf = (I915_READ(EDP_PSR_PERF_CNT)) & 0xffffff;
+	seq_printf(m, "EDP_PSR_PERF_COUNTER: %u\n", psrperf);
+
+	return 0;
+}
+
 static ssize_t
 i915_wedged_read(struct file *filp,
 		 char __user *ubuf,
@@ -2228,6 +2261,7 @@ static struct drm_info_list i915_debugfs_list[] = {
 	{"i915_swizzle_info", i915_swizzle_info, 0},
 	{"i915_ppgtt_info", i915_ppgtt_info, 0},
 	{"i915_dpio", i915_dpio_info, 0},
+	{"i915_edp_psr_status", i915_edp_psr_status, 0},
 };
 #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
 
-- 
1.7.11.7