From: Jani Nikula <jani.nikula@linux.intel.com>
To: Rodrigo Vivi <rodrigo.vivi@gmail.com>, intel-gfx@lists.freedesktop.org
Cc: Shobhit Kumar <shobhit.kumar@intel.com>, dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 8/9] drm/i915: Added debugfs support for PSR Status
Date: Thu, 31 Jan 2013 12:48:16 +0200 [thread overview]
Message-ID: <878v79eihb.fsf@intel.com> (raw)
In-Reply-To: <1359570291-2170-9-git-send-email-rodrigo.vivi@gmail.com>
On Wed, 30 Jan 2013, Rodrigo Vivi <rodrigo.vivi@gmail.com> wrote:
> From: Shobhit Kumar <shobhit.kumar@intel.com>
>
> Added support for PSR entry counter and performance counters
>
> Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
>
> v2: Add psr enabled yes/no info
A bunch of nitpicks...
BR,
Jani.
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 34 ++++++++++++++++++++++++++++++++++
> 1 file changed, 34 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 90a6fc5..11d2896 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1659,6 +1659,39 @@ static int i915_dpio_info(struct seq_file *m, void *data)
> return 0;
> }
>
> +static int i915_edp_psr_status(struct seq_file *m, void *data)
> +{
> + struct drm_info_node *node = (struct drm_info_node *) m->private;
Unnecessary cast.
> + struct drm_device *dev = node->minor->dev;
> + struct drm_i915_private *dev_priv = dev->dev_private;
> + int count;
> + u32 psrctl, psrstat, psrperf;
> +
> + /* Bit 31 gives the PSR enabled */
> + psrctl = I915_READ(EDP_PSR_CTL);
> + seq_printf(m, "PSR Enabled: %s\n",
> + yesno(psrctl & EDP_PSR_ENABLE));
> +
> + /* Bits 19:16 gives the PSR entry count */
> + psrstat = I915_READ(EDP_PSR_STATUS_CTL);
> + count = ((psrstat >> 16) & 0xf);
Could #define the shift and mask for all of these, and ditch the "bits
n:m" comments.
Unnecessary braces around the whole thing.
> +
> + /* Format the PSR Entry Count only for now.
> + * TBD: Other status information
> + */
> + seq_printf(m, "EDP_PSR_ENTRY_COUNT: %u\n", count);
count should be unsigned for %u.
> +
> + /* Current PSR state */
> + count = ((psrstat >> 29) & 0x7);
Unnecessary braces.
> + seq_printf(m, "EDP_PSR_CURRENT_STATE: 0x%x\n", count);
> +
> + /* Perfromance counter bit 23:0 */
Spelling.
> + psrperf = (I915_READ(EDP_PSR_PERF_CNT)) & 0xffffff;
Unnecessary braces.
> + seq_printf(m, "EDP_PSR_PERF_COUNTER: %u\n", psrperf);
> +
> + return 0;
> +}
> +
> static ssize_t
> i915_wedged_read(struct file *filp,
> char __user *ubuf,
> @@ -2228,6 +2261,7 @@ static struct drm_info_list i915_debugfs_list[] = {
> {"i915_swizzle_info", i915_swizzle_info, 0},
> {"i915_ppgtt_info", i915_ppgtt_info, 0},
> {"i915_dpio", i915_dpio_info, 0},
> + {"i915_edp_psr_status", i915_edp_psr_status, 0},
> };
> #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
>
> --
> 1.7.11.7
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2013-01-31 10:48 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-01-30 18:24 [PATCH 0/9] Enable eDP PSR functionality at HSW - v2 Rodrigo Vivi
2013-01-30 18:24 ` [PATCH 1/9] drm/i915: Organize VBT stuff inside drm_i915_private Rodrigo Vivi
2013-01-31 9:08 ` Jani Nikula
2013-01-30 18:24 ` [PATCH 2/9] drm/i915: Use cpu_transcoder for HSW_TVIDEO_DIP_* instead of pipe Rodrigo Vivi
2013-01-31 8:32 ` [Intel-gfx] " Jani Nikula
2013-01-31 20:26 ` Paulo Zanoni
2013-01-31 20:18 ` [Intel-gfx] " Paulo Zanoni
2013-01-30 18:24 ` [PATCH 3/9] drm/i915: Added SDP and VSC structures for handling PSR for eDP Rodrigo Vivi
2013-01-31 9:07 ` Jani Nikula
2013-01-30 18:24 ` [PATCH 4/9] drm/i915: Read the EDP DPCD and PSR Capability Rodrigo Vivi
2013-01-31 9:12 ` [Intel-gfx] " Jani Nikula
2013-01-30 18:24 ` [PATCH 5/9] drm/i915: Setup EDP PSR AUX Registers Rodrigo Vivi
2013-01-31 10:17 ` Jani Nikula
2013-01-31 21:35 ` Paulo Zanoni
2013-01-30 18:24 ` [PATCH 6/9] drm/i915: VBT Parsing for the PSR Feature Block for HSW Rodrigo Vivi
2013-01-30 18:24 ` [PATCH 7/9] drm/i915: Enable/Disable PSR on HSW Rodrigo Vivi
2013-01-31 10:40 ` Jani Nikula
2013-01-31 22:01 ` Paulo Zanoni
2013-01-30 18:24 ` [PATCH 8/9] drm/i915: Added debugfs support for PSR Status Rodrigo Vivi
2013-01-31 10:48 ` Jani Nikula [this message]
2013-01-30 18:24 ` [PATCH 9/9] drm/i915: Hook PSR functionality Rodrigo Vivi
2013-01-31 10:50 ` [Intel-gfx] " Jani Nikula
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=878v79eihb.fsf@intel.com \
--to=jani.nikula@linux.intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=rodrigo.vivi@gmail.com \
--cc=shobhit.kumar@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).