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From: Hyungwon Hwang <human.hwang@samsung.com>
To: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
	inki.dae@samsung.com, daniel@fooishbar.org
Cc: dh09.lee@samsung.com, sw0312.kim@samsung.com,
	Hyungwon Hwang <human.hwang@samsung.com>,
	cw00.choi@samsung.com
Subject: [PATCH v5 07/12] drm/exynos: dsi: make use of array for clock access
Date: Fri, 10 Apr 2015 14:55:25 +0900	[thread overview]
Message-ID: <1428645330-1043-8-git-send-email-human.hwang@samsung.com> (raw)
In-Reply-To: <1428645330-1043-1-git-send-email-human.hwang@samsung.com>

This patch make the driver to use an array for clock access. The number
of clocks are different from the existing MIPI DSI driver and Exynos5433
MIPI DSI driver. So this patch is needed before adding support for
Exynos5433 MIPI DSI driver.

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
---
Changes for v5:
- Newly added
 drivers/gpu/drm/exynos/exynos_drm_dsi.c | 64 +++++++++++++++------------------
 1 file changed, 29 insertions(+), 35 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
index 83e6798..b78d5f5 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
@@ -208,6 +208,8 @@
 					REG_ADDR((dsi), (reg_idx)))
 #define DSI_READ(dsi, reg_idx)		readl(REG_ADDR((dsi), (reg_idx)))

+static char *clk_names[2] = { "bus_clk", "sclk_mipi" };
+
 enum exynos_dsi_transfer_type {
 	EXYNOS_DSI_TX,
 	EXYNOS_DSI_RX,
@@ -256,8 +258,7 @@ struct exynos_dsi {

 	void __iomem *reg_base;
 	struct phy *phy;
-	struct clk *sclk_clk;
-	struct clk *bus_clk;
+	struct clk **clks;
 	struct regulator_bulk_data supplies[2];
 	int irq;
 	int te_gpio;
@@ -1383,7 +1384,8 @@ static const struct mipi_dsi_host_ops exynos_dsi_ops = {

 static int exynos_dsi_poweron(struct exynos_dsi *dsi)
 {
-	int ret;
+	struct exynos_dsi_driver_data *driver_data = dsi->driver_data;
+	int ret, i;

 	ret = regulator_bulk_enable(ARRAY_SIZE(dsi->supplies), dsi->supplies);
 	if (ret < 0) {
@@ -1391,31 +1393,23 @@ static int exynos_dsi_poweron(struct exynos_dsi *dsi)
 		return ret;
 	}

-	ret = clk_prepare_enable(dsi->bus_clk);
-	if (ret < 0) {
-		dev_err(dsi->dev, "cannot enable bus clock %d\n", ret);
-		goto err_bus_clk;
-	}
-
-	ret = clk_prepare_enable(dsi->sclk_clk);
-	if (ret < 0) {
-		dev_err(dsi->dev, "cannot enable pll clock %d\n", ret);
-		goto err_sclk_clk;
+	for (i = 0; i < driver_data->num_clks; i++) {
+		ret = clk_prepare_enable(dsi->clks[i]);
+		if (ret < 0)
+			goto err_clk;
 	}

 	ret = phy_power_on(dsi->phy);
 	if (ret < 0) {
 		dev_err(dsi->dev, "cannot enable phy %d\n", ret);
-		goto err_phy;
+		goto err_clk;
 	}

 	return 0;

-err_phy:
-	clk_disable_unprepare(dsi->sclk_clk);
-err_sclk_clk:
-	clk_disable_unprepare(dsi->bus_clk);
-err_bus_clk:
+err_clk:
+	while (--i > -1)
+		clk_disable_unprepare(dsi->clks[i]);
 	regulator_bulk_disable(ARRAY_SIZE(dsi->supplies), dsi->supplies);

 	return ret;
@@ -1423,7 +1417,8 @@ err_bus_clk:

 static void exynos_dsi_poweroff(struct exynos_dsi *dsi)
 {
-	int ret;
+	struct exynos_dsi_driver_data *driver_data = dsi->driver_data;
+	int ret, i;

 	usleep_range(10000, 20000);

@@ -1439,8 +1434,8 @@ static void exynos_dsi_poweroff(struct exynos_dsi *dsi)

 	phy_power_off(dsi->phy);

-	clk_disable_unprepare(dsi->sclk_clk);
-	clk_disable_unprepare(dsi->bus_clk);
+	for (i = driver_data->num_clks - 1; i > -1; i--)
+		clk_disable_unprepare(dsi->clks[i]);

 	ret = regulator_bulk_disable(ARRAY_SIZE(dsi->supplies), dsi->supplies);
 	if (ret < 0)
@@ -1762,7 +1757,7 @@ static int exynos_dsi_probe(struct platform_device *pdev)
 	struct device *dev = &pdev->dev;
 	struct resource *res;
 	struct exynos_dsi *dsi;
-	int ret;
+	int ret, i;

 	dsi = devm_kzalloc(dev, sizeof(*dsi), GFP_KERNEL);
 	if (!dsi)
@@ -1802,18 +1797,17 @@ static int exynos_dsi_probe(struct platform_device *pdev)
 		return -EPROBE_DEFER;
 	}

-	dsi->sclk_clk = devm_clk_get(dev, "sclk_mipi");
-	if (IS_ERR(dsi->sclk_clk)) {
-		dev_info(dev, "failed to get dsi sclk clock\n");
-		ret = PTR_ERR(dsi->sclk_clk);
-		goto err_del_component;
-	}
-
-	dsi->bus_clk = devm_clk_get(dev, "bus_clk");
-	if (IS_ERR(dsi->bus_clk)) {
-		dev_info(dev, "failed to get dsi bus clock\n");
-		ret = PTR_ERR(dsi->bus_clk);
-		goto err_del_component;
+	dsi->clks = devm_kzalloc(dev,
+			sizeof(*dsi->clks) * dsi->driver_data->num_clks,
+			GFP_KERNEL);
+	for (i = 0; i < dsi->driver_data->num_clks; i++) {
+		dsi->clks[i] = devm_clk_get(dev, clk_names[i]);
+		if (IS_ERR(dsi->clks[i])) {
+			dev_info(dev, "failed to get the clock: %s\n",
+								clk_names[i]);
+			ret = PTR_ERR(dsi->clks[i]);
+			goto err_del_component;
+		}
 	}

 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--
1.9.1

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  parent reply	other threads:[~2015-04-10  5:55 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-04-10  5:55 [PATCH v5 00/12] Add drivers for Exynos5433 display Hyungwon Hwang
     [not found] ` <1428645330-1043-1-git-send-email-human.hwang-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2015-04-10  5:55   ` [PATCH v5 01/12] drm/exynos: add Exynos5433 decon driver Hyungwon Hwang
     [not found]     ` <1428645330-1043-2-git-send-email-human.hwang-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2015-04-10  6:05       ` Varka Bhadram
2015-04-10  6:38         ` Hyungwon Hwang
2015-04-10  5:55   ` [PATCH v5 02/12] of: add helper for getting endpoint node of specific identifiers Hyungwon Hwang
2015-04-10  5:55   ` [PATCH v5 10/12] drm/exynos: dsi: add support for MIC driver as a bridge Hyungwon Hwang
2015-04-10  5:55 ` [PATCH v5 03/12] drm/exynos: mic: add MIC driver Hyungwon Hwang
2015-04-10  5:55 ` [PATCH v5 04/12] drm/exynos: dsi: rename pll_clk to sclk_clk Hyungwon Hwang
2015-04-15  1:24   ` Inki Dae
2015-04-10  5:55 ` [PATCH v5 05/12] drm/exynos: dsi: add macros for register access Hyungwon Hwang
2015-04-10  5:55 ` [PATCH v5 06/12] drm/exynos: dsi: make use of driver data for static values Hyungwon Hwang
2015-04-10  5:55 ` Hyungwon Hwang [this message]
2015-04-10  5:55 ` [PATCH v5 08/12] drm/exynos: dsi: add support for Exynos5433 Hyungwon Hwang
2015-04-10  5:55 ` [PATCH v5 09/12] drm/exynos: dsi: add the backward compatibility for the renamed clock Hyungwon Hwang
2015-04-10  5:55 ` [PATCH v5 11/12] drm/exynos: dsi: do not set TE GPIO direction by input Hyungwon Hwang
2015-04-10  5:55 ` [PATCH v5 12/12] ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi' Hyungwon Hwang

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