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From: Thomas Zimmermann <tzimmermann@suse.de>
To: airlied@redhat.com, jfalempe@redhat.com
Cc: dri-devel@lists.freedesktop.org, Thomas Zimmermann <tzimmermann@suse.de>
Subject: [PATCH 8/8] drm/ast: Only warn about unsupported TX chips on Gen4 and later
Date: Fri, 17 Jan 2025 11:29:13 +0100	[thread overview]
Message-ID: <20250117103450.28692-9-tzimmermann@suse.de> (raw)
In-Reply-To: <20250117103450.28692-1-tzimmermann@suse.de>

Only Gen4 and later read the installed TX chip from the SoC. So only
warn on those generations about unsupported chips.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
---
 drivers/gpu/drm/ast/ast_main.c | 40 +++++++++++++++++++---------------
 1 file changed, 22 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c
index b0d1b99ed532b..ba69280b33e78 100644
--- a/drivers/gpu/drm/ast/ast_main.c
+++ b/drivers/gpu/drm/ast/ast_main.c
@@ -78,21 +78,6 @@ static void ast_detect_tx_chip(struct ast_device *ast, bool need_post)
 	struct drm_device *dev = &ast->base;
 	u8 vgacra3, vgacrd1;
 
-	/*
-	 * Several of the listed TX chips are not explicitly supported
-	 * by the ast driver. If these exist in real-world devices, they
-	 * are most likely reported as VGA or SIL164 outputs. We warn here
-	 * to get bug reports for these devices. If none come in for some
-	 * time, we can begin to fail device probing on these values.
-	 */
-	vgacrd1 = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd1, AST_IO_VGACRD1_TX_TYPE_MASK);
-	drm_WARN(dev, vgacrd1 == AST_IO_VGACRD1_TX_ITE66121_VBIOS,
-		 "ITE IT66121 detected, 0x%x, Gen%lu\n", vgacrd1, AST_GEN(ast));
-	drm_WARN(dev, vgacrd1 == AST_IO_VGACRD1_TX_CH7003_VBIOS,
-		 "Chrontel CH7003 detected, 0x%x, Gen%lu\n", vgacrd1, AST_GEN(ast));
-	drm_WARN(dev, vgacrd1 == AST_IO_VGACRD1_TX_ANX9807_VBIOS,
-		 "Analogix ANX9807 detected, 0x%x, Gen%lu\n", vgacrd1, AST_GEN(ast));
-
 	/* Check 3rd Tx option (digital output afaik) */
 	ast->tx_chip = AST_TX_NONE;
 
@@ -116,9 +101,9 @@ static void ast_detect_tx_chip(struct ast_device *ast, bool need_post)
 		 * the SOC scratch register #1 bits 11:8 (interestingly marked
 		 * as "reserved" in the spec)
 		 */
-		jreg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd1,
-					      AST_IO_VGACRD1_TX_TYPE_MASK);
-		switch (jreg) {
+		vgacrd1 = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd1,
+						 AST_IO_VGACRD1_TX_TYPE_MASK);
+		switch (vgacrd1) {
 		/*
 		 * GEN4 to GEN6
 		 */
@@ -144,6 +129,25 @@ static void ast_detect_tx_chip(struct ast_device *ast, bool need_post)
 		case AST_IO_VGACRD1_TX_ASTDP:
 			ast->tx_chip = AST_TX_ASTDP;
 			break;
+		/*
+		 * Several of the listed TX chips are not explicitly supported
+		 * by the ast driver. If these exist in real-world devices, they
+		 * are most likely reported as VGA or SIL164 outputs. We warn here
+		 * to get bug reports for these devices. If none come in for some
+		 * time, we can begin to fail device probing on these values.
+		 */
+		case AST_IO_VGACRD1_TX_ITE66121_VBIOS:
+			drm_warn(dev, "ITE IT66121 detected, 0x%x, Gen%lu\n",
+				 vgacrd1, AST_GEN(ast));
+			break;
+		case AST_IO_VGACRD1_TX_CH7003_VBIOS:
+			drm_warn(dev, "Chrontel CH7003 detected, 0x%x, Gen%lu\n",
+				 vgacrd1, AST_GEN(ast));
+			break;
+		case AST_IO_VGACRD1_TX_ANX9807_VBIOS:
+			drm_warn(dev, "Analogix ANX9807 detected, 0x%x, Gen%lu\n",
+				 vgacrd1, AST_GEN(ast));
+			break;
 		}
 	}
 
-- 
2.47.1


  parent reply	other threads:[~2025-01-17 10:35 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-17 10:29 [PATCH 0/8] drm/ast: Reorganize TX-chip detection and init Thomas Zimmermann
2025-01-17 10:29 ` [PATCH 1/8] drm/ast: Detect wide-screen support before creating modeset pipeline Thomas Zimmermann
2025-01-20 10:34   ` Jocelyn Falempe
2025-01-17 10:29 ` [PATCH 2/8] drm/ast: Detect DRAM before TX-chip Thomas Zimmermann
2025-01-20 10:35   ` Jocelyn Falempe
2025-01-17 10:29 ` [PATCH 3/8] drm/ast: Refactor ast_post_gpu() by Gen Thomas Zimmermann
2025-01-20 10:35   ` Jocelyn Falempe
2025-01-17 10:29 ` [PATCH 4/8] drm/ast: Initialize ASTDP in ast_post_gpu() Thomas Zimmermann
2025-01-20 10:37   ` Jocelyn Falempe
2025-01-17 10:29 ` [PATCH 5/8] drm/ast: Hide Gens 1 to 3 TX detection in branch Thomas Zimmermann
2025-01-20 10:37   ` Jocelyn Falempe
2025-01-17 10:29 ` [PATCH 6/8] drm/ast: Align Gen1 DVO detection to register manual Thomas Zimmermann
2025-01-20 10:37   ` Jocelyn Falempe
2025-01-17 10:29 ` [PATCH 7/8] drm/ast: Merge TX-chip detection code for Gen4 and later Thomas Zimmermann
2025-01-20 10:37   ` Jocelyn Falempe
2025-01-17 10:29 ` Thomas Zimmermann [this message]
2025-01-20 10:37   ` [PATCH 8/8] drm/ast: Only warn about unsupported TX chips on " Jocelyn Falempe
2025-01-21 13:21     ` Thomas Zimmermann

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