Re: [PATCH 7/8] drm/ast: Merge TX-chip detection code for Gen4 and later

[Jocelyn Falempe <jfalempe@redhat.com>]

On 17/01/2025 11:29, Thomas Zimmermann wrote:
> Gens 4 to 6 and Gen7 use the same pattern for detecting the installed
> TX chips. Merge the code into a single branch.
> 

Thanks, it looks good to me.

Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com>
> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
> ---
>   drivers/gpu/drm/ast/ast_main.c | 17 +++++++++++------
>   1 file changed, 11 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c
> index 40d3b7770cf18..b0d1b99ed532b 100644
> --- a/drivers/gpu/drm/ast/ast_main.c
> +++ b/drivers/gpu/drm/ast/ast_main.c
> @@ -110,15 +110,18 @@ static void ast_detect_tx_chip(struct ast_device *ast, bool need_post)
>   			if (vgacra3 & AST_IO_VGACRA3_DVO_ENABLED)
>   				ast->tx_chip = AST_TX_SIL164;
>   		}
> -	} else if (IS_AST_GEN4(ast) || IS_AST_GEN5(ast) || IS_AST_GEN6(ast)) {
> +	} else {
>   		/*
> -		 * On AST GEN4+, look the configuration set by the SoC in
> +		 * On AST GEN4+, look at the configuration set by the SoC in
>   		 * the SOC scratch register #1 bits 11:8 (interestingly marked
>   		 * as "reserved" in the spec)
>   		 */
>   		jreg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd1,
>   					      AST_IO_VGACRD1_TX_TYPE_MASK);
>   		switch (jreg) {
> +		/*
> +		 * GEN4 to GEN6
> +		 */
>   		case AST_IO_VGACRD1_TX_SIL164_VBIOS:
>   			ast->tx_chip = AST_TX_SIL164;
>   			break;
> @@ -134,11 +137,13 @@ static void ast_detect_tx_chip(struct ast_device *ast, bool need_post)
>   			fallthrough;
>   		case AST_IO_VGACRD1_TX_FW_EMBEDDED_FW:
>   			ast->tx_chip = AST_TX_DP501;
> -		}
> -	} else if (IS_AST_GEN7(ast)) {
> -		if (ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd1, AST_IO_VGACRD1_TX_TYPE_MASK) ==
> -		    AST_IO_VGACRD1_TX_ASTDP) {
> +			break;
> +		/*
> +		 * GEN7+
> +		 */
> +		case AST_IO_VGACRD1_TX_ASTDP:
>   			ast->tx_chip = AST_TX_ASTDP;
> +			break;
>   		}
>   	}
>