[igt-dev] [PATCH 0/3] Add support for fp16 formats

[igt-dev] [PATCH 0/3] Add support for fp16 formats

[Kevin Strasser]

Kernel support for these formats has landed in drm-next.
This series adds a library for converting floats to and from fp16 which enables
a couple of tests to use the new formats.

fp16 coverage is included in these tests:
  kms_plane_scaling
  kms_rotation_crc

Kevin Strasser (3):
  lib: Add halffloat implementation
  lib/igt_fb: Add support for fp16 formats through conversion
  tests/kms_plane_scaling: Skip testing unsupported fp16 features

 COPYING                   |  22 +++++
 lib/Makefile.sources      |   2 +
 lib/igt_fb.c              | 148 ++++++++++++++++++++++++++++-
 lib/igt_fb.h              |   1 +
 lib/igt_halffloat.c       | 234 ++++++++++++++++++++++++++++++++++++++++++++++
 lib/igt_halffloat.h       |  27 ++++++
 lib/igt_x86.c             |   9 ++
 lib/igt_x86.h             |   1 +
 lib/meson.build           |   1 +
 tests/kms_plane_scaling.c |  14 ++-
 10 files changed, 456 insertions(+), 3 deletions(-)
 create mode 100644 lib/igt_halffloat.c
 create mode 100644 lib/igt_halffloat.h

-- 
2.7.4

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[igt-dev] [PATCH 1/3] lib: Add halffloat implementation

[Kevin Strasser]

Probe for and make an API available for tests to use f16c intrinsics to
generate needed fp16 pixel data.

Also import a pure c fp32 <-> fp16 conversion implementation from Mesa
18.3.4, which will act as a fallback when f16c is unavailable.

rfc2:
- Change API to reduce number of function calls (Maarten)

v1:
- Move pragma so AVX code isn't emitted for fallbacks (Ville)
- Change edx to ecx (Ville)

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 COPYING              |  22 +++++
 lib/Makefile.sources |   2 +
 lib/igt_halffloat.c  | 234 +++++++++++++++++++++++++++++++++++++++++++++++++++
 lib/igt_halffloat.h  |  27 ++++++
 lib/igt_x86.c        |   9 ++
 lib/igt_x86.h        |   1 +
 lib/meson.build      |   1 +
 7 files changed, 296 insertions(+)
 create mode 100644 lib/igt_halffloat.c
 create mode 100644 lib/igt_halffloat.h

diff --git a/COPYING b/COPYING
index 29e0238..0fe6584 100644
--- a/COPYING
+++ b/COPYING
@@ -126,3 +126,25 @@ SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+
+Copyright (C) 1999-2007  Brian Paul   All Rights Reserved.
+Copyright 2015 Philip Taylor <philip@zaynar.co.uk>
+Copyright 2018 Advanced Micro Devices, Inc.
+
+Permission is hereby granted, free of charge, to any person obtaining a
+copy of this software and associated documentation files (the "Software"),
+to deal in the Software without restriction, including without limitation
+the rights to use, copy, modify, merge, publish, distribute, sublicense,
+and/or sell copies of the Software, and to permit persons to whom the
+Software is furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included
+in all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+OTHER DEALINGS IN THE SOFTWARE.
diff --git a/lib/Makefile.sources b/lib/Makefile.sources
index e00347f..84d14c9 100644
--- a/lib/Makefile.sources
+++ b/lib/Makefile.sources
@@ -32,6 +32,8 @@ lib_source_list =	 	\
 	igt_gt.h		\
 	igt_gvt.c		\
 	igt_gvt.h		\
+	igt_halffloat.c		\
+	igt_halffloat.h		\
 	igt_matrix.c		\
 	igt_matrix.h		\
 	igt_primes.c		\
diff --git a/lib/igt_halffloat.c b/lib/igt_halffloat.c
new file mode 100644
index 0000000..263b28c
--- /dev/null
+++ b/lib/igt_halffloat.c
@@ -0,0 +1,234 @@
+/*
+ * Copyright (C) 1999-2007  Brian Paul   All Rights Reserved.
+ * Copyright 2015 Philip Taylor <philip@zaynar.co.uk>
+ * Copyright 2018 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <assert.h>
+#include <math.h>
+
+#include "igt_halffloat.h"
+#include "igt_x86.h"
+
+typedef union { float f; int32_t i; uint32_t u; } fi_type;
+
+/**
+ * Convert a 4-byte float to a 2-byte half float.
+ *
+ * Not all float32 values can be represented exactly as a float16 value. We
+ * round such intermediate float32 values to the nearest float16. When the
+ * float32 lies exactly between to float16 values, we round to the one with
+ * an even mantissa.
+ *
+ * This rounding behavior has several benefits:
+ *   - It has no sign bias.
+ *
+ *   - It reproduces the behavior of real hardware: opcode F32TO16 in Intel's
+ *     GPU ISA.
+ *
+ *   - By reproducing the behavior of the GPU (at least on Intel hardware),
+ *     compile-time evaluation of constant packHalf2x16 GLSL expressions will
+ *     result in the same value as if the expression were executed on the GPU.
+ */
+static inline uint16_t _float_to_half(float val)
+{
+	const fi_type fi = {val};
+	const int flt_m = fi.i & 0x7fffff;
+	const int flt_e = (fi.i >> 23) & 0xff;
+	const int flt_s = (fi.i >> 31) & 0x1;
+	int s, e, m = 0;
+	uint16_t result;
+
+	/* sign bit */
+	s = flt_s;
+
+	/* handle special cases */
+	if ((flt_e == 0) && (flt_m == 0)) {
+		/* zero */
+		/* m = 0; - already set */
+		e = 0;
+	} else if ((flt_e == 0) && (flt_m != 0)) {
+		/* denorm -- denorm float maps to 0 half */
+		/* m = 0; - already set */
+		e = 0;
+	} else if ((flt_e == 0xff) && (flt_m == 0)) {
+		/* infinity */
+		/* m = 0; - already set */
+		e = 31;
+	} else if ((flt_e == 0xff) && (flt_m != 0)) {
+		/* NaN */
+		m = 1;
+		e = 31;
+	} else {
+		/* regular number */
+		const int new_exp = flt_e - 127;
+		if (new_exp < -14) {
+			/* The float32 lies in the range (0.0, min_normal16) and
+			 * is rounded to a nearby float16 value. The result will
+			 * be either zero, subnormal, or normal.
+			 */
+			e = 0;
+			m = lrintf((1 << 24) * fabsf(fi.f));
+		} else if (new_exp > 15) {
+			/* map this value to infinity */
+			/* m = 0; - already set */
+			e = 31;
+		} else {
+			/* The float32 lies in the range
+			 *   [min_normal16, max_normal16 + max_step16)
+			 * and is rounded to a nearby float16 value. The result
+			 * will be either normal or infinite.
+			 */
+			e = new_exp + 15;
+			m = lrintf(flt_m / (float)(1 << 13));
+		}
+	}
+
+	assert(0 <= m && m <= 1024);
+	if (m == 1024) {
+		/* The float32 was rounded upwards into the range of the next
+		 * exponent, so bump the exponent. This correctly handles the
+		 * case where f32 should be rounded up to float16 infinity.
+		 */
+		++e;
+		m = 0;
+	}
+
+	result = (s << 15) | (e << 10) | m;
+	return result;
+}
+
+/**
+ * Convert a 2-byte half float to a 4-byte float.
+ * Based on code from:
+ * http://www.opengl.org/discussion_boards/ubb/Forum3/HTML/008786.html
+ */
+static inline float _half_to_float(uint16_t val)
+{
+	/* XXX could also use a 64K-entry lookup table */
+	const int m = val & 0x3ff;
+	const int e = (val >> 10) & 0x1f;
+	const int s = (val >> 15) & 0x1;
+	int flt_m, flt_e, flt_s;
+	fi_type fi;
+
+	/* sign bit */
+	flt_s = s;
+
+	/* handle special cases */
+	if ((e == 0) && (m == 0)) {
+		/* zero */
+		flt_m = 0;
+		flt_e = 0;
+	} else if ((e == 0) && (m != 0)) {
+		/* denorm -- denorm half will fit in non-denorm single */
+		const float half_denorm = 1.0f / 16384.0f; /* 2^-14 */
+		float mantissa = ((float) (m)) / 1024.0f;
+		float sign = s ? -1.0f : 1.0f;
+		return sign * mantissa * half_denorm;
+	} else if ((e == 31) && (m == 0)) {
+		/* infinity */
+		flt_e = 0xff;
+		flt_m = 0;
+	} else if ((e == 31) && (m != 0)) {
+		/* NaN */
+		flt_e = 0xff;
+		flt_m = 1;
+	} else {
+		/* regular */
+		flt_e = e + 112;
+		flt_m = m << 13;
+	}
+
+	fi.i = (flt_s << 31) | (flt_e << 23) | flt_m;
+	return fi.f;
+}
+
+#if defined(__x86_64__) && !defined(__clang__)
+#pragma GCC push_options
+#pragma GCC target("f16c")
+
+#include <immintrin.h>
+
+static void float_to_half_f16c(const float *f, uint16_t *h, unsigned int num)
+{
+	for (int i = 0; i < num; i++)
+		h[i] = _cvtss_sh(f[i], 0);
+}
+
+static void half_to_float_f16c(const uint16_t *h, float *f, unsigned int num)
+{
+	for (int i = 0; i < num; i++)
+		f[i] = _cvtsh_ss(h[i]);
+}
+
+#pragma GCC pop_options
+
+static void float_to_half(const float *f, uint16_t *h, unsigned int num)
+{
+	for (int i = 0; i < num; i++)
+		h[i] = _float_to_half(f[i]);
+}
+
+static void half_to_float(const uint16_t *h, float *f, unsigned int num)
+{
+	for (int i = 0; i < num; i++)
+		f[i] = _half_to_float(h[i]);
+}
+
+static void (*resolve_float_to_half(void))(const float *f, uint16_t *h, unsigned int num)
+{
+	if (igt_x86_features() & F16C)
+		return float_to_half_f16c;
+
+	return float_to_half;
+}
+
+void igt_float_to_half(const float *f, uint16_t *h, unsigned int num)
+	__attribute__((ifunc("resolve_float_to_half")));
+
+static void (*resolve_half_to_float(void))(const uint16_t *h, float *f, unsigned int num)
+{
+	if (igt_x86_features() & F16C)
+		return half_to_float_f16c;
+
+	return half_to_float;
+}
+
+void igt_half_to_float(const uint16_t *h, float *f, unsigned int num)
+	__attribute__((ifunc("resolve_half_to_float")));
+
+#else
+
+void igt_float_to_half(const float *f, uint16_t *h, unsigned int num)
+{
+	for (int i = 0; i < num; i++)
+		h[i] = _float_to_half(f[i]);
+}
+
+float igt_half_to_float(const uint16_t *h, float *f, unsigned int num)
+{
+	for (int i = 0; i < num; i++)
+		f[i] = _half_to_float(h[i]);
+}
+
+#endif
+
diff --git a/lib/igt_halffloat.h b/lib/igt_halffloat.h
new file mode 100644
index 0000000..8db448a
--- /dev/null
+++ b/lib/igt_halffloat.h
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 1999-2007  Brian Paul   All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <stdint.h>
+
+void igt_float_to_half(const float *f, uint16_t *h, unsigned int num);
+void igt_half_to_float(const uint16_t *h, float *f, unsigned int num);
+
diff --git a/lib/igt_x86.c b/lib/igt_x86.c
index 88e514d..6ac700d 100644
--- a/lib/igt_x86.c
+++ b/lib/igt_x86.c
@@ -88,6 +88,10 @@
 #define bit_AVX		(1 << 28)
 #endif
 
+#ifndef bit_F16C
+#define bit_F16C	(1 << 29)
+#endif
+
 #ifndef bit_AVX2
 #define bit_AVX2	(1<<5)
 #endif
@@ -138,6 +142,9 @@ unsigned igt_x86_features(void)
 
 		if (edx & bit_SSE2)
 			features |= SSE2;
+
+		if (ecx & bit_F16C)
+			features |= F16C;
 	}
 
 	if (max >= 7) {
@@ -174,6 +181,8 @@ char *igt_x86_features_to_string(unsigned features, char *line)
 		line += sprintf(line, ", avx");
 	if (features & AVX2)
 		line += sprintf(line, ", avx2");
+	if (features & F16C)
+		line += sprintf(line, ", f16c");
 
 	(void)line;
 
diff --git a/lib/igt_x86.h b/lib/igt_x86.h
index d4f8c34..c7b84de 100644
--- a/lib/igt_x86.h
+++ b/lib/igt_x86.h
@@ -39,6 +39,7 @@
 #define SSE4_2	0x40
 #define AVX	0x80
 #define AVX2	0x100
+#define F16C	0x200
 
 #if defined(__x86_64__) || defined(__i386__)
 unsigned igt_x86_features(void);
diff --git a/lib/meson.build b/lib/meson.build
index 89de06e..a12a8f9 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -12,6 +12,7 @@ lib_sources = [
 	'igt_gpu_power.c',
 	'igt_gt.c',
 	'igt_gvt.c',
+	'igt_halffloat.c',
 	'igt_matrix.c',
 	'igt_perf.c',
 	'igt_primes.c',
-- 
2.7.4

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Re: [igt-dev] [PATCH 1/3] lib: Add halffloat implementation

[Daniel Vetter]

On Fri, Apr 05, 2019 at 01:14:03PM -0700, Kevin Strasser wrote:
> Probe for and make an API available for tests to use f16c intrinsics to
> generate needed fp16 pixel data.
> 
> Also import a pure c fp32 <-> fp16 conversion implementation from Mesa
> 18.3.4, which will act as a fallback when f16c is unavailable.
> 
> rfc2:
> - Change API to reduce number of function calls (Maarten)
> 
> v1:
> - Move pragma so AVX code isn't emitted for fallbacks (Ville)
> - Change edx to ecx (Ville)
> 
> Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

btw this broke the build, and someone else got to fix it up for you:

commit 11e10bc575516c56978640fcc697c27f277c660a
Author: Simon Ser <simon.ser@intel.com>
Date:   Wed Apr 24 10:01:29 2019 +0300

    lib/igt_halffloat: fix compilation with Clang

Cheers, Daniel
> ---
>  COPYING              |  22 +++++
>  lib/Makefile.sources |   2 +
>  lib/igt_halffloat.c  | 234 +++++++++++++++++++++++++++++++++++++++++++++++++++
>  lib/igt_halffloat.h  |  27 ++++++
>  lib/igt_x86.c        |   9 ++
>  lib/igt_x86.h        |   1 +
>  lib/meson.build      |   1 +
>  7 files changed, 296 insertions(+)
>  create mode 100644 lib/igt_halffloat.c
>  create mode 100644 lib/igt_halffloat.h
> 
> diff --git a/COPYING b/COPYING
> index 29e0238..0fe6584 100644
> --- a/COPYING
> +++ b/COPYING
> @@ -126,3 +126,25 @@ SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
>  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
>  ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
>  OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> +
> +Copyright (C) 1999-2007  Brian Paul   All Rights Reserved.
> +Copyright 2015 Philip Taylor <philip@zaynar.co.uk>
> +Copyright 2018 Advanced Micro Devices, Inc.
> +
> +Permission is hereby granted, free of charge, to any person obtaining a
> +copy of this software and associated documentation files (the "Software"),
> +to deal in the Software without restriction, including without limitation
> +the rights to use, copy, modify, merge, publish, distribute, sublicense,
> +and/or sell copies of the Software, and to permit persons to whom the
> +Software is furnished to do so, subject to the following conditions:
> +
> +The above copyright notice and this permission notice shall be included
> +in all copies or substantial portions of the Software.
> +
> +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
> +OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> +THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
> +OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> +ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> +OTHER DEALINGS IN THE SOFTWARE.
> diff --git a/lib/Makefile.sources b/lib/Makefile.sources
> index e00347f..84d14c9 100644
> --- a/lib/Makefile.sources
> +++ b/lib/Makefile.sources
> @@ -32,6 +32,8 @@ lib_source_list =	 	\
>  	igt_gt.h		\
>  	igt_gvt.c		\
>  	igt_gvt.h		\
> +	igt_halffloat.c		\
> +	igt_halffloat.h		\
>  	igt_matrix.c		\
>  	igt_matrix.h		\
>  	igt_primes.c		\
> diff --git a/lib/igt_halffloat.c b/lib/igt_halffloat.c
> new file mode 100644
> index 0000000..263b28c
> --- /dev/null
> +++ b/lib/igt_halffloat.c
> @@ -0,0 +1,234 @@
> +/*
> + * Copyright (C) 1999-2007  Brian Paul   All Rights Reserved.
> + * Copyright 2015 Philip Taylor <philip@zaynar.co.uk>
> + * Copyright 2018 Advanced Micro Devices, Inc.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included
> + * in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
> + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include <assert.h>
> +#include <math.h>
> +
> +#include "igt_halffloat.h"
> +#include "igt_x86.h"
> +
> +typedef union { float f; int32_t i; uint32_t u; } fi_type;
> +
> +/**
> + * Convert a 4-byte float to a 2-byte half float.
> + *
> + * Not all float32 values can be represented exactly as a float16 value. We
> + * round such intermediate float32 values to the nearest float16. When the
> + * float32 lies exactly between to float16 values, we round to the one with
> + * an even mantissa.
> + *
> + * This rounding behavior has several benefits:
> + *   - It has no sign bias.
> + *
> + *   - It reproduces the behavior of real hardware: opcode F32TO16 in Intel's
> + *     GPU ISA.
> + *
> + *   - By reproducing the behavior of the GPU (at least on Intel hardware),
> + *     compile-time evaluation of constant packHalf2x16 GLSL expressions will
> + *     result in the same value as if the expression were executed on the GPU.
> + */
> +static inline uint16_t _float_to_half(float val)
> +{
> +	const fi_type fi = {val};
> +	const int flt_m = fi.i & 0x7fffff;
> +	const int flt_e = (fi.i >> 23) & 0xff;
> +	const int flt_s = (fi.i >> 31) & 0x1;
> +	int s, e, m = 0;
> +	uint16_t result;
> +
> +	/* sign bit */
> +	s = flt_s;
> +
> +	/* handle special cases */
> +	if ((flt_e == 0) && (flt_m == 0)) {
> +		/* zero */
> +		/* m = 0; - already set */
> +		e = 0;
> +	} else if ((flt_e == 0) && (flt_m != 0)) {
> +		/* denorm -- denorm float maps to 0 half */
> +		/* m = 0; - already set */
> +		e = 0;
> +	} else if ((flt_e == 0xff) && (flt_m == 0)) {
> +		/* infinity */
> +		/* m = 0; - already set */
> +		e = 31;
> +	} else if ((flt_e == 0xff) && (flt_m != 0)) {
> +		/* NaN */
> +		m = 1;
> +		e = 31;
> +	} else {
> +		/* regular number */
> +		const int new_exp = flt_e - 127;
> +		if (new_exp < -14) {
> +			/* The float32 lies in the range (0.0, min_normal16) and
> +			 * is rounded to a nearby float16 value. The result will
> +			 * be either zero, subnormal, or normal.
> +			 */
> +			e = 0;
> +			m = lrintf((1 << 24) * fabsf(fi.f));
> +		} else if (new_exp > 15) {
> +			/* map this value to infinity */
> +			/* m = 0; - already set */
> +			e = 31;
> +		} else {
> +			/* The float32 lies in the range
> +			 *   [min_normal16, max_normal16 + max_step16)
> +			 * and is rounded to a nearby float16 value. The result
> +			 * will be either normal or infinite.
> +			 */
> +			e = new_exp + 15;
> +			m = lrintf(flt_m / (float)(1 << 13));
> +		}
> +	}
> +
> +	assert(0 <= m && m <= 1024);
> +	if (m == 1024) {
> +		/* The float32 was rounded upwards into the range of the next
> +		 * exponent, so bump the exponent. This correctly handles the
> +		 * case where f32 should be rounded up to float16 infinity.
> +		 */
> +		++e;
> +		m = 0;
> +	}
> +
> +	result = (s << 15) | (e << 10) | m;
> +	return result;
> +}
> +
> +/**
> + * Convert a 2-byte half float to a 4-byte float.
> + * Based on code from:
> + * http://www.opengl.org/discussion_boards/ubb/Forum3/HTML/008786.html
> + */
> +static inline float _half_to_float(uint16_t val)
> +{
> +	/* XXX could also use a 64K-entry lookup table */
> +	const int m = val & 0x3ff;
> +	const int e = (val >> 10) & 0x1f;
> +	const int s = (val >> 15) & 0x1;
> +	int flt_m, flt_e, flt_s;
> +	fi_type fi;
> +
> +	/* sign bit */
> +	flt_s = s;
> +
> +	/* handle special cases */
> +	if ((e == 0) && (m == 0)) {
> +		/* zero */
> +		flt_m = 0;
> +		flt_e = 0;
> +	} else if ((e == 0) && (m != 0)) {
> +		/* denorm -- denorm half will fit in non-denorm single */
> +		const float half_denorm = 1.0f / 16384.0f; /* 2^-14 */
> +		float mantissa = ((float) (m)) / 1024.0f;
> +		float sign = s ? -1.0f : 1.0f;
> +		return sign * mantissa * half_denorm;
> +	} else if ((e == 31) && (m == 0)) {
> +		/* infinity */
> +		flt_e = 0xff;
> +		flt_m = 0;
> +	} else if ((e == 31) && (m != 0)) {
> +		/* NaN */
> +		flt_e = 0xff;
> +		flt_m = 1;
> +	} else {
> +		/* regular */
> +		flt_e = e + 112;
> +		flt_m = m << 13;
> +	}
> +
> +	fi.i = (flt_s << 31) | (flt_e << 23) | flt_m;
> +	return fi.f;
> +}
> +
> +#if defined(__x86_64__) && !defined(__clang__)
> +#pragma GCC push_options
> +#pragma GCC target("f16c")
> +
> +#include <immintrin.h>
> +
> +static void float_to_half_f16c(const float *f, uint16_t *h, unsigned int num)
> +{
> +	for (int i = 0; i < num; i++)
> +		h[i] = _cvtss_sh(f[i], 0);
> +}
> +
> +static void half_to_float_f16c(const uint16_t *h, float *f, unsigned int num)
> +{
> +	for (int i = 0; i < num; i++)
> +		f[i] = _cvtsh_ss(h[i]);
> +}
> +
> +#pragma GCC pop_options
> +
> +static void float_to_half(const float *f, uint16_t *h, unsigned int num)
> +{
> +	for (int i = 0; i < num; i++)
> +		h[i] = _float_to_half(f[i]);
> +}
> +
> +static void half_to_float(const uint16_t *h, float *f, unsigned int num)
> +{
> +	for (int i = 0; i < num; i++)
> +		f[i] = _half_to_float(h[i]);
> +}
> +
> +static void (*resolve_float_to_half(void))(const float *f, uint16_t *h, unsigned int num)
> +{
> +	if (igt_x86_features() & F16C)
> +		return float_to_half_f16c;
> +
> +	return float_to_half;
> +}
> +
> +void igt_float_to_half(const float *f, uint16_t *h, unsigned int num)
> +	__attribute__((ifunc("resolve_float_to_half")));
> +
> +static void (*resolve_half_to_float(void))(const uint16_t *h, float *f, unsigned int num)
> +{
> +	if (igt_x86_features() & F16C)
> +		return half_to_float_f16c;
> +
> +	return half_to_float;
> +}
> +
> +void igt_half_to_float(const uint16_t *h, float *f, unsigned int num)
> +	__attribute__((ifunc("resolve_half_to_float")));
> +
> +#else
> +
> +void igt_float_to_half(const float *f, uint16_t *h, unsigned int num)
> +{
> +	for (int i = 0; i < num; i++)
> +		h[i] = _float_to_half(f[i]);
> +}
> +
> +float igt_half_to_float(const uint16_t *h, float *f, unsigned int num)
> +{
> +	for (int i = 0; i < num; i++)
> +		f[i] = _half_to_float(h[i]);
> +}
> +
> +#endif
> +
> diff --git a/lib/igt_halffloat.h b/lib/igt_halffloat.h
> new file mode 100644
> index 0000000..8db448a
> --- /dev/null
> +++ b/lib/igt_halffloat.h
> @@ -0,0 +1,27 @@
> +/*
> + * Copyright (C) 1999-2007  Brian Paul   All Rights Reserved.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included
> + * in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
> + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include <stdint.h>
> +
> +void igt_float_to_half(const float *f, uint16_t *h, unsigned int num);
> +void igt_half_to_float(const uint16_t *h, float *f, unsigned int num);
> +
> diff --git a/lib/igt_x86.c b/lib/igt_x86.c
> index 88e514d..6ac700d 100644
> --- a/lib/igt_x86.c
> +++ b/lib/igt_x86.c
> @@ -88,6 +88,10 @@
>  #define bit_AVX		(1 << 28)
>  #endif
>  
> +#ifndef bit_F16C
> +#define bit_F16C	(1 << 29)
> +#endif
> +
>  #ifndef bit_AVX2
>  #define bit_AVX2	(1<<5)
>  #endif
> @@ -138,6 +142,9 @@ unsigned igt_x86_features(void)
>  
>  		if (edx & bit_SSE2)
>  			features |= SSE2;
> +
> +		if (ecx & bit_F16C)
> +			features |= F16C;
>  	}
>  
>  	if (max >= 7) {
> @@ -174,6 +181,8 @@ char *igt_x86_features_to_string(unsigned features, char *line)
>  		line += sprintf(line, ", avx");
>  	if (features & AVX2)
>  		line += sprintf(line, ", avx2");
> +	if (features & F16C)
> +		line += sprintf(line, ", f16c");
>  
>  	(void)line;
>  
> diff --git a/lib/igt_x86.h b/lib/igt_x86.h
> index d4f8c34..c7b84de 100644
> --- a/lib/igt_x86.h
> +++ b/lib/igt_x86.h
> @@ -39,6 +39,7 @@
>  #define SSE4_2	0x40
>  #define AVX	0x80
>  #define AVX2	0x100
> +#define F16C	0x200
>  
>  #if defined(__x86_64__) || defined(__i386__)
>  unsigned igt_x86_features(void);
> diff --git a/lib/meson.build b/lib/meson.build
> index 89de06e..a12a8f9 100644
> --- a/lib/meson.build
> +++ b/lib/meson.build
> @@ -12,6 +12,7 @@ lib_sources = [
>  	'igt_gpu_power.c',
>  	'igt_gt.c',
>  	'igt_gvt.c',
> +	'igt_halffloat.c',
>  	'igt_matrix.c',
>  	'igt_perf.c',
>  	'igt_primes.c',
> -- 
> 2.7.4
> 
> _______________________________________________
> igt-dev mailing list
> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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igt-dev mailing list
igt-dev@lists.freedesktop.org
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Re: [igt-dev] [PATCH 1/3] lib: Add halffloat implementation

[Ville Syrjälä]

On Wed, Apr 24, 2019 at 10:05:28PM +0200, Daniel Vetter wrote:
> On Fri, Apr 05, 2019 at 01:14:03PM -0700, Kevin Strasser wrote:
> > Probe for and make an API available for tests to use f16c intrinsics to
> > generate needed fp16 pixel data.
> > 
> > Also import a pure c fp32 <-> fp16 conversion implementation from Mesa
> > 18.3.4, which will act as a fallback when f16c is unavailable.
> > 
> > rfc2:
> > - Change API to reduce number of function calls (Maarten)
> > 
> > v1:
> > - Move pragma so AVX code isn't emitted for fallbacks (Ville)
> > - Change edx to ecx (Ville)
> > 
> > Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
> > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> btw this broke the build, and someone else got to fix it up for you:
> 
> commit 11e10bc575516c56978640fcc697c27f277c660a
> Author: Simon Ser <simon.ser@intel.com>
> Date:   Wed Apr 24 10:01:29 2019 +0300
> 
>     lib/igt_halffloat: fix compilation with Clang

Since when is building with clang a requirement?

-- 
Ville Syrjälä
Intel
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Re: [igt-dev] [PATCH 1/3] lib: Add halffloat implementation

[Strasser, Kevin]

Ville Syrjälä wrote:
> On Wed, Apr 24, 2019 at 10:05:28PM +0200, Daniel Vetter wrote:
> > On Fri, Apr 05, 2019 at 01:14:03PM -0700, Kevin Strasser wrote:
> > > Probe for and make an API available for tests to use f16c intrinsics
> > > to generate needed fp16 pixel data.
> > >
> > > Also import a pure c fp32 <-> fp16 conversion implementation from
> > > Mesa 18.3.4, which will act as a fallback when f16c is unavailable.
> > >
> > > rfc2:
> > > - Change API to reduce number of function calls (Maarten)
> > >
> > > v1:
> > > - Move pragma so AVX code isn't emitted for fallbacks (Ville)
> > > - Change edx to ecx (Ville)
> > >
> > > Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
> > > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > btw this broke the build, and someone else got to fix it up for you:
> >
> > commit 11e10bc575516c56978640fcc697c27f277c660a
> > Author: Simon Ser <simon.ser@intel.com>
> > Date:   Wed Apr 24 10:01:29 2019 +0300
> >
> >     lib/igt_halffloat: fix compilation with Clang
> 
> Since when is building with clang a requirement?

I didn't realize clang was a requirement either, but I should've known
better as it does seem to be a pattern across fdo projects.

Thanks for the fix, Simon!

-Kevin
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Re: [igt-dev] [PATCH 1/3] lib: Add halffloat implementation

[Daniel Vetter]

On Wed, Apr 24, 2019 at 08:43:55PM +0000, Strasser, Kevin wrote:
> Ville Syrjälä wrote:
> > On Wed, Apr 24, 2019 at 10:05:28PM +0200, Daniel Vetter wrote:
> > > On Fri, Apr 05, 2019 at 01:14:03PM -0700, Kevin Strasser wrote:
> > > > Probe for and make an API available for tests to use f16c intrinsics
> > > > to generate needed fp16 pixel data.
> > > >
> > > > Also import a pure c fp32 <-> fp16 conversion implementation from
> > > > Mesa 18.3.4, which will act as a fallback when f16c is unavailable.
> > > >
> > > > rfc2:
> > > > - Change API to reduce number of function calls (Maarten)
> > > >
> > > > v1:
> > > > - Move pragma so AVX code isn't emitted for fallbacks (Ville)
> > > > - Change edx to ecx (Ville)
> > > >
> > > > Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
> > > > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > >
> > > btw this broke the build, and someone else got to fix it up for you:
> > >
> > > commit 11e10bc575516c56978640fcc697c27f277c660a
> > > Author: Simon Ser <simon.ser@intel.com>
> > > Date:   Wed Apr 24 10:01:29 2019 +0300
> > >
> > >     lib/igt_halffloat: fix compilation with Clang
> > 
> > Since when is building with clang a requirement?
> 
> I didn't realize clang was a requirement either, but I should've known
> better as it does seem to be a pattern across fdo projects.
> 
> Thanks for the fix, Simon!

I have no idea why someone put clang into the commit message, it's non-x86
builds that broke.

You folks really should read the gitlab CI mails, and if you don't get
them, figure  out why ...
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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[igt-dev] [PATCH 2/3] lib/igt_fb: Add support for fp16 formats through conversion

[Kevin Strasser]

Follow design of P01x conversion to support tests needing pixel data in fp16
(half float 64 bpp).

rfc2:
- Convert whole rows of pixels if possible (Maarten)
- Treat rgbx like rgba, let hardware ignore alpha (Maarten)

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 lib/igt_fb.c | 148 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
 lib/igt_fb.h |   1 +
 2 files changed, 148 insertions(+), 1 deletion(-)

diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index 6adf422..72e366a 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -35,6 +35,7 @@
 #include "igt_aux.h"
 #include "igt_color_encoding.h"
 #include "igt_fb.h"
+#include "igt_halffloat.h"
 #include "igt_kms.h"
 #include "igt_matrix.h"
 #include "igt_vc4.h"
@@ -161,6 +162,22 @@ static const struct format_desc_struct {
 	  .num_planes = 1, .plane_bpp = { 32, },
 	  .hsub = 1, .vsub = 1,
 	},
+	{ .name = "XRGB16161616F", .depth = -1, .drm_id = DRM_FORMAT_XRGB16161616F,
+	  .cairo_id = CAIRO_FORMAT_RGBA128F,
+	  .num_planes = 1, .plane_bpp = { 64, },
+	},
+	{ .name = "ARGB16161616F", .depth = -1, .drm_id = DRM_FORMAT_ARGB16161616F,
+	  .cairo_id = CAIRO_FORMAT_RGBA128F,
+	  .num_planes = 1, .plane_bpp = { 64, },
+	},
+	{ .name = "XBGR16161616F", .depth = -1, .drm_id = DRM_FORMAT_XBGR16161616F,
+	  .cairo_id = CAIRO_FORMAT_RGBA128F,
+	  .num_planes = 1, .plane_bpp = { 64, },
+	},
+	{ .name = "ABGR16161616F", .depth = -1, .drm_id = DRM_FORMAT_ABGR16161616F,
+	  .cairo_id = CAIRO_FORMAT_RGBA128F,
+	  .num_planes = 1, .plane_bpp = { 64, },
+	},
 	{ .name = "NV12", .depth = -1, .drm_id = DRM_FORMAT_NV12,
 	  .cairo_id = CAIRO_FORMAT_RGB24,
 	  .num_planes = 2, .plane_bpp = { 8, 16, },
@@ -763,7 +780,8 @@ static int create_bo_for_fb(struct igt_fb *fb)
 	 * them, so we need to make sure to use a device BO then.
 	 */
 	if (fb->modifier || fb->size || fb->strides[0] ||
-	    (is_i915_device(fd) && igt_format_is_yuv(fb->drm_format)))
+	    (is_i915_device(fd) && igt_format_is_yuv(fb->drm_format)) ||
+	    (is_i915_device(fd) && igt_format_is_fp16(fb->drm_format)))
 		device_bo = true;
 
 	/* Sets offets and stride if necessary. */
@@ -2557,6 +2575,102 @@ static void convert_float_to_Y410(struct fb_convert *cvt, bool alpha)
 	}
 }
 
+/* { R, G, B, X } */
+static const unsigned char swizzle_rgbx[] = { 0, 1, 2, 3 };
+static const unsigned char swizzle_bgrx[] = { 2, 1, 0, 3 };
+
+static const unsigned char *rgbx_swizzle(uint32_t format)
+{
+	switch (format) {
+	default:
+	case DRM_FORMAT_XRGB16161616F:
+	case DRM_FORMAT_ARGB16161616F:
+		return swizzle_bgrx;
+	case DRM_FORMAT_XBGR16161616F:
+	case DRM_FORMAT_ABGR16161616F:
+		return swizzle_rgbx;
+	}
+}
+
+static void convert_fp16_to_float(struct fb_convert *cvt)
+{
+	int i, j;
+	uint16_t *fp16;
+	float *ptr = cvt->dst.ptr;
+	unsigned int float_stride = cvt->dst.fb->strides[0] / sizeof(*ptr);
+	unsigned int fp16_stride = cvt->src.fb->strides[0] / sizeof(*fp16);
+	const unsigned char *swz = rgbx_swizzle(cvt->src.fb->drm_format);
+	bool needs_reswizzle = swz != swizzle_rgbx;
+
+	uint16_t *buf = convert_src_get(cvt);
+	fp16 = buf + cvt->src.fb->offsets[0] / sizeof(*buf);
+
+	for (i = 0; i < cvt->dst.fb->height; i++) {
+		if (needs_reswizzle) {
+			const uint16_t *fp16_tmp = fp16;
+			float *rgb_tmp = ptr;
+
+			for (j = 0; j < cvt->dst.fb->width; j++) {
+				struct igt_vec4 rgb;
+
+				igt_half_to_float(fp16_tmp, rgb.d, 4);
+
+				rgb_tmp[0] = rgb.d[swz[0]];
+				rgb_tmp[1] = rgb.d[swz[1]];
+				rgb_tmp[2] = rgb.d[swz[2]];
+				rgb_tmp[3] = rgb.d[swz[3]];
+
+				rgb_tmp += 4;
+				fp16_tmp += 4;
+			}
+		} else {
+			igt_half_to_float(fp16, ptr, cvt->dst.fb->width * 4);
+		}
+
+		ptr += float_stride;
+		fp16 += fp16_stride;
+	}
+
+	convert_src_put(cvt, buf);
+}
+
+static void convert_float_to_fp16(struct fb_convert *cvt)
+{
+	int i, j;
+	uint16_t *fp16 = cvt->dst.ptr + cvt->dst.fb->offsets[0];
+	const float *ptr = cvt->src.ptr;
+	unsigned float_stride = cvt->src.fb->strides[0] / sizeof(*ptr);
+	unsigned fp16_stride = cvt->dst.fb->strides[0] / sizeof(*fp16);
+	const unsigned char *swz = rgbx_swizzle(cvt->dst.fb->drm_format);
+	bool needs_reswizzle = swz != swizzle_rgbx;
+
+	for (i = 0; i < cvt->dst.fb->height; i++) {
+		if (needs_reswizzle) {
+			const float *rgb_tmp = ptr;
+			uint16_t *fp16_tmp = fp16;
+
+			for (j = 0; j < cvt->dst.fb->width; j++) {
+				struct igt_vec4 rgb;
+
+				rgb.d[0] = rgb_tmp[swz[0]];
+				rgb.d[1] = rgb_tmp[swz[1]];
+				rgb.d[2] = rgb_tmp[swz[2]];
+				rgb.d[3] = rgb_tmp[swz[3]];
+
+				igt_float_to_half(rgb.d, fp16_tmp, 4);
+
+				rgb_tmp += 4;
+				fp16_tmp += 4;
+			}
+		} else {
+			igt_float_to_half(ptr, fp16, cvt->dst.fb->width * 4);
+		}
+
+		ptr += float_stride;
+		fp16 += fp16_stride;
+	}
+}
+
 static void convert_pixman(struct fb_convert *cvt)
 {
 	pixman_format_code_t src_pixman = drm_format_to_pixman(cvt->src.fb->drm_format);
@@ -2660,6 +2774,12 @@ static void fb_convert(struct fb_convert *cvt)
 		case DRM_FORMAT_Y416:
 			convert_yuv16_to_float(cvt, true);
 			return;
+		case DRM_FORMAT_XRGB16161616F:
+		case DRM_FORMAT_XBGR16161616F:
+		case DRM_FORMAT_ARGB16161616F:
+		case DRM_FORMAT_ABGR16161616F:
+			convert_fp16_to_float(cvt);
+			return;
 		}
 	} else if (cvt->src.fb->drm_format == IGT_FORMAT_FLOAT) {
 		switch (cvt->dst.fb->drm_format) {
@@ -2683,6 +2803,12 @@ static void fb_convert(struct fb_convert *cvt)
 		case DRM_FORMAT_Y416:
 			convert_float_to_yuv16(cvt, true);
 			return;
+		case DRM_FORMAT_XRGB16161616F:
+		case DRM_FORMAT_XBGR16161616F:
+		case DRM_FORMAT_ARGB16161616F:
+		case DRM_FORMAT_ABGR16161616F:
+			convert_float_to_fp16(cvt);
+			return;
 		}
 	}
 
@@ -2846,6 +2972,7 @@ cairo_surface_t *igt_get_cairo_surface(int fd, struct igt_fb *fb)
 
 	if (fb->cairo_surface == NULL) {
 		if (igt_format_is_yuv(fb->drm_format) ||
+		    igt_format_is_fp16(fb->drm_format) ||
 		    ((f->cairo_id == CAIRO_FORMAT_INVALID) &&
 		     (f->pixman_id != PIXMAN_invalid)))
 			create_cairo_surface__convert(fd, fb);
@@ -3166,6 +3293,25 @@ bool igt_format_is_yuv(uint32_t drm_format)
 }
 
 /**
+ * igt_format_is_fp16
+ * @drm_format: drm fourcc
+ *
+ * Check if the format is fp16.
+ */
+bool igt_format_is_fp16(uint32_t drm_format)
+{
+	switch (drm_format) {
+	case DRM_FORMAT_XRGB16161616F:
+	case DRM_FORMAT_ARGB16161616F:
+	case DRM_FORMAT_XBGR16161616F:
+	case DRM_FORMAT_ABGR16161616F:
+		return true;
+	default:
+		return false;
+	}
+}
+
+/**
  * igt_format_plane_bpp:
  * @drm_format: drm fourcc
  * @plane: format plane index
diff --git a/lib/igt_fb.h b/lib/igt_fb.h
index ba22bd6..adefebe 100644
--- a/lib/igt_fb.h
+++ b/lib/igt_fb.h
@@ -189,6 +189,7 @@ uint32_t igt_drm_format_to_bpp(uint32_t drm_format);
 const char *igt_format_str(uint32_t drm_format);
 bool igt_fb_supported_format(uint32_t drm_format);
 bool igt_format_is_yuv(uint32_t drm_format);
+bool igt_format_is_fp16(uint32_t drm_format);
 int igt_format_plane_bpp(uint32_t drm_format, int plane);
 void igt_format_array_fill(uint32_t **formats_array, unsigned int *count,
 			   bool allow_yuv);
-- 
2.7.4

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[igt-dev] [PATCH 3/3] tests/kms_plane_scaling: Skip testing unsupported fp16 features

[Kevin Strasser]

Disallow Yf tiling and Y-tiled 90/270 rotation for fp16 on Intel hardware.

rfc2:
- Move check into can_rotate (Maarten)
- Use igt_plane_has_format_mod (Maarten)

v1:
- Drop Y tile check (Ville)

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 tests/kms_plane_scaling.c | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/tests/kms_plane_scaling.c b/tests/kms_plane_scaling.c
index 3364073..661af9a 100644
--- a/tests/kms_plane_scaling.c
+++ b/tests/kms_plane_scaling.c
@@ -174,12 +174,18 @@ static const igt_rotation_t rotations[] = {
 	IGT_ROTATION_270,
 };
 
-static bool can_rotate(data_t *d, unsigned format)
+static bool can_rotate(data_t *d, unsigned format, uint64_t tiling,
+		       igt_rotation_t rot)
 {
 	if (format == DRM_FORMAT_C8 ||
 	    (intel_gen(d->devid) < 11 && format == DRM_FORMAT_RGB565))
 		return false;
 
+	// Y-tiled 90/270 rotation isn't supported for fp16 on Intel
+	if (is_i915_device(d->drm_fd) && igt_format_is_fp16(format) &&
+	    (rot == IGT_ROTATION_90 || rot == IGT_ROTATION_270))
+		return false;
+
 	return true;
 }
 
@@ -200,8 +206,9 @@ static void test_scaler_with_rotation_pipe(data_t *d, enum pipe pipe,
 			igt_rotation_t rot = rotations[i];
 			for (int j = 0; j < plane->drm_plane->count_formats; j++) {
 				unsigned format = plane->drm_plane->formats[j];
+
 				if (igt_fb_supported_format(format) &&
-				    can_rotate(d, format))
+				    can_rotate(d, format, tiling, rot))
 					check_scaling_pipe_plane_rot(d, plane, format,
 								     tiling, pipe,
 								     output, rot);
@@ -234,6 +241,9 @@ static void test_scaler_with_pixel_format_pipe(data_t *d, enum pipe pipe, igt_ou
 			for (int j = 0; j < plane->drm_plane->count_formats; j++) {
 				uint32_t format = plane->drm_plane->formats[j];
 
+				if (!igt_plane_has_format_mod(plane, format, tiling))
+					continue;
+
 				if (igt_fb_supported_format(format))
 					check_scaling_pipe_plane_rot(d, plane,
 								     format, tiling,
-- 
2.7.4

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Re: [igt-dev] [PATCH 3/3] tests/kms_plane_scaling: Skip testing unsupported fp16 features

[Maarten Lankhorst]

Op 05-04-2019 om 22:14 schreef Kevin Strasser:
> Disallow Yf tiling and Y-tiled 90/270 rotation for fp16 on Intel hardware.
>
> rfc2:
> - Move check into can_rotate (Maarten)
> - Use igt_plane_has_format_mod (Maarten)
>
> v1:
> - Drop Y tile check (Ville)
>
> Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  tests/kms_plane_scaling.c | 14 ++++++++++++--
>  1 file changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/tests/kms_plane_scaling.c b/tests/kms_plane_scaling.c
> index 3364073..661af9a 100644
> --- a/tests/kms_plane_scaling.c
> +++ b/tests/kms_plane_scaling.c
> @@ -174,12 +174,18 @@ static const igt_rotation_t rotations[] = {
>  	IGT_ROTATION_270,
>  };
>  
> -static bool can_rotate(data_t *d, unsigned format)
> +static bool can_rotate(data_t *d, unsigned format, uint64_t tiling,
> +		       igt_rotation_t rot)
>  {
>  	if (format == DRM_FORMAT_C8 ||
>  	    (intel_gen(d->devid) < 11 && format == DRM_FORMAT_RGB565))
>  		return false;
>  
> +	// Y-tiled 90/270 rotation isn't supported for fp16 on Intel
> +	if (is_i915_device(d->drm_fd) && igt_format_is_fp16(format) &&
> +	    (rot == IGT_ROTATION_90 || rot == IGT_ROTATION_270))
> +		return false;
> +
>  	return true;
>  }
>  
> @@ -200,8 +206,9 @@ static void test_scaler_with_rotation_pipe(data_t *d, enum pipe pipe,
>  			igt_rotation_t rot = rotations[i];
>  			for (int j = 0; j < plane->drm_plane->count_formats; j++) {
>  				unsigned format = plane->drm_plane->formats[j];
> +
>  				if (igt_fb_supported_format(format) &&
> -				    can_rotate(d, format))
> +				    can_rotate(d, format, tiling, rot))
>  					check_scaling_pipe_plane_rot(d, plane, format,
>  								     tiling, pipe,
>  								     output, rot);
> @@ -234,6 +241,9 @@ static void test_scaler_with_pixel_format_pipe(data_t *d, enum pipe pipe, igt_ou
>  			for (int j = 0; j < plane->drm_plane->count_formats; j++) {
>  				uint32_t format = plane->drm_plane->formats[j];
>  
> +				if (!igt_plane_has_format_mod(plane, format, tiling))
> +					continue;
> +
>  				if (igt_fb_supported_format(format))
>  					check_scaling_pipe_plane_rot(d, plane,
>  								     format, tiling,

Patch series looks good now. :)

Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>

Want me to push it?

~Maarten

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Re: [igt-dev] [PATCH 3/3] tests/kms_plane_scaling: Skip testing unsupported fp16 features

[Strasser, Kevin]

Maarten Lankhorst wrote:
> Patch series looks good now. :)
>
> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>
> Want me to push it?

Thanks for the review :)

-Kevin
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Re: [igt-dev] [PATCH 3/3] tests/kms_plane_scaling: Skip testing unsupported fp16 features

[Ville Syrjälä]

On Thu, Apr 11, 2019 at 10:36:52PM +0000, Strasser, Kevin wrote:
> Maarten Lankhorst wrote:
> > Patch series looks good now. :)
> >
> > Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> >
> > Want me to push it?
> 
> Thanks for the review :)

I guess Maarten couldn't parse that answer :P

Anyways, I've now pushed this because I needed it.
Thanks for the patches and reviews.

-- 
Ville Syrjälä
Intel
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[igt-dev] ✓ Fi.CI.BAT: success for Add support for fp16 formats

[Patchwork]

== Series Details ==

Series: Add support for fp16 formats
URL   : https://patchwork.freedesktop.org/series/59082/
State : success

== Summary ==

CI Bug Log - changes from IGT_4932 -> IGTPW_2803
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/59082/revisions/1/mbox/

Known issues
------------

  Here are the changes found in IGTPW_2803 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_cs_nop@fork-compute0:
    - fi-icl-y:           NOTRUN -> SKIP [fdo#109315] +17

  * igt@i915_selftest@live_contexts:
    - fi-icl-y:           NOTRUN -> DMESG-FAIL [fdo#108569]

  * igt@i915_selftest@live_uncore:
    - fi-ivb-3770:        PASS -> DMESG-FAIL [fdo#110210]

  * igt@kms_chamelium@dp-crc-fast:
    - fi-icl-y:           NOTRUN -> SKIP [fdo#109284] +8

  * igt@kms_force_connector_basic@force-load-detect:
    - fi-icl-y:           NOTRUN -> SKIP [fdo#109285] +3

  * igt@kms_frontbuffer_tracking@basic:
    - fi-icl-u2:          PASS -> FAIL [fdo#103167]
    - fi-byt-clapper:     PASS -> FAIL [fdo#103167]

  * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b:
    - fi-byt-clapper:     PASS -> FAIL [fdo#107362]

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - fi-byt-clapper:     PASS -> FAIL [fdo#103191] / [fdo#107362]

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
    - fi-blb-e6850:       PASS -> INCOMPLETE [fdo#107718]

  * igt@kms_psr@primary_mmap_gtt:
    - fi-icl-y:           NOTRUN -> SKIP [fdo#110189] +3

  * igt@prime_vgem@basic-fence-flip:
    - fi-icl-y:           NOTRUN -> SKIP [fdo#109294]

  
#### Possible fixes ####

  * igt@gem_render_linear_blits@basic:
    - fi-icl-y:           INCOMPLETE [fdo#109100] -> PASS

  * igt@i915_selftest@live_hangcheck:
    - fi-skl-iommu:       INCOMPLETE [fdo#108602] / [fdo#108744] -> PASS

  * igt@kms_addfb_basic@bad-pitch-128:
    - {fi-icl-u3}:        DMESG-WARN [fdo#107724] -> PASS

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
  [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#108602]: https://bugs.freedesktop.org/show_bug.cgi?id=108602
  [fdo#108744]: https://bugs.freedesktop.org/show_bug.cgi?id=108744
  [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109294]: https://bugs.freedesktop.org/show_bug.cgi?id=109294
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#110210]: https://bugs.freedesktop.org/show_bug.cgi?id=110210


Participating hosts (50 -> 43)
------------------------------

  Missing    (7): fi-kbl-soraka fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-gdg-551 fi-icl-guc fi-bdw-samus 


Build changes
-------------

    * IGT: IGT_4932 -> IGTPW_2803

  CI_DRM_5881: b070175c76da1440a747fd023ee6253e573055f8 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_2803: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2803/
  IGT_4932: 08cf63a8fac11e3594b57580331fb319241a0d69 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2803/
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[igt-dev] ✓ Fi.CI.IGT: success for Add support for fp16 formats

[Patchwork]

== Series Details ==

Series: Add support for fp16 formats
URL   : https://patchwork.freedesktop.org/series/59082/
State : success

== Summary ==

CI Bug Log - changes from IGT_4932_full -> IGTPW_2803_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/59082/revisions/1/mbox/

Known issues
------------

  Here are the changes found in IGTPW_2803_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_create@create-clear:
    - shard-hsw:          PASS -> INCOMPLETE [fdo#103540]

  * igt@gem_exec_schedule@fifo-bsd2:
    - shard-snb:          NOTRUN -> SKIP [fdo#109271] +79

  * igt@kms_busy@basic-flip-e:
    - shard-hsw:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +3

  * igt@kms_busy@extended-modeset-hang-newfb-render-a:
    - shard-hsw:          PASS -> DMESG-WARN [fdo#110222] +1

  * igt@kms_busy@extended-modeset-hang-newfb-render-b:
    - shard-kbl:          PASS -> DMESG-WARN [fdo#110222] +1

  * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b:
    - shard-snb:          PASS -> DMESG-WARN [fdo#110222] +2

  * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a:
    - shard-snb:          NOTRUN -> DMESG-WARN [fdo#110222]

  * igt@kms_cursor_crc@cursor-128x128-suspend:
    - shard-snb:          PASS -> DMESG-WARN [fdo#102365]

  * igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic:
    - shard-glk:          PASS -> FAIL [fdo#106509] / [fdo#107409]

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic:
    - shard-apl:          NOTRUN -> SKIP [fdo#109271] +7

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-render:
    - shard-kbl:          NOTRUN -> SKIP [fdo#109271] +1

  * igt@kms_pipe_crc_basic@hang-read-crc-pipe-f:
    - shard-snb:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +5

  * igt@kms_pipe_crc_basic@read-crc-pipe-b-frame-sequence:
    - shard-snb:          PASS -> SKIP [fdo#109271] +1

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
    - shard-glk:          PASS -> INCOMPLETE [fdo#103359] / [k.org#198133]

  * igt@kms_plane@pixel-format-pipe-b-planes-source-clamping:
    - shard-glk:          PASS -> SKIP [fdo#109271]

  * igt@kms_plane_scaling@pipe-a-scaler-with-rotation:
    - shard-glk:          PASS -> SKIP [fdo#109271] / [fdo#109278] +1

  * igt@kms_vblank@pipe-b-ts-continuation-suspend:
    - shard-kbl:          PASS -> FAIL [fdo#104894]
    - shard-apl:          PASS -> FAIL [fdo#104894]

  * igt@perf_pmu@busy-accuracy-50-rcs0:
    - shard-hsw:          NOTRUN -> SKIP [fdo#109271] +45

  * igt@perf_pmu@rc6-runtime-pm:
    - shard-apl:          PASS -> FAIL [fdo#105010]
    - shard-kbl:          PASS -> FAIL [fdo#105010]

  * igt@prime_nv_api@i915_self_import:
    - shard-glk:          NOTRUN -> SKIP [fdo#109271] +7

  * igt@tools_test@tools_test:
    - shard-apl:          PASS -> SKIP [fdo#109271]

  
#### Possible fixes ####

  * igt@gem_tiled_swapping@non-threaded:
    - shard-hsw:          INCOMPLETE [fdo#103540] -> PASS

  * igt@i915_suspend@sysfs-reader:
    - shard-kbl:          INCOMPLETE [fdo#103665] -> PASS

  * igt@kms_busy@extended-modeset-hang-newfb-render-c:
    - shard-hsw:          DMESG-WARN [fdo#110222] -> PASS +1
    - shard-kbl:          DMESG-WARN [fdo#110222] -> PASS +2

  * igt@kms_color@pipe-a-ctm-max:
    - shard-kbl:          FAIL [fdo#108147] -> PASS
    - shard-apl:          FAIL [fdo#108147] -> PASS

  * igt@kms_cursor_crc@cursor-64x64-sliding:
    - shard-apl:          FAIL [fdo#103232] -> PASS

  * igt@kms_cursor_legacy@cursor-vs-flip-legacy:
    - shard-hsw:          FAIL [fdo#103355] -> PASS

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-plflip-blt:
    - shard-glk:          FAIL [fdo#103167] -> PASS

  * igt@kms_vblank@pipe-b-ts-continuation-modeset-rpm:
    - shard-apl:          FAIL [fdo#104894] -> PASS +2
    - shard-kbl:          FAIL [fdo#104894] -> PASS +1

  
  [fdo#102365]: https://bugs.freedesktop.org/show_bug.cgi?id=102365
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
  [fdo#103355]: https://bugs.freedesktop.org/show_bug.cgi?id=103355
  [fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#104894]: https://bugs.freedesktop.org/show_bug.cgi?id=104894
  [fdo#105010]: https://bugs.freedesktop.org/show_bug.cgi?id=105010
  [fdo#106509]: https://bugs.freedesktop.org/show_bug.cgi?id=106509
  [fdo#107409]: https://bugs.freedesktop.org/show_bug.cgi?id=107409
  [fdo#108147]: https://bugs.freedesktop.org/show_bug.cgi?id=108147
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#110222]: https://bugs.freedesktop.org/show_bug.cgi?id=110222
  [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133


Participating hosts (7 -> 5)
------------------------------

  Missing    (2): shard-skl shard-iclb 


Build changes
-------------

    * IGT: IGT_4932 -> IGTPW_2803

  CI_DRM_5881: b070175c76da1440a747fd023ee6253e573055f8 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_2803: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2803/
  IGT_4932: 08cf63a8fac11e3594b57580331fb319241a0d69 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2803/
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