From: "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: igt-dev@lists.freedesktop.org
Subject: Re: [igt-dev] [PATCH i-g-t 6/8] tools/intel_watermark: Make reg dump section less wide
Date: Fri, 14 May 2021 12:50:14 +0300 [thread overview]
Message-ID: <20210514095014.GA8652@intel.com> (raw)
In-Reply-To: <20210414022754.31710-7-ville.syrjala@linux.intel.com>
On Wed, Apr 14, 2021 at 05:27:52AM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Don't repeat the register name for each pipe to make the
> register dump portion a bit less wide.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@gmail.com>
> ---
> tools/intel_watermark.c | 98 ++++++++++++++++++-----------------------
> 1 file changed, 43 insertions(+), 55 deletions(-)
>
> diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
> index 657fff20ec7a..31ce165f282b 100644
> --- a/tools/intel_watermark.c
> +++ b/tools/intel_watermark.c
> @@ -166,90 +166,80 @@ static int skl_max_planes(uint32_t d)
> return 4;
> }
>
> -static const char *skl_plane_name(int pipe, int plane)
> +static const char *skl_plane_name(int plane)
> {
> static char name[32];
>
> if (plane == 0)
> snprintf(name, sizeof(name), "CURSOR");
> else
> - snprintf(name, sizeof(name), "PLANE_%1d%c",
> - plane, pipe_name(pipe));
> + snprintf(name, sizeof(name), "PLANE_%1d", plane);
>
> return name;
> }
>
> -static const char *skl_wm_linetime_reg_name(int pipe)
> +static const char *skl_wm_linetime_reg_name(void)
> {
> static char reg_name[32];
>
> - snprintf(reg_name, sizeof(reg_name), "WM_LINETIME_%c",
> - pipe_name(pipe));
> + snprintf(reg_name, sizeof(reg_name), "WM_LINETIME");
>
> return reg_name;
> }
>
> -static const char *skl_plane_ctl_reg_name(int pipe, int plane)
> +static const char *skl_plane_ctl_reg_name(int plane)
> {
> static char reg_name[32];
>
> if (plane == 0)
> - snprintf(reg_name, sizeof(reg_name), "CUR_CTL_%c",
> - pipe_name(pipe));
> + snprintf(reg_name, sizeof(reg_name), "CUR_CTL");
> else
> - snprintf(reg_name, sizeof(reg_name), "PLANE_CTL_%1d_%c",
> - plane, pipe_name(pipe));
> + snprintf(reg_name, sizeof(reg_name), "PLANE_CTL_%1d", plane);
>
> return reg_name;
> }
>
> -static const char *skl_wm_reg_name(int pipe, int plane, int level)
> +static const char *skl_wm_reg_name(int plane, int level)
> {
> static char reg_name[32];
>
> if (plane == 0)
> - snprintf(reg_name, sizeof(reg_name), "CUR_WM_%c_%1d",
> - pipe_name(pipe), level);
> + snprintf(reg_name, sizeof(reg_name), "CUR_WM_%1d", level);
> else
> - snprintf(reg_name, sizeof(reg_name), "PLANE_WM_%1d_%c_%1d",
> - plane, pipe_name(pipe), level);
> + snprintf(reg_name, sizeof(reg_name), "PLANE_WM_%1d_%1d", plane, level);
>
> return reg_name;
> }
>
> -static const char *skl_wm_trans_reg_name(int pipe, int plane)
> +static const char *skl_wm_trans_reg_name(int plane)
> {
> static char reg_name[32];
>
> if (plane == 0)
> - snprintf(reg_name, sizeof(reg_name), "CUR_WM_TRANS_%c",
> - pipe_name(pipe));
> + snprintf(reg_name, sizeof(reg_name), "CUR_WM_TRANS");
> else
> - snprintf(reg_name, sizeof(reg_name), "PLANE_WM_TRANS_%1d_%c",
> - plane, pipe_name(pipe));
> + snprintf(reg_name, sizeof(reg_name), "PLANE_WM_TRANS_%1d", plane);
> +
> return reg_name;
> }
>
> -static const char *skl_buf_cfg_reg_name(int pipe, int plane)
> +static const char *skl_buf_cfg_reg_name(int plane)
> {
> static char reg_name[32];
>
> if (plane == 0)
> - snprintf(reg_name, sizeof(reg_name), "CUR_BUF_CFG_%c",
> - pipe_name(pipe));
> + snprintf(reg_name, sizeof(reg_name), "CUR_BUF_CFG");
> else
> - snprintf(reg_name, sizeof(reg_name), "PLANE_BUF_CFG_%1d_%c",
> - plane, pipe_name(pipe));
> + snprintf(reg_name, sizeof(reg_name), "PLANE_BUF_CFG_%1d", plane);
>
> return reg_name;
> }
>
> -static const char *skl_nv12_buf_cfg_reg_name(int pipe, int plane)
> +static const char *skl_nv12_buf_cfg_reg_name(int plane)
> {
> static char reg_name[32];
>
> - snprintf(reg_name, sizeof(reg_name), "PLANE_NV12_BUF_CFG_%1d_%c",
> - plane, pipe_name(pipe));
> + snprintf(reg_name, sizeof(reg_name), "PLANE_NV12_BUF_CFG_%1d", plane);
>
> return reg_name;
> }
> @@ -310,21 +300,23 @@ static void skl_wm_dump(void)
> }
> }
>
> - for (pipe = 0; pipe < num_pipes; pipe++) {
> - printf("%18s 0x%08x\t",
> - skl_wm_linetime_reg_name(pipe),
> - wm_linetime[pipe]);
> - }
> + printf("%21c\t", '\0');
> + for (pipe = 0; pipe < num_pipes; pipe++)
> + printf("PIPE_%-5c\t", pipe_name(pipe));
> + printf("\n\n");
> +
> + printf("%21s\t", skl_wm_linetime_reg_name());
> + for (pipe = 0; pipe < num_pipes; pipe++)
> + printf("0x%08x\t", wm_linetime[pipe]);
> printf("\n\n");
>
> for (plane = 0; plane < max_planes; plane++) {
> + printf("%21s\t", skl_plane_ctl_reg_name(plane));
> +
> for (pipe = 0; pipe < num_pipes; pipe++) {
> if (plane >= skl_num_planes(devid, pipe))
> break;
> -
> - printf("%18s 0x%08x\t" ,
> - skl_plane_ctl_reg_name(pipe, plane),
> - plane_ctl[pipe][plane]);
> + printf("0x%08x\t" , plane_ctl[pipe][plane]);
> }
> printf("\n");
> }
> @@ -332,13 +324,12 @@ static void skl_wm_dump(void)
>
> for (plane = 0; plane < max_planes; plane++) {
> for (level = 0; level < num_levels; level++) {
> + printf("%21s\t", skl_wm_reg_name(plane, level));
> +
> for (pipe = 0; pipe < num_pipes; pipe++) {
> if (plane >= skl_num_planes(devid, pipe))
> break;
> -
> - printf("%18s 0x%08x\t" ,
> - skl_wm_reg_name(pipe, plane, level),
> - wm[level][pipe][plane]);
> + printf("0x%08x\t", wm[level][pipe][plane]);
> }
> printf("\n");
> }
> @@ -346,26 +337,24 @@ static void skl_wm_dump(void)
> }
>
> for (plane = 0; plane < max_planes; plane++) {
> + printf("%21s\t", skl_wm_trans_reg_name(plane));
> +
> for (pipe = 0; pipe < num_pipes; pipe++) {
> if (plane >= skl_num_planes(devid, pipe))
> break;
> -
> - printf("%18s 0x%08x\t",
> - skl_wm_trans_reg_name(pipe, plane),
> - wm_trans[pipe][plane]);
> + printf("0x%08x\t", wm_trans[pipe][plane]);
> }
> printf("\n");
> }
> printf("\n");
>
> for (plane = 0; plane < max_planes; plane++) {
> + printf("%21s\t", skl_buf_cfg_reg_name(plane));
> +
> for (pipe = 0; pipe < num_pipes; pipe++) {
> if (plane >= skl_num_planes(devid, pipe))
> break;
> -
> - printf("%18s 0x%08x\t",
> - skl_buf_cfg_reg_name(pipe, plane),
> - buf_cfg[pipe][plane]);
> + printf("0x%08x\t", buf_cfg[pipe][plane]);
> }
> printf("\n");
>
> @@ -375,13 +364,12 @@ static void skl_wm_dump(void)
> if (plane == 0)
> continue;
>
> + printf("%21s\t", skl_nv12_buf_cfg_reg_name(plane));
> +
> for (pipe = 0; pipe < num_pipes; pipe++) {
> if (plane >= skl_num_planes(devid, pipe))
> break;
> -
> - printf("%18s 0x%08x\t",
> - skl_nv12_buf_cfg_reg_name(pipe, plane),
> - nv12_buf_cfg[pipe][plane]);
> + printf("0x%08x\t", nv12_buf_cfg[pipe][plane]);
> }
> printf("\n");
> }
> @@ -405,7 +393,7 @@ static void skl_wm_dump(void)
> REG_DECODE1(plane_ctl[pipe][plane], 5, 1);
> else
> enable = REG_DECODE1(plane_ctl[pipe][plane], 31, 1);
> - printf("%9s%c", skl_plane_name(pipe, plane),
> + printf("%9s%c", skl_plane_name(plane),
> endis_ast(enable));
> }
> printf("\n");
> --
> 2.26.3
>
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next prev parent reply other threads:[~2021-05-14 9:47 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-14 2:27 [igt-dev] [PATCH i-g-t 0/8] tools/intel_watermark: Support new platofrms Ville Syrjala
2021-04-14 2:27 ` [igt-dev] [PATCH i-g-t 1/8] tools/intel_watermark: Parse WM_DBG to help diagnose watermark issues Ville Syrjala
2021-05-14 9:31 ` Lisovskiy, Stanislav
2021-04-14 2:27 ` [igt-dev] [PATCH i-g-t 2/8] tools/intel_watermark: Use WM_SR_CNT to observe SR residency Ville Syrjala
2021-05-14 9:36 ` Lisovskiy, Stanislav
2021-04-14 2:27 ` [igt-dev] [PATCH i-g-t 3/8] tools/intel_watermark: Deal with TGL planes Ville Syrjala
2021-05-14 9:47 ` Lisovskiy, Stanislav
2021-04-14 2:27 ` [igt-dev] [PATCH i-g-t 4/8] tools/intel_watermark: Reduce the number of planes for rkl/adls/adlp Ville Syrjala
2021-05-14 9:53 ` Lisovskiy, Stanislav
2021-04-14 2:27 ` [igt-dev] [PATCH i-g-t 5/8] tools/intel_watermark: TGL+ can have 4 pipes Ville Syrjala
2021-05-14 9:53 ` Lisovskiy, Stanislav
2021-04-14 2:27 ` [igt-dev] [PATCH i-g-t 6/8] tools/intel_watermark: Make reg dump section less wide Ville Syrjala
2021-05-14 9:50 ` Lisovskiy, Stanislav [this message]
2021-04-14 2:27 ` [igt-dev] [PATCH i-g-t 7/8] tools/intel_watermark: Handle ADL-P dedicated SAGV watermarks Ville Syrjala
2021-05-14 9:51 ` Lisovskiy, Stanislav
2021-04-14 2:27 ` [igt-dev] [PATCH i-g-t 8/8] tools/intel_watermark: Widen register bitfields Ville Syrjala
2021-05-14 9:51 ` Lisovskiy, Stanislav
2021-04-14 3:04 ` [igt-dev] ✓ Fi.CI.BAT: success for tools/intel_watermark: Support new platofrms Patchwork
2021-04-14 4:01 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
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