* [igt-dev] [PATCH i-g-t 1/8] tests/amdgpu/amd_freesync_video_mode: Adjust indents and spacing
@ 2023-06-21 6:57 Tom Chung
2023-06-21 6:57 ` [igt-dev] [PATCH i-g-t 2/8] tests/amdgpu/amd_freesync_video_mode: Fix memory leak and corruption Tom Chung
` (9 more replies)
0 siblings, 10 replies; 13+ messages in thread
From: Tom Chung @ 2023-06-21 6:57 UTC (permalink / raw)
To: igt-dev; +Cc: Tom Chung
Adjust some code indents and spacing.
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
---
tests/amdgpu/amd_freesync_video_mode.c | 539 ++++++++++++-------------
1 file changed, 266 insertions(+), 273 deletions(-)
diff --git a/tests/amdgpu/amd_freesync_video_mode.c b/tests/amdgpu/amd_freesync_video_mode.c
index 579d24436..fdcf1375f 100644
--- a/tests/amdgpu/amd_freesync_video_mode.c
+++ b/tests/amdgpu/amd_freesync_video_mode.c
@@ -25,11 +25,11 @@
#include <fcntl.h>
#include <signal.h>
-#define NSECS_PER_SEC (1000000000ull)
-#define TEST_DURATION_NS (10 * NSECS_PER_SEC)
+#define NSECS_PER_SEC (1000000000ull)
+#define TEST_DURATION_NS (10 * NSECS_PER_SEC)
-#define BYTES_PER_PIXEL 4
-#define MK_COLOR(r, g, b) ((0 << 24) | (r << 16) | (g << 8) | b)
+#define BYTES_PER_PIXEL 4
+#define MK_COLOR(r, g, b) ((0 << 24) | (r << 16) | (g << 8) | b)
/*
* The Display Core of amdgpu will add a set of modes derived from the
@@ -46,43 +46,44 @@
IGT_TEST_DESCRIPTION("This tests transition between normal and FreeSync-Video"
"modes and measures the FPS to ensure vblank events are"
"happening at the expected rate.");
+
typedef struct range {
unsigned int min;
unsigned int max;
} range_t;
typedef struct data {
- int drm_fd;
- igt_display_t display;
+ int drm_fd;
+ igt_display_t display;
igt_plane_t *primary;
- igt_fb_t fbs[2];
- uint32_t *fb_mem[2];
- int front;
- bool fb_initialized;
- range_t range;
+ igt_fb_t fbs[2];
+ uint32_t *fb_mem[2];
+ int front;
+ bool fb_initialized;
+ range_t range;
drmModeConnector *connector;
drmModeModeInfo *modes;
- int count_modes;
+ int count_modes;
- uint32_t preferred_mode_index;
- uint32_t base_mode_index;
- uint32_t hdisplay;
- uint32_t vdisplay;
+ uint32_t preferred_mode_index;
+ uint32_t base_mode_index;
+ uint32_t hdisplay;
+ uint32_t vdisplay;
} data_t;
struct fsv_sprite {
- uint32_t w;
- uint32_t h;
- uint32_t *data;
+ uint32_t w;
+ uint32_t h;
+ uint32_t *data;
};
static struct fsv_sprite cicle_sprite;
enum {
- FSV_PREFERRED_MODE,
- FSV_BASE_MODE,
- FSV_FREESYNC_VIDEO_MODE,
- FSV_NON_FREESYNC_VIDEO_MODE,
+ FSV_PREFERRED_MODE,
+ FSV_BASE_MODE,
+ FSV_FREESYNC_VIDEO_MODE,
+ FSV_NON_FREESYNC_VIDEO_MODE,
};
enum {
@@ -93,10 +94,10 @@ enum {
};
enum {
- SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE ,
- SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE ,
- SCENE_NON_FSV_MODE_TO_FSV_MODE ,
- SCENE_BASE_MODE_TO_CUSTUM_MODE ,
+ SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE,
+ SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE,
+ SCENE_NON_FSV_MODE_TO_FSV_MODE,
+ SCENE_BASE_MODE_TO_CUSTUM_MODE,
SCENE_NON_FSV_MODE_TO_NON_FSV_MODE,
SCENE_COUNT,
@@ -157,74 +158,70 @@ static void fbmem_draw_rect(
uint32_t h,
uint32_t color)
{
- uint32_t offset = y * stride + x;
-
- for (uint32_t j = 0; j < h; j++) {
- for (uint32_t i = 0; i < w; i++) {
- fbmem[offset + i] = color;
- }
- offset += stride;
- }
+ uint32_t offset = y * stride + x;
+
+ for (uint32_t j = 0; j < h; j++) {
+ for (uint32_t i = 0; i < w; i++) {
+ fbmem[offset + i] = color;
+ }
+ offset += stride;
+ }
}
static void fbmem_draw_smpte_pattern(uint32_t *fbmem, int width, int height)
{
uint32_t x, y;
- uint32_t colors_top[] = {
- MK_COLOR(192, 192, 192), /* grey */
- MK_COLOR(192, 192, 0), /* yellow */
- MK_COLOR(0, 192, 192), /* cyan */
- MK_COLOR(0, 192, 0), /* green */
- MK_COLOR(192, 0, 192), /* magenta */
- MK_COLOR(192, 0, 0), /* red */
- MK_COLOR(0, 0, 192), /* blue */
- };
- uint32_t colors_middle[] = {
- MK_COLOR(0, 0, 192), /* blue */
- MK_COLOR(19, 19, 19), /* black */
- MK_COLOR(192, 0, 192), /* magenta */
- MK_COLOR(19, 19, 19), /* black */
- MK_COLOR(0, 192, 192), /* cyan */
- MK_COLOR(19, 19, 19), /* black */
- MK_COLOR(192, 192, 192), /* grey */
- };
- uint32_t colors_bottom[] = {
- MK_COLOR(0, 33, 76), /* in-phase */
- MK_COLOR(255, 255, 255), /* super white */
- MK_COLOR(50, 0, 106), /* quadrature */
- MK_COLOR(19, 19, 19), /* black */
- MK_COLOR(9, 9, 9), /* 3.5% */
- MK_COLOR(19, 19, 19), /* 7.5% */
- MK_COLOR(29, 29, 29), /* 11.5% */
- MK_COLOR(19, 19, 19), /* black */
- };
-
- for (y = 0; y < height * 6 / 9; ++y) {
- for (x = 0; x < width; ++x)
- fbmem[x] =
- colors_top[x * 7 / width];
- fbmem += width;
- }
-
- for (; y < height * 7 / 9; ++y) {
- for (x = 0; x < width; ++x)
- fbmem[x] =
- colors_middle[x * 7 / width];
- fbmem += width;
- }
-
- for (; y < height; ++y) {
- for (x = 0; x < width * 5 / 7; ++x)
- fbmem[x] =
- colors_bottom[x * 4 / (width * 5 / 7)];
- for (; x < width * 6 / 7; ++x)
- fbmem[x] =
- colors_bottom[(x - width * 5 / 7) * 3
- / (width / 7) + 4];
- for (; x < width; ++x)
- fbmem[x] = colors_bottom[7];
- fbmem += width;
- }
+ uint32_t colors_top[] = {
+ MK_COLOR(192, 192, 192), /* grey */
+ MK_COLOR(192, 192, 0), /* yellow */
+ MK_COLOR(0, 192, 192), /* cyan */
+ MK_COLOR(0, 192, 0), /* green */
+ MK_COLOR(192, 0, 192), /* magenta */
+ MK_COLOR(192, 0, 0), /* red */
+ MK_COLOR(0, 0, 192), /* blue */
+ };
+ uint32_t colors_middle[] = {
+ MK_COLOR(0, 0, 192), /* blue */
+ MK_COLOR(19, 19, 19), /* black */
+ MK_COLOR(192, 0, 192), /* magenta */
+ MK_COLOR(19, 19, 19), /* black */
+ MK_COLOR(0, 192, 192), /* cyan */
+ MK_COLOR(19, 19, 19), /* black */
+ MK_COLOR(192, 192, 192), /* grey */
+ };
+ uint32_t colors_bottom[] = {
+ MK_COLOR(0, 33, 76), /* in-phase */
+ MK_COLOR(255, 255, 255), /* super white */
+ MK_COLOR(50, 0, 106), /* quadrature */
+ MK_COLOR(19, 19, 19), /* black */
+ MK_COLOR(9, 9, 9), /* 3.5% */
+ MK_COLOR(19, 19, 19), /* 7.5% */
+ MK_COLOR(29, 29, 29), /* 11.5% */
+ MK_COLOR(19, 19, 19), /* black */
+ };
+
+ for (y = 0; y < height * 6 / 9; ++y) {
+ for (x = 0; x < width; ++x)
+ fbmem[x] = colors_top[x * 7 / width];
+ fbmem += width;
+ }
+
+ for (; y < height * 7 / 9; ++y) {
+ for (x = 0; x < width; ++x)
+ fbmem[x] = colors_middle[x * 7 / width];
+ fbmem += width;
+ }
+
+ for (; y < height; ++y) {
+ for (x = 0; x < width * 5 / 7; ++x)
+ fbmem[x] = colors_bottom[x * 4 / (width * 5 / 7)];
+ for (; x < width * 6 / 7; ++x)
+ fbmem[x] = colors_bottom[(x - width * 5 / 7) * 3
+ / (width / 7) + 4];
+ for (; x < width; ++x)
+ fbmem[x] = colors_bottom[7];
+ fbmem += width;
+ }
}
static void sprite_init(
@@ -232,13 +229,13 @@ static void sprite_init(
uint32_t w,
uint32_t h)
{
- igt_assert(sprite);
+ igt_assert(sprite);
- sprite->data = (uint32_t *)malloc(w * h * BYTES_PER_PIXEL);
- igt_assert(sprite->data);
+ sprite->data = (uint32_t *) malloc(w * h * BYTES_PER_PIXEL);
+ igt_assert(sprite->data);
- sprite->w = w;
- sprite->h = h;
+ sprite->w = w;
+ sprite->h = h;
}
static void sprite_paste(
@@ -248,14 +245,14 @@ static void sprite_paste(
uint32_t x,
uint32_t y)
{
- uint32_t fb_offset = y * fb_stride + x;
- uint32_t sprite_offset = 0;
-
- for (int j = 0; j < sprite->h; j++) {
- memcpy(fbmem + fb_offset, sprite->data + sprite_offset, sprite->w * 4);
- sprite_offset += sprite->w;
- fb_offset += fb_stride;
- }
+ uint32_t fb_offset = y * fb_stride + x;
+ uint32_t sprite_offset = 0;
+
+ for (int j = 0; j < sprite->h; j++) {
+ memcpy(fbmem + fb_offset, sprite->data + sprite_offset, sprite->w * 4);
+ sprite_offset += sprite->w;
+ fb_offset += fb_stride;
+ }
}
static void sprite_draw_rect(
@@ -266,16 +263,15 @@ static void sprite_draw_rect(
uint32_t h,
uint32_t color)
{
- uint32_t offset = y * sprite->w + x;
- uint32_t *addr = (uint32_t *)sprite->data;
-
- for (uint32_t j = 0; j < h; j++) {
- addr = (uint32_t *)(sprite->data + offset);
- for (uint32_t i = 0; i < w; i++) {
- addr[i] = color;
- }
- offset += sprite->w;
- }
+ uint32_t offset = y * sprite->w + x;
+ uint32_t *addr = (uint32_t *)sprite->data;
+
+ for (uint32_t j = 0; j < h; j++) {
+ addr = (uint32_t *) (sprite->data + offset);
+ for (uint32_t i = 0; i < w; i++)
+ addr[i] = color;
+ offset += sprite->w;
+ }
}
/* drawing horizontal line in the sprite */
@@ -287,9 +283,9 @@ static void sprite_draw_hline(
uint32_t color)
{
uint32_t offset = y1 * sprite->w;
- for (int x = x1 ; x < x2; x++) {
- sprite->data[offset + x] = color;
- }
+ for (int x = x1 ; x < x2; x++) {
+ sprite->data[offset + x] = color;
+ }
}
/* drawing filled circle with Bresenham's algorithm */
@@ -300,71 +296,70 @@ static void sprite_draw_circle(
uint32_t radius,
uint32_t color)
{
- int offsetx = 0, offsety = radius, d = radius -1;
-
- while (offsety >= offsetx) {
- sprite_draw_hline(sprite, x - offsety, y + offsetx,
- x + offsety, color);
- sprite_draw_hline(sprite, x - offsetx, y + offsety,
- x + offsetx, color);
- sprite_draw_hline(sprite, x - offsetx, y - offsety,
- x + offsetx, color);
- sprite_draw_hline(sprite, x - offsety, y - offsetx,
- x + offsety, color);
-
- if (d >= 2 * offsetx) {
- d -= 2 * offsetx + 1;
- offsetx += 1;
- } else if (d < 2 * (radius - offsety)) {
- d += 2 * offsety - 1;
- offsety -= 1;
- } else {
- d += 2 * (offsety - offsetx - 1);
- offsety -= 1;
- offsetx += 1;
- }
- }
+ int offsetx = 0, offsety = radius, d = radius -1;
+
+ while (offsety >= offsetx) {
+ sprite_draw_hline(sprite, x - offsety, y + offsetx,
+ x + offsety, color);
+ sprite_draw_hline(sprite, x - offsetx, y + offsety,
+ x + offsetx, color);
+ sprite_draw_hline(sprite, x - offsetx, y - offsety,
+ x + offsetx, color);
+ sprite_draw_hline(sprite, x - offsety, y - offsetx,
+ x + offsety, color);
+
+ if (d >= 2 * offsetx) {
+ d -= 2 * offsetx + 1;
+ offsetx += 1;
+ } else if (d < 2 * (radius - offsety)) {
+ d += 2 * offsety - 1;
+ offsety -= 1;
+ } else {
+ d += 2 * (offsety - offsetx - 1);
+ offsety -= 1;
+ offsetx += 1;
+ }
+ }
}
static void sprite_anim_init(void)
{
- memset(&cicle_sprite, 0, sizeof(cicle_sprite));
- sprite_init(&cicle_sprite, 100, 100);
-
- sprite_draw_rect(&cicle_sprite, 0, 0, 100, 100, MK_COLOR(128, 128, 128));
+ memset(&cicle_sprite, 0, sizeof(cicle_sprite));
+ sprite_init(&cicle_sprite, 100, 100);
+ sprite_draw_rect(&cicle_sprite, 0, 0, 100, 100, MK_COLOR(128, 128, 128));
/* draw filled circle with center (50, 50), radius 50. */
- sprite_draw_circle(&cicle_sprite, 50, 50, 50, MK_COLOR(0, 0, 255));
+ sprite_draw_circle(&cicle_sprite, 50, 50, 50, MK_COLOR(0, 0, 255));
}
static void sprite_anim(data_t *data, uint32_t *addr)
{
- struct timeval tv1, tv2, tv_delta;
- uint64_t frame_ns = get_time_ns();
- double now = frame_ns / (double)NSECS_PER_SEC;
+ struct timeval tv1, tv2, tv_delta;
+ uint64_t frame_ns = get_time_ns();
+ double now = frame_ns / (double)NSECS_PER_SEC;
- gettimeofday(&tv1, NULL);
+ gettimeofday(&tv1, NULL);
- fbmem_draw_rect(addr, data->hdisplay, 0, 0,
- data->hdisplay, data->vdisplay, MK_COLOR(128, 128, 128));
+ fbmem_draw_rect(addr, data->hdisplay, 0, 0,
+ data->hdisplay, data->vdisplay, MK_COLOR(128, 128, 128));
/* red rectangle for checking tearing effect*/
- if (data->front) {
- fbmem_draw_rect(addr, data->hdisplay, 0, 0,
+ if (data->front) {
+ fbmem_draw_rect(addr, data->hdisplay, 0, 0,
30, data->vdisplay, MK_COLOR(191, 0, 0));
- }
+ }
/* draw 16 filled circles */
- for (int i = 0; i < 16; ++i) {
- double tv = now + i * 0.25;
- float x, y;
- x = data->hdisplay - 10.0f - 118.0f * i - 100.0f;
- y = data->vdisplay * 0.5f + cos(tv) * data->vdisplay * 0.35;
- sprite_paste(addr, data->hdisplay, &cicle_sprite, (uint32_t)x, (uint32_t)y);
- }
-
- gettimeofday(&tv2, NULL);
- timersub(&tv2, &tv1, &tv_delta);
-
- igt_debug("time of drawing: %ld ms\n", tv_delta.tv_usec / 1000);
+ for (int i = 0; i < 16; ++i) {
+ double tv = now + i * 0.25;
+ float x, y;
+ x = data->hdisplay - 10.0f - 118.0f * i - 100.0f;
+ y = data->vdisplay * 0.5f + cos(tv) * (double) data->vdisplay * 0.35f;
+ sprite_paste(addr, data->hdisplay, &cicle_sprite, (uint32_t)x, (uint32_t)y);
+ }
+
+ gettimeofday(&tv2, NULL);
+ timersub(&tv2, &tv1, &tv_delta);
+
+ igt_debug("time of drawing: %ld ms\n", tv_delta.tv_usec / 1000);
}
/*----------------------------------------------------------------------------*/
@@ -376,79 +371,79 @@ static void sprite_anim(data_t *data, uint32_t *addr)
*/
static bool is_freesync_video_mode(data_t *data, drmModeModeInfo *mode)
{
- drmModeModeInfo *base_mode = &data->modes[data->base_mode_index];
- uint32_t bm_clock = base_mode->clock;
+ drmModeModeInfo *base_mode = &data->modes[data->base_mode_index];
+ uint32_t bm_clock = base_mode->clock;
- if ( mode->hdisplay == data->hdisplay &&
- mode->vdisplay == data->vdisplay &&
- mode->clock == bm_clock &&
+ if (mode->hdisplay == data->hdisplay &&
+ mode->vdisplay == data->vdisplay &&
+ mode->clock == bm_clock &&
mode->type & DRM_MODE_TYPE_DRIVER) {
- return true;
- }
+ return true;
+ }
- return false;
+ return false;
}
static drmModeModeInfo* select_mode(
- data_t *data,
- uint32_t mode_type,
- int refresh_rate)
+ data_t *data,
+ uint32_t mode_type,
+ int refresh_rate)
{
int i;
- int index;
- drmModeModeInfo *mode = NULL;
+ int index;
+ drmModeModeInfo *mode = NULL;
igt_debug("select_mode: type=%d, refresh_rate=%d\n", mode_type, refresh_rate);
- switch (mode_type) {
- case FSV_BASE_MODE:
- index = data->base_mode_index;
- mode = &data->modes[index];
- break;
-
- case FSV_PREFERRED_MODE:
- index = data->preferred_mode_index;
- mode = &data->modes[index];
- break;
-
- case FSV_FREESYNC_VIDEO_MODE:
- for (i = 0; i < data->count_modes; i++) {
- mode = &data->modes[i];
- if ( mode->vrefresh == refresh_rate &&
- is_freesync_video_mode(data, mode)) {
- break;
- }
- }
+ switch (mode_type) {
+ case FSV_BASE_MODE:
+ index = data->base_mode_index;
+ mode = &data->modes[index];
+ break;
+
+ case FSV_PREFERRED_MODE:
+ index = data->preferred_mode_index;
+ mode = &data->modes[index];
+ break;
+
+ case FSV_FREESYNC_VIDEO_MODE:
+ for (i = 0; i < data->count_modes; i++) {
+ mode = &data->modes[i];
+ if (mode->vrefresh == refresh_rate &&
+ is_freesync_video_mode(data, mode)) {
+ break;
+ }
+ }
if (i == data->count_modes)
mode = NULL;
- break;
-
- case FSV_NON_FREESYNC_VIDEO_MODE:
- for (i = 0; i < data->count_modes; i++) {
- mode = &data->modes[i];
- if ( mode->vrefresh == refresh_rate &&
- !is_freesync_video_mode(data, mode)) {
- break;
- }
- }
+ break;
+
+ case FSV_NON_FREESYNC_VIDEO_MODE:
+ for (i = 0; i < data->count_modes; i++) {
+ mode = &data->modes[i];
+ if (mode->vrefresh == refresh_rate &&
+ !is_freesync_video_mode(data, mode)) {
+ break;
+ }
+ }
if (i == data->count_modes)
mode = NULL;
- break;
+ break;
- default:
- igt_assert("Cannot find mode with specified rate and type.");
- break;
- }
+ default:
+ igt_assert("Cannot find mode with specified rate and type.");
+ break;
+ }
if (mode) {
igt_info("selected mode:\n");
kmstest_dump_mode(mode);
}
- return mode;
+ return mode;
}
static int prepare_custom_mode(
- data_t *data,
+ data_t *data,
drmModeModeInfo *custom_mode,
uint32_t refresh_rate)
{
@@ -473,14 +468,13 @@ static int prepare_custom_mode(
return -1;
}
- num = (unsigned long long)base_mode->clock * 1000 * 1000;
- den = refresh_rate * 1000 * (unsigned long long)base_mode->htotal;
+ num = (unsigned long long) base_mode->clock * 1000 * 1000;
+ den = refresh_rate * 1000 * (unsigned long long) base_mode->htotal;
target_vtotal = num / den;
target_vtotal_diff = target_vtotal - base_mode->vtotal;
igt_debug("num=%lu, den=%lu, " \
- "target_vtotal=%lu, target_vtotal_diff=%lu, base_mode->vtotal=%d\n",
- num, den, target_vtotal, target_vtotal_diff, base_mode->vtotal
- );
+ "target_vtotal=%lu, target_vtotal_diff=%lu, base_mode->vtotal=%d\n",
+ num, den, target_vtotal, target_vtotal_diff, base_mode->vtotal);
/* Check for illegal modes */
if (base_mode->vsync_start + target_vtotal_diff < base_mode->vdisplay ||
@@ -489,9 +483,9 @@ static int prepare_custom_mode(
return -1;
*custom_mode = *base_mode;
- custom_mode->vtotal += (uint16_t)target_vtotal_diff;
- custom_mode->vsync_start += (uint16_t)target_vtotal_diff;
- custom_mode->vsync_end += (uint16_t)target_vtotal_diff;
+ custom_mode->vtotal += (uint16_t) target_vtotal_diff;
+ custom_mode->vsync_start += (uint16_t) target_vtotal_diff;
+ custom_mode->vsync_end += (uint16_t) target_vtotal_diff;
custom_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
custom_mode->type |= DRM_MODE_TYPE_DRIVER;
custom_mode->vrefresh = refresh_rate;
@@ -688,7 +682,7 @@ static void init_data(data_t *data, igt_output_t *output) {
connector = data->connector = output->config.connector;
data->count_modes = connector->count_modes;
- data->modes = (drmModeModeInfo *)malloc(sizeof(drmModeModeInfo) * data->count_modes);
+ data->modes = (drmModeModeInfo *) malloc(sizeof(drmModeModeInfo) * data->count_modes);
for (i = 0; i < data->count_modes; i++) {
data->modes[i] = connector->modes[i];
@@ -699,36 +693,35 @@ static void init_data(data_t *data, igt_output_t *output) {
}
/* searching the preferred mode */
- for (i = 0; i < connector->count_modes; i++) {
- drmModeModeInfo *mode = &connector->modes[i];
-
- if (mode->type & DRM_MODE_TYPE_PREFERRED) {
- data->preferred_mode_index = i;
+ for (i = 0; i < connector->count_modes; i++) {
+ drmModeModeInfo *mode = &connector->modes[i];
+ if (mode->type & DRM_MODE_TYPE_PREFERRED) {
+ data->preferred_mode_index = i;
data->hdisplay = mode->hdisplay;
data->vdisplay = mode->vdisplay;
pm_hdisplay = preferred_mode->hdisplay;
pm_vdisplay = preferred_mode->vdisplay;
break;
- }
- }
-
- /* searching the base mode; */
- for (i = 0; i < connector->count_modes; i++) {
- drmModeModeInfo *mode = &connector->modes[i];
- if (mode->hdisplay == pm_hdisplay && mode->vdisplay == pm_vdisplay) {
- if (mode->clock > max_clk) {
- max_clk = mode->clock;
- data->base_mode_index = i;
- }
- }
- }
- igt_info("preferred=%d, base=%d\n", data->preferred_mode_index, data->base_mode_index);
-
- for (i = 0; i < connector->count_modes; i++) {
- drmModeModeInfo *mode = &connector->modes[i];
- if (is_freesync_video_mode(data, mode))
- igt_debug("mode[%d] is freesync video mode.\n", i);
- }
+ }
+ }
+
+ /* searching the base mode */
+ for (i = 0; i < connector->count_modes; i++) {
+ drmModeModeInfo *mode = &connector->modes[i];
+ if (mode->hdisplay == pm_hdisplay && mode->vdisplay == pm_vdisplay) {
+ if (mode->clock > max_clk) {
+ max_clk = mode->clock;
+ data->base_mode_index = i;
+ }
+ }
+ }
+ igt_info("preferred=%d, base=%d\n", data->preferred_mode_index, data->base_mode_index);
+
+ for (i = 0; i < connector->count_modes; i++) {
+ drmModeModeInfo *mode = &connector->modes[i];
+ if (is_freesync_video_mode(data, mode))
+ igt_debug("mode[%d] is freesync video mode.\n", i);
+ }
data->range = get_vrr_range(data, output);
}
@@ -759,19 +752,19 @@ mode_transition(data_t *data, enum pipe pipe, igt_output_t *output, uint32_t sce
igt_info("stage-1:\n");
switch(scene) {
- case SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE:
+ case SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE:
mode_start = select_mode(data, FSV_BASE_MODE, 0);
- mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
+ mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
break;
- case SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE:
+ case SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE:
mode_start = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
- mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 120);
+ mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 120);
break;
- case SCENE_NON_FSV_MODE_TO_FSV_MODE:
+ case SCENE_NON_FSV_MODE_TO_FSV_MODE:
mode_start = select_mode(data, FSV_NON_FREESYNC_VIDEO_MODE, 60);
- mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
+ mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
break;
- case SCENE_BASE_MODE_TO_CUSTUM_MODE:
+ case SCENE_BASE_MODE_TO_CUSTUM_MODE:
mode_start = select_mode(data, FSV_BASE_MODE, 0);
prepare_custom_mode(data, &mode_custom, 72);
mode_playback = &mode_custom;
@@ -841,30 +834,30 @@ igt_main
}
/* Expectation: Modeset happens instantaneously without blanking */
- igt_describe("Test switch from base freesync mode to " \
- "various freesync video modes");
- igt_subtest("freesync-base-to-various")
- run_test(&data, SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE);
+ igt_describe("Test switch from base freesync mode to " \
+ "various freesync video modes");
+ igt_subtest("freesync-base-to-various")
+ run_test(&data, SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE);
/* Expectation: Modeset happens instantaneously without blanking */
- igt_describe("Test switching from lower refresh freesync mode to " \
- "another freesync mode with higher refresh rate");
- igt_subtest("freesync-lower-to-higher")
- run_test(&data, SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE);
+ igt_describe("Test switching from lower refresh freesync mode to " \
+ "another freesync mode with higher refresh rate");
+ igt_subtest("freesync-lower-to-higher")
+ run_test(&data, SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE);
/* Expectation: Full modeset is triggered. */
- igt_describe("Test switching from non preferred video mode to " \
- "one of freesync video mode");
- igt_subtest("freesync-non-preferred-to-freesync")
- run_test(&data, SCENE_NON_FSV_MODE_TO_FSV_MODE);
+ igt_describe("Test switching from non preferred video mode to " \
+ "one of freesync video mode");
+ igt_subtest("freesync-non-preferred-to-freesync")
+ run_test(&data, SCENE_NON_FSV_MODE_TO_FSV_MODE);
/* Expectation: Modeset happens instantaneously without blanking */
- igt_describe("Add custom mode through xrandr based on " \
- "base freesync mode and apply the new mode");
- igt_subtest("freesync-custom-mode")
- run_test(&data, SCENE_BASE_MODE_TO_CUSTUM_MODE);
+ igt_describe("Add custom mode through xrandr based on " \
+ "base freesync mode and apply the new mode");
+ igt_subtest("freesync-custom-mode")
+ run_test(&data, SCENE_BASE_MODE_TO_CUSTUM_MODE);
- igt_info("end of test\n");
+ igt_info("end of test\n");
igt_fixture {
igt_display_fini(&data.display);
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [igt-dev] [PATCH i-g-t 2/8] tests/amdgpu/amd_freesync_video_mode: Fix memory leak and corruption
2023-06-21 6:57 [igt-dev] [PATCH i-g-t 1/8] tests/amdgpu/amd_freesync_video_mode: Adjust indents and spacing Tom Chung
@ 2023-06-21 6:57 ` Tom Chung
2023-06-21 6:57 ` [igt-dev] [PATCH i-g-t 3/8] tests/amdgpu/amd_freesync_video_mode: Fix wrong resolution setting during the test Tom Chung
` (8 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Tom Chung @ 2023-06-21 6:57 UTC (permalink / raw)
To: igt-dev; +Cc: Tom Chung
[Why]
There are some memory leak and corruption during the test.
[How]
1. Memory allocated for cicle_sprite.data is too small for drawing the circle.
Adjust the circle radius from 50 to 48 to fit the cicle_sprite.data size.
2. Pointer preferred_mode does not point to a correct location.
Use the data->hdisplay and data->vdisplay instead of it.
3. Fix some code for boundary issues.
4. Add some error check for potential memory allocate failed.
5. Free some allocated memory and resources before exit test.
6. Use memcpy() to copy the data->modes data.
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
---
tests/amdgpu/amd_freesync_video_mode.c | 64 +++++++++++++++++---------
1 file changed, 43 insertions(+), 21 deletions(-)
diff --git a/tests/amdgpu/amd_freesync_video_mode.c b/tests/amdgpu/amd_freesync_video_mode.c
index fdcf1375f..8d809015f 100644
--- a/tests/amdgpu/amd_freesync_video_mode.c
+++ b/tests/amdgpu/amd_freesync_video_mode.c
@@ -327,8 +327,8 @@ static void sprite_anim_init(void)
memset(&cicle_sprite, 0, sizeof(cicle_sprite));
sprite_init(&cicle_sprite, 100, 100);
sprite_draw_rect(&cicle_sprite, 0, 0, 100, 100, MK_COLOR(128, 128, 128));
- /* draw filled circle with center (50, 50), radius 50. */
- sprite_draw_circle(&cicle_sprite, 50, 50, 50, MK_COLOR(0, 0, 255));
+ /* draw filled circle with center (50, 50), radius 48. */
+ sprite_draw_circle(&cicle_sprite, 50, 50, 48, MK_COLOR(0, 0, 255));
}
static void sprite_anim(data_t *data, uint32_t *addr)
@@ -413,7 +413,7 @@ static drmModeModeInfo* select_mode(
break;
}
}
- if (i == data->count_modes)
+ if (i >= data->count_modes)
mode = NULL;
break;
@@ -425,7 +425,7 @@ static drmModeModeInfo* select_mode(
break;
}
}
- if (i == data->count_modes)
+ if (i >= data->count_modes)
mode = NULL;
break;
@@ -506,7 +506,7 @@ static uint64_t nsec_per_frame(uint64_t refresh)
static range_t
get_vrr_range(data_t *data, igt_output_t *output)
{
- char buf[256];
+ char buf[256] = {0};
char *start_loc;
int fd, res;
range_t range;
@@ -557,19 +557,27 @@ static void prepare_test(
/* Prepare resources */
if (!data->fb_initialized) {
- igt_create_fb(data->drm_fd, mode->hdisplay, mode->vdisplay,
- DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_LINEAR, &data->fbs[0]);
+ int fb_id;
+
+ fb_id = igt_create_fb(data->drm_fd, mode->hdisplay, mode->vdisplay,
+ DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_LINEAR, &data->fbs[0]);
+ igt_assert(fb_id);
+
+ fb_id = igt_create_fb(data->drm_fd, mode->hdisplay, mode->vdisplay,
+ DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_LINEAR, &data->fbs[1]);
+ igt_assert(fb_id);
- igt_create_fb(data->drm_fd, mode->hdisplay, mode->vdisplay,
- DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_LINEAR, &data->fbs[1]);
data->fb_mem[0] = igt_fb_map_buffer(data->drm_fd, &data->fbs[0]);
data->fb_mem[1] = igt_fb_map_buffer(data->drm_fd, &data->fbs[1]);
+
+ fbmem_draw_smpte_pattern(data->fb_mem[0],
+ data->hdisplay, data->vdisplay);
+ fbmem_draw_smpte_pattern(data->fb_mem[1],
+ data->hdisplay, data->vdisplay);
+
data->fb_initialized = true;
}
- fbmem_draw_smpte_pattern(data->fb_mem[0], data->hdisplay, data->vdisplay);
- fbmem_draw_smpte_pattern(data->fb_mem[1], data->hdisplay, data->vdisplay);
-
/* Take care of any required modesetting before the test begins. */
data->primary = igt_output_get_plane_type(output, DRM_PLANE_TYPE_PRIMARY);
igt_plane_set_fb(data->primary, &data->fbs[0]);
@@ -676,21 +684,22 @@ flip_and_measure(
static void init_data(data_t *data, igt_output_t *output) {
int i;
- uint32_t pm_hdisplay, pm_vdisplay, max_clk = 0;
- drmModeModeInfo *preferred_mode;
+ uint32_t max_clk = 0;
drmModeConnector *connector;
connector = data->connector = output->config.connector;
data->count_modes = connector->count_modes;
data->modes = (drmModeModeInfo *) malloc(sizeof(drmModeModeInfo) * data->count_modes);
+ igt_assert(data->modes);
+ memcpy(data->modes, connector->modes,
+ sizeof(drmModeModeInfo) * data->count_modes);
- for (i = 0; i < data->count_modes; i++) {
- data->modes[i] = connector->modes[i];
#ifdef FSV_DEBUG
+ for (i = 0; i < data->count_modes; i++) {
igt_info("mode %d:", i);
kmstest_dump_mode(&data->modes[i]);
-#endif
}
+#endif
/* searching the preferred mode */
for (i = 0; i < connector->count_modes; i++) {
@@ -699,8 +708,6 @@ static void init_data(data_t *data, igt_output_t *output) {
data->preferred_mode_index = i;
data->hdisplay = mode->hdisplay;
data->vdisplay = mode->vdisplay;
- pm_hdisplay = preferred_mode->hdisplay;
- pm_vdisplay = preferred_mode->vdisplay;
break;
}
}
@@ -708,7 +715,7 @@ static void init_data(data_t *data, igt_output_t *output) {
/* searching the base mode */
for (i = 0; i < connector->count_modes; i++) {
drmModeModeInfo *mode = &connector->modes[i];
- if (mode->hdisplay == pm_hdisplay && mode->vdisplay == pm_vdisplay) {
+ if (mode->hdisplay == data->hdisplay && mode->vdisplay == data->vdisplay) {
if (mode->clock > max_clk) {
max_clk = mode->clock;
data->base_mode_index = i;
@@ -738,11 +745,22 @@ static void finish_test(data_t *data, enum pipe pipe, igt_output_t *output)
igt_fb_unmap_buffer(&data->fbs[0], data->fb_mem[0]);
igt_remove_fb(data->drm_fd, &data->fbs[1]);
igt_remove_fb(data->drm_fd, &data->fbs[0]);
+
+ data->fb_initialized = false;
+ if(data->modes) {
+ free(data->modes);
+ data->modes = NULL;
+ }
+ if(cicle_sprite.data) {
+ free(cicle_sprite.data);
+ memset(&cicle_sprite, 0, sizeof(cicle_sprite));
+ }
}
static void
mode_transition(data_t *data, enum pipe pipe, igt_output_t *output, uint32_t scene)
{
+ int ret;
uint32_t result;
uint64_t interval;
drmModeModeInfo *mode_start = NULL, *mode_playback = NULL, mode_custom;
@@ -766,7 +784,8 @@ mode_transition(data_t *data, enum pipe pipe, igt_output_t *output, uint32_t sce
break;
case SCENE_BASE_MODE_TO_CUSTUM_MODE:
mode_start = select_mode(data, FSV_BASE_MODE, 0);
- prepare_custom_mode(data, &mode_custom, 72);
+ ret = prepare_custom_mode(data, &mode_custom, 72);
+ igt_assert_eq(ret, 0);
mode_playback = &mode_custom;
break;
case SCENE_NON_FSV_MODE_TO_NON_FSV_MODE:
@@ -861,5 +880,8 @@ igt_main
igt_fixture {
igt_display_fini(&data.display);
+ close(data.drm_fd);
+ if(data.modes)
+ free(data.modes);
}
}
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [igt-dev] [PATCH i-g-t 3/8] tests/amdgpu/amd_freesync_video_mode: Fix wrong resolution setting during the test
2023-06-21 6:57 [igt-dev] [PATCH i-g-t 1/8] tests/amdgpu/amd_freesync_video_mode: Adjust indents and spacing Tom Chung
2023-06-21 6:57 ` [igt-dev] [PATCH i-g-t 2/8] tests/amdgpu/amd_freesync_video_mode: Fix memory leak and corruption Tom Chung
@ 2023-06-21 6:57 ` Tom Chung
2023-06-21 6:57 ` [igt-dev] [PATCH i-g-t 4/8] tests/amdgpu/amd_freesync_video_mode: Add some code from kms_vrr to resolve tearing issue Tom Chung
` (7 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Tom Chung @ 2023-06-21 6:57 UTC (permalink / raw)
To: igt-dev; +Cc: Tom Chung
[Why]
Some monitors may have different resolution for non-Freesync video mode and it may
cause the IGT test set to a wrong resolution during the test.
[How]
Check the resolution and use the same one during select the video mode.
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
---
tests/amdgpu/amd_freesync_video_mode.c | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/tests/amdgpu/amd_freesync_video_mode.c b/tests/amdgpu/amd_freesync_video_mode.c
index 8d809015f..a7b10886d 100644
--- a/tests/amdgpu/amd_freesync_video_mode.c
+++ b/tests/amdgpu/amd_freesync_video_mode.c
@@ -420,10 +420,11 @@ static drmModeModeInfo* select_mode(
case FSV_NON_FREESYNC_VIDEO_MODE:
for (i = 0; i < data->count_modes; i++) {
mode = &data->modes[i];
- if (mode->vrefresh == refresh_rate &&
- !is_freesync_video_mode(data, mode)) {
- break;
- }
+ if (mode->hdisplay == data->hdisplay &&
+ mode->vdisplay == data->vdisplay &&
+ mode->vrefresh == refresh_rate &&
+ !is_freesync_video_mode(data, mode))
+ break;
}
if (i >= data->count_modes)
mode = NULL;
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [igt-dev] [PATCH i-g-t 4/8] tests/amdgpu/amd_freesync_video_mode: Add some code from kms_vrr to resolve tearing issue
2023-06-21 6:57 [igt-dev] [PATCH i-g-t 1/8] tests/amdgpu/amd_freesync_video_mode: Adjust indents and spacing Tom Chung
2023-06-21 6:57 ` [igt-dev] [PATCH i-g-t 2/8] tests/amdgpu/amd_freesync_video_mode: Fix memory leak and corruption Tom Chung
2023-06-21 6:57 ` [igt-dev] [PATCH i-g-t 3/8] tests/amdgpu/amd_freesync_video_mode: Fix wrong resolution setting during the test Tom Chung
@ 2023-06-21 6:57 ` Tom Chung
2023-06-21 6:57 ` [igt-dev] [PATCH i-g-t 5/8] tests/amdgpu/amd_freesync_video_mode: Add/remove some test progress messages Tom Chung
` (6 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Tom Chung @ 2023-06-21 6:57 UTC (permalink / raw)
To: igt-dev; +Cc: Tom Chung
[Why]
There is a tearing video issue during the stage-2 animation test.
[How]
1. Refer to the kms_vrr IGT code, it needs some delay before the the next flip and
add some warmup time before do the flip and measure to make the test more accurate.
2. Change the target refresh rate percentage to 75% to align with the kms_vrr test.
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
---
tests/amdgpu/amd_freesync_video_mode.c | 21 +++++++++++++++++----
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/tests/amdgpu/amd_freesync_video_mode.c b/tests/amdgpu/amd_freesync_video_mode.c
index a7b10886d..073f91084 100644
--- a/tests/amdgpu/amd_freesync_video_mode.c
+++ b/tests/amdgpu/amd_freesync_video_mode.c
@@ -26,7 +26,7 @@
#include <signal.h>
#define NSECS_PER_SEC (1000000000ull)
-#define TEST_DURATION_NS (10 * NSECS_PER_SEC)
+#define TEST_DURATION_NS (8 * NSECS_PER_SEC)
#define BYTES_PER_PIXEL 4
#define MK_COLOR(r, g, b) ((0 << 24) | (r << 16) | (g << 8) | b)
@@ -640,7 +640,7 @@ flip_and_measure(
igt_info("interval_ns=%lu\n", interval_ns);
for (;;) {
- uint64_t event_ns;
+ uint64_t event_ns, wait_ns;
int64_t diff_ns;
data->front = !data->front;
@@ -675,6 +675,18 @@ flip_and_measure(
if (event_ns - start_ns > duration_ns)
break;
+
+ /*
+ * Burn CPU until next timestamp, sleeping isn't accurate enough.
+ * The target timestamp is based on the delta b/w event timestamps
+ * and whatever the time left to reach the expected refresh rate.
+ */
+ diff_ns = event_ns - target_ns;
+ wait_ns = ((diff_ns + interval_ns - 1) / interval_ns) * interval_ns;
+ wait_ns -= diff_ns;
+ target_ns = event_ns + wait_ns;
+
+ while (get_time_ns() < target_ns - 10);
}
igt_info("Completed %u flips, %u were in threshold for (%llu Hz) %"PRIu64"ns.\n",
@@ -807,9 +819,10 @@ mode_transition(data_t *data, enum pipe pipe, igt_output_t *output, uint32_t sce
igt_info("stage-2: simple animation as video playback\n");
prepare_test(data, output, pipe, mode_playback);
interval = nsec_per_frame(mode_playback->vrefresh) ;
+ /* Do a short run with VRR before measure to make sure we measure in a stable state */
+ result = flip_and_measure(data, output, pipe, interval, 2 * NSECS_PER_SEC, ANIM_TYPE_CIRCLE_WAVE);
result = flip_and_measure(data, output, pipe, interval, TEST_DURATION_NS, ANIM_TYPE_CIRCLE_WAVE);
- igt_assert_f(result > 90, "Target refresh rate not meet(result=%d%%\n", result);
-
+ igt_assert_f(result > 75, "Target refresh rate not meet 75%% (result=%d%%\n", result);
finish_test(data, pipe, output);
}
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [igt-dev] [PATCH i-g-t 5/8] tests/amdgpu/amd_freesync_video_mode: Add/remove some test progress messages
2023-06-21 6:57 [igt-dev] [PATCH i-g-t 1/8] tests/amdgpu/amd_freesync_video_mode: Adjust indents and spacing Tom Chung
` (2 preceding siblings ...)
2023-06-21 6:57 ` [igt-dev] [PATCH i-g-t 4/8] tests/amdgpu/amd_freesync_video_mode: Add some code from kms_vrr to resolve tearing issue Tom Chung
@ 2023-06-21 6:57 ` Tom Chung
2023-06-21 6:57 ` [igt-dev] [PATCH i-g-t 6/8] tests/amdgpu/amd_freesync_video_mode: Move the vrr setting and display reset Tom Chung
` (5 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Tom Chung @ 2023-06-21 6:57 UTC (permalink / raw)
To: igt-dev; +Cc: Tom Chung
1. Add/remove some test progress messages.
2. Change the variable name "range" to "vrr_range" to make the code clear.
3. Switch to igt_subtest_with_dynamic.
It can get more progress messages during the test.
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
---
tests/amdgpu/amd_freesync_video_mode.c | 47 +++++++++++++++-----------
1 file changed, 28 insertions(+), 19 deletions(-)
diff --git a/tests/amdgpu/amd_freesync_video_mode.c b/tests/amdgpu/amd_freesync_video_mode.c
index 073f91084..fd27c39e5 100644
--- a/tests/amdgpu/amd_freesync_video_mode.c
+++ b/tests/amdgpu/amd_freesync_video_mode.c
@@ -60,7 +60,7 @@ typedef struct data {
uint32_t *fb_mem[2];
int front;
bool fb_initialized;
- range_t range;
+ range_t vrr_range;
drmModeConnector *connector;
drmModeModeInfo *modes;
@@ -431,14 +431,15 @@ static drmModeModeInfo* select_mode(
break;
default:
- igt_assert("Cannot find mode with specified rate and type.");
+ igt_skip("Cannot find the specified mode type.\n");
break;
}
if (mode) {
igt_info("selected mode:\n");
kmstest_dump_mode(mode);
- }
+ } else
+ igt_skip("Cannot find the mode with specified rate and type.\n");
return mode;
}
@@ -462,10 +463,10 @@ static int prepare_custom_mode(
return -1;
}
- if (refresh_rate < data->range.min ||
- refresh_rate > data->range.max) {
+ if (refresh_rate < data->vrr_range.min ||
+ refresh_rate > data->vrr_range.max) {
igt_warn("The given refresh rate(%u) should be between the rage of: min=%d, max=%d\n",
- refresh_rate, data->range.min, data->range.max);
+ refresh_rate, data->vrr_range.min, data->vrr_range.max);
return -1;
}
@@ -525,6 +526,7 @@ get_vrr_range(data_t *data, igt_output_t *output)
igt_assert(start_loc = strstr(buf, "Max: "));
igt_assert_eq(sscanf(start_loc, "Max: %u", &range.max), 1);
+ igt_info("VRR Range: %u-%u Hz\n",range.min, range.max );
return range;
}
@@ -637,7 +639,7 @@ flip_and_measure(
do_flip(data);
start_ns = last_event_ns = target_ns = get_kernel_event_ns(data,
DRM_EVENT_FLIP_COMPLETE);
- igt_info("interval_ns=%lu\n", interval_ns);
+ igt_debug("interval_ns=%lu\n", interval_ns);
for (;;) {
uint64_t event_ns, wait_ns;
@@ -689,8 +691,9 @@ flip_and_measure(
while (get_time_ns() < target_ns - 10);
}
- igt_info("Completed %u flips, %u were in threshold for (%llu Hz) %"PRIu64"ns.\n",
- total_flip, total_pass, (NSECS_PER_SEC / interval_ns), interval_ns);
+ igt_info("Completed %u flips, %u were in threshold (Rate: %u%%) for (%llu Hz) %"PRIu64"ns.\n",
+ total_flip, total_pass, total_flip ? ((total_pass * 100) / total_flip) : 0,
+ (NSECS_PER_SEC / interval_ns), interval_ns);
return total_flip ? ((total_pass * 100) / total_flip) : 0;
}
@@ -735,7 +738,6 @@ static void init_data(data_t *data, igt_output_t *output) {
}
}
}
- igt_info("preferred=%d, base=%d\n", data->preferred_mode_index, data->base_mode_index);
for (i = 0; i < connector->count_modes; i++) {
drmModeModeInfo *mode = &connector->modes[i];
@@ -743,7 +745,7 @@ static void init_data(data_t *data, igt_output_t *output) {
igt_debug("mode[%d] is freesync video mode.\n", i);
}
- data->range = get_vrr_range(data, output);
+ data->vrr_range = get_vrr_range(data, output);
}
static void finish_test(data_t *data, enum pipe pipe, igt_output_t *output)
@@ -781,7 +783,6 @@ mode_transition(data_t *data, enum pipe pipe, igt_output_t *output, uint32_t sce
init_data(data, output);
sprite_anim_init();
- igt_info("stage-1:\n");
switch(scene) {
case SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE:
mode_start = select_mode(data, FSV_BASE_MODE, 0);
@@ -811,12 +812,14 @@ mode_transition(data_t *data, enum pipe pipe, igt_output_t *output, uint32_t sce
}
igt_assert_f(mode_start && mode_playback,
"Failure on selecting mode with given type and refresh rate.\n");
+
+ igt_info("stage-1: fps:%d\n", mode_start->vrefresh);
prepare_test(data, output, pipe, mode_start);
interval = nsec_per_frame(mode_start->vrefresh) ;
- set_vrr_on_pipe(data, pipe, 1);
+ set_vrr_on_pipe(data, pipe, true);
result = flip_and_measure(data, output, pipe, interval, TEST_DURATION_NS, ANIM_TYPE_SMPTE);
- igt_info("stage-2: simple animation as video playback\n");
+ igt_info("stage-2: simple animation as video playback fps:%d\n", mode_playback->vrefresh);
prepare_test(data, output, pipe, mode_playback);
interval = nsec_per_frame(mode_playback->vrefresh) ;
/* Do a short run with VRR before measure to make sure we measure in a stable state */
@@ -826,6 +829,7 @@ mode_transition(data_t *data, enum pipe pipe, igt_output_t *output, uint32_t sce
finish_test(data, pipe, output);
}
+/* Runs tests on outputs that are VRR capable. */
static void
run_test(data_t *data, uint32_t scene)
{
@@ -835,11 +839,16 @@ run_test(data_t *data, uint32_t scene)
for_each_connected_output(&data->display, output) {
enum pipe pipe;
- if (!has_vrr(output))
+ if (!has_vrr(output)) {
+ igt_info("%s is not a vrr capable output. Skip it.\n",
+ output->name);
continue;
+ }
for_each_pipe(&data->display, pipe)
if (igt_pipe_connector_valid(pipe, output)) {
+ igt_dynamic_f("pipe-%s-%s",
+ kmstest_pipe_name(pipe), output->name)
mode_transition(data, pipe, output, scene);
found = true;
break;
@@ -869,25 +878,25 @@ igt_main
/* Expectation: Modeset happens instantaneously without blanking */
igt_describe("Test switch from base freesync mode to " \
"various freesync video modes");
- igt_subtest("freesync-base-to-various")
+ igt_subtest_with_dynamic("freesync-base-to-various")
run_test(&data, SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE);
/* Expectation: Modeset happens instantaneously without blanking */
igt_describe("Test switching from lower refresh freesync mode to " \
"another freesync mode with higher refresh rate");
- igt_subtest("freesync-lower-to-higher")
+ igt_subtest_with_dynamic("freesync-lower-to-higher")
run_test(&data, SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE);
/* Expectation: Full modeset is triggered. */
igt_describe("Test switching from non preferred video mode to " \
"one of freesync video mode");
- igt_subtest("freesync-non-preferred-to-freesync")
+ igt_subtest_with_dynamic("freesync-non-preferred-to-freesync")
run_test(&data, SCENE_NON_FSV_MODE_TO_FSV_MODE);
/* Expectation: Modeset happens instantaneously without blanking */
igt_describe("Add custom mode through xrandr based on " \
"base freesync mode and apply the new mode");
- igt_subtest("freesync-custom-mode")
+ igt_subtest_with_dynamic("freesync-custom-mode")
run_test(&data, SCENE_BASE_MODE_TO_CUSTUM_MODE);
igt_info("end of test\n");
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [igt-dev] [PATCH i-g-t 6/8] tests/amdgpu/amd_freesync_video_mode: Move the vrr setting and display reset
2023-06-21 6:57 [igt-dev] [PATCH i-g-t 1/8] tests/amdgpu/amd_freesync_video_mode: Adjust indents and spacing Tom Chung
` (3 preceding siblings ...)
2023-06-21 6:57 ` [igt-dev] [PATCH i-g-t 5/8] tests/amdgpu/amd_freesync_video_mode: Add/remove some test progress messages Tom Chung
@ 2023-06-21 6:57 ` Tom Chung
2023-06-21 6:57 ` [igt-dev] [PATCH i-g-t 7/8] tests/amdgpu/amd_freesync_video_mode: Fix wrong resolution setting for some panel Tom Chung
` (4 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Tom Chung @ 2023-06-21 6:57 UTC (permalink / raw)
To: igt-dev; +Cc: Tom Chung
[Why]
We don't need to do the display reset and vrr enable/disable in the middle of the test.
[How]
Move the display reset output and vrr enable/disable setting to the begin/end of the test.
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
---
tests/amdgpu/amd_freesync_video_mode.c | 20 +++++++-------------
1 file changed, 7 insertions(+), 13 deletions(-)
diff --git a/tests/amdgpu/amd_freesync_video_mode.c b/tests/amdgpu/amd_freesync_video_mode.c
index fd27c39e5..000de4c84 100644
--- a/tests/amdgpu/amd_freesync_video_mode.c
+++ b/tests/amdgpu/amd_freesync_video_mode.c
@@ -552,12 +552,6 @@ static void prepare_test(
enum pipe pipe,
drmModeModeInfo *mode)
{
- /* Reset output */
- igt_display_reset(&data->display);
- igt_output_set_pipe(output, pipe);
-
- igt_output_override_mode(output, mode);
-
/* Prepare resources */
if (!data->fb_initialized) {
int fb_id;
@@ -581,15 +575,11 @@ static void prepare_test(
data->fb_initialized = true;
}
+ /* set output mode */
+ igt_output_override_mode(output, mode);
/* Take care of any required modesetting before the test begins. */
data->primary = igt_output_get_plane_type(output, DRM_PLANE_TYPE_PRIMARY);
igt_plane_set_fb(data->primary, &data->fbs[0]);
-
- /* Clear vrr_enabled state before enabling it, because
- * it might be left enabled if the previous test fails.
- */
- igt_pipe_set_prop_value(&data->display, pipe, IGT_CRTC_VRR_ENABLED, 0);
-
igt_display_commit2(&data->display, COMMIT_ATOMIC);
}
@@ -750,7 +740,6 @@ static void init_data(data_t *data, igt_output_t *output) {
static void finish_test(data_t *data, enum pipe pipe, igt_output_t *output)
{
- set_vrr_on_pipe(data, pipe, 0);
igt_plane_set_fb(data->primary, NULL);
igt_output_set_pipe(output, PIPE_NONE);
igt_output_override_mode(output, NULL);
@@ -826,6 +815,8 @@ mode_transition(data_t *data, enum pipe pipe, igt_output_t *output, uint32_t sce
result = flip_and_measure(data, output, pipe, interval, 2 * NSECS_PER_SEC, ANIM_TYPE_CIRCLE_WAVE);
result = flip_and_measure(data, output, pipe, interval, TEST_DURATION_NS, ANIM_TYPE_CIRCLE_WAVE);
igt_assert_f(result > 75, "Target refresh rate not meet 75%% (result=%d%%\n", result);
+ set_vrr_on_pipe(data, pipe, false);
+
finish_test(data, pipe, output);
}
@@ -847,6 +838,9 @@ run_test(data_t *data, uint32_t scene)
for_each_pipe(&data->display, pipe)
if (igt_pipe_connector_valid(pipe, output)) {
+ igt_display_reset(&data->display);
+ igt_output_set_pipe(output, pipe);
+
igt_dynamic_f("pipe-%s-%s",
kmstest_pipe_name(pipe), output->name)
mode_transition(data, pipe, output, scene);
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [igt-dev] [PATCH i-g-t 7/8] tests/amdgpu/amd_freesync_video_mode: Fix wrong resolution setting for some panel
2023-06-21 6:57 [igt-dev] [PATCH i-g-t 1/8] tests/amdgpu/amd_freesync_video_mode: Adjust indents and spacing Tom Chung
` (4 preceding siblings ...)
2023-06-21 6:57 ` [igt-dev] [PATCH i-g-t 6/8] tests/amdgpu/amd_freesync_video_mode: Move the vrr setting and display reset Tom Chung
@ 2023-06-21 6:57 ` Tom Chung
2023-06-21 6:57 ` [igt-dev] [PATCH i-g-t 8/8] tests/amdgpu/amd_freesync_video_mode: Add amd_freesync_video_mode to meson.build Tom Chung
` (3 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Tom Chung @ 2023-06-21 6:57 UTC (permalink / raw)
To: igt-dev; +Cc: Tom Chung
[Why]
Some eDP panel VRR range only has 48-60Hz and it will cause some of the test failed.
[How]
Use the VRR range fps to select the mode for test.
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
---
tests/amdgpu/amd_freesync_video_mode.c | 27 +++++++++++++++++---------
1 file changed, 18 insertions(+), 9 deletions(-)
diff --git a/tests/amdgpu/amd_freesync_video_mode.c b/tests/amdgpu/amd_freesync_video_mode.c
index 000de4c84..be8ff3221 100644
--- a/tests/amdgpu/amd_freesync_video_mode.c
+++ b/tests/amdgpu/amd_freesync_video_mode.c
@@ -420,11 +420,18 @@ static drmModeModeInfo* select_mode(
case FSV_NON_FREESYNC_VIDEO_MODE:
for (i = 0; i < data->count_modes; i++) {
mode = &data->modes[i];
- if (mode->hdisplay == data->hdisplay &&
- mode->vdisplay == data->vdisplay &&
- mode->vrefresh == refresh_rate &&
- !is_freesync_video_mode(data, mode))
- break;
+ if (refresh_rate > 0) {
+ if (mode->hdisplay == data->hdisplay &&
+ mode->vdisplay == data->vdisplay &&
+ mode->vrefresh == refresh_rate &&
+ !is_freesync_video_mode(data, mode))
+ break;
+ } else {
+ if (mode->hdisplay == data->hdisplay &&
+ mode->vdisplay == data->vdisplay &&
+ !is_freesync_video_mode(data, mode))
+ break;
+ }
}
if (i >= data->count_modes)
mode = NULL;
@@ -778,16 +785,18 @@ mode_transition(data_t *data, enum pipe pipe, igt_output_t *output, uint32_t sce
mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
break;
case SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE:
- mode_start = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
- mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 120);
+ mode_start = select_mode(data, FSV_FREESYNC_VIDEO_MODE,
+ data->vrr_range.min);
+ mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE,
+ data->vrr_range.max);
break;
case SCENE_NON_FSV_MODE_TO_FSV_MODE:
- mode_start = select_mode(data, FSV_NON_FREESYNC_VIDEO_MODE, 60);
+ mode_start = select_mode(data, FSV_NON_FREESYNC_VIDEO_MODE, 0);
mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
break;
case SCENE_BASE_MODE_TO_CUSTUM_MODE:
mode_start = select_mode(data, FSV_BASE_MODE, 0);
- ret = prepare_custom_mode(data, &mode_custom, 72);
+ ret = prepare_custom_mode(data, &mode_custom, data->vrr_range.min);
igt_assert_eq(ret, 0);
mode_playback = &mode_custom;
break;
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [igt-dev] [PATCH i-g-t 8/8] tests/amdgpu/amd_freesync_video_mode: Add amd_freesync_video_mode to meson.build
2023-06-21 6:57 [igt-dev] [PATCH i-g-t 1/8] tests/amdgpu/amd_freesync_video_mode: Adjust indents and spacing Tom Chung
` (5 preceding siblings ...)
2023-06-21 6:57 ` [igt-dev] [PATCH i-g-t 7/8] tests/amdgpu/amd_freesync_video_mode: Fix wrong resolution setting for some panel Tom Chung
@ 2023-06-21 6:57 ` Tom Chung
2023-06-21 14:55 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/8] tests/amdgpu/amd_freesync_video_mode: Adjust indents and spacing Patchwork
` (2 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Tom Chung @ 2023-06-21 6:57 UTC (permalink / raw)
To: igt-dev; +Cc: Tom Chung
Add amd_freesync_video_mode to meson.build file.
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
---
tests/amdgpu/meson.build | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/amdgpu/meson.build b/tests/amdgpu/meson.build
index ce081c35a..2226e5079 100644
--- a/tests/amdgpu/meson.build
+++ b/tests/amdgpu/meson.build
@@ -24,6 +24,7 @@ if libdrm_amdgpu.found()
'amd_psr',
'amd_plane',
'amd_ilr',
+ 'amd_freesync_video_mode',
]
amdgpu_deps += libdrm_amdgpu
endif
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/8] tests/amdgpu/amd_freesync_video_mode: Adjust indents and spacing
2023-06-21 6:57 [igt-dev] [PATCH i-g-t 1/8] tests/amdgpu/amd_freesync_video_mode: Adjust indents and spacing Tom Chung
` (6 preceding siblings ...)
2023-06-21 6:57 ` [igt-dev] [PATCH i-g-t 8/8] tests/amdgpu/amd_freesync_video_mode: Add amd_freesync_video_mode to meson.build Tom Chung
@ 2023-06-21 14:55 ` Patchwork
2023-06-22 3:34 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
2023-06-28 20:57 ` [igt-dev] [PATCH i-g-t 1/8] " Kamil Konieczny
9 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2023-06-21 14:55 UTC (permalink / raw)
To: Tom Chung; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 9745 bytes --]
== Series Details ==
Series: series starting with [i-g-t,1/8] tests/amdgpu/amd_freesync_video_mode: Adjust indents and spacing
URL : https://patchwork.freedesktop.org/series/119675/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13299 -> IGTPW_9232
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/index.html
Participating hosts (41 -> 43)
------------------------------
Additional (3): fi-kbl-soraka bat-dg1-8 fi-pnv-d510
Missing (1): fi-snb-2520m
Known issues
------------
Here are the changes found in IGTPW_9232 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@debugfs_test@basic-hwmon:
- bat-adlp-11: NOTRUN -> [SKIP][1] ([i915#7456])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/bat-adlp-11/igt@debugfs_test@basic-hwmon.html
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#2190])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#4613]) +3 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/fi-kbl-soraka/igt@gem_lmem_swapping@basic.html
* igt@gem_tiled_pread_basic:
- bat-adlp-11: NOTRUN -> [SKIP][4] ([i915#3282])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/bat-adlp-11/igt@gem_tiled_pread_basic.html
* igt@i915_selftest@live@gt_mocs:
- bat-mtlp-8: [PASS][5] -> [DMESG-FAIL][6] ([i915#7059])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/bat-mtlp-8/igt@i915_selftest@live@gt_mocs.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/bat-mtlp-8/igt@i915_selftest@live@gt_mocs.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][7] ([i915#1886] / [i915#7913])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@guc:
- bat-rpls-1: [PASS][8] -> [DMESG-WARN][9] ([i915#7852])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/bat-rpls-1/igt@i915_selftest@live@guc.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/bat-rpls-1/igt@i915_selftest@live@guc.html
* igt@i915_selftest@live@requests:
- bat-rpls-2: [PASS][10] -> [ABORT][11] ([i915#7913])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/bat-rpls-2/igt@i915_selftest@live@requests.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/bat-rpls-2/igt@i915_selftest@live@requests.html
* igt@i915_selftest@live@slpc:
- bat-rpls-1: [PASS][12] -> [DMESG-WARN][13] ([i915#6367])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/bat-rpls-1/igt@i915_selftest@live@slpc.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/bat-rpls-1/igt@i915_selftest@live@slpc.html
* igt@kms_chamelium_frames@hdmi-crc-fast:
- bat-adlp-11: NOTRUN -> [SKIP][14] ([i915#7828]) +7 similar issues
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/bat-adlp-11/igt@kms_chamelium_frames@hdmi-crc-fast.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-kbl-soraka: NOTRUN -> [SKIP][15] ([fdo#109271]) +14 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/fi-kbl-soraka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-adlp-11: NOTRUN -> [SKIP][16] ([i915#4103]) +1 similar issue
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/bat-adlp-11/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_force_connector_basic@prune-stale-modes:
- bat-adlp-11: NOTRUN -> [SKIP][17] ([i915#4093]) +3 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/bat-adlp-11/igt@kms_force_connector_basic@prune-stale-modes.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: NOTRUN -> [SKIP][18] ([i915#1845] / [i915#5354]) +1 similar issue
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1:
- bat-dg2-8: [PASS][19] -> [FAIL][20] ([i915#7932])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1.html
* igt@kms_pipe_crc_basic@suspend-read-crc:
- fi-bsw-nick: NOTRUN -> [SKIP][21] ([fdo#109271]) +1 similar issue
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/fi-bsw-nick/igt@kms_pipe_crc_basic@suspend-read-crc.html
* igt@kms_psr@primary_page_flip:
- fi-pnv-d510: NOTRUN -> [SKIP][22] ([fdo#109271]) +37 similar issues
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/fi-pnv-d510/igt@kms_psr@primary_page_flip.html
* igt@kms_setmode@basic-clone-single-crtc:
- fi-kbl-soraka: NOTRUN -> [SKIP][23] ([fdo#109271] / [i915#4579])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/fi-kbl-soraka/igt@kms_setmode@basic-clone-single-crtc.html
- fi-pnv-d510: NOTRUN -> [SKIP][24] ([fdo#109271] / [i915#4579])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/fi-pnv-d510/igt@kms_setmode@basic-clone-single-crtc.html
#### Possible fixes ####
* igt@i915_module_load@load:
- bat-adlp-11: [ABORT][25] ([i915#4423]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/bat-adlp-11/igt@i915_module_load@load.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/bat-adlp-11/igt@i915_module_load@load.html
* igt@i915_selftest@live@execlists:
- fi-bsw-nick: [ABORT][27] ([i915#7913]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/fi-bsw-nick/igt@i915_selftest@live@execlists.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/fi-bsw-nick/igt@i915_selftest@live@execlists.html
#### Warnings ####
* igt@kms_setmode@basic-clone-single-crtc:
- bat-rplp-1: [SKIP][29] ([i915#3555] / [i915#4579]) -> [ABORT][30] ([i915#4579] / [i915#8260])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/bat-rplp-1/igt@kms_setmode@basic-clone-single-crtc.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/bat-rplp-1/igt@kms_setmode@basic-clone-single-crtc.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4093]: https://gitlab.freedesktop.org/drm/intel/issues/4093
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4309]: https://gitlab.freedesktop.org/drm/intel/issues/4309
[i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
[i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
[i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#7059]: https://gitlab.freedesktop.org/drm/intel/issues/7059
[i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7852]: https://gitlab.freedesktop.org/drm/intel/issues/7852
[i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
[i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932
[i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
[i915#8260]: https://gitlab.freedesktop.org/drm/intel/issues/8260
[i915#8513]: https://gitlab.freedesktop.org/drm/intel/issues/8513
[i915#8676]: https://gitlab.freedesktop.org/drm/intel/issues/8676
[i915#8678]: https://gitlab.freedesktop.org/drm/intel/issues/8678
[i915#8679]: https://gitlab.freedesktop.org/drm/intel/issues/8679
[i915#8698]: https://gitlab.freedesktop.org/drm/intel/issues/8698
[i915#8699]: https://gitlab.freedesktop.org/drm/intel/issues/8699
[i915#8700]: https://gitlab.freedesktop.org/drm/intel/issues/8700
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_7343 -> IGTPW_9232
CI-20190529: 20190529
CI_DRM_13299: 3be27d08aea3805fefdfb59d3e1f7d69c824e1e8 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_9232: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/index.html
IGT_7343: ec3d9b6e5c552ab6b811f9ed2abe6a00baf4b38b @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/index.html
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^ permalink raw reply [flat|nested] 13+ messages in thread
* [igt-dev] ✗ Fi.CI.IGT: failure for series starting with [i-g-t,1/8] tests/amdgpu/amd_freesync_video_mode: Adjust indents and spacing
2023-06-21 6:57 [igt-dev] [PATCH i-g-t 1/8] tests/amdgpu/amd_freesync_video_mode: Adjust indents and spacing Tom Chung
` (7 preceding siblings ...)
2023-06-21 14:55 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/8] tests/amdgpu/amd_freesync_video_mode: Adjust indents and spacing Patchwork
@ 2023-06-22 3:34 ` Patchwork
2023-06-28 20:57 ` [igt-dev] [PATCH i-g-t 1/8] " Kamil Konieczny
9 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2023-06-22 3:34 UTC (permalink / raw)
To: Tom Chung; +Cc: igt-dev
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== Series Details ==
Series: series starting with [i-g-t,1/8] tests/amdgpu/amd_freesync_video_mode: Adjust indents and spacing
URL : https://patchwork.freedesktop.org/series/119675/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13299_full -> IGTPW_9232_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with IGTPW_9232_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_9232_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/index.html
Participating hosts (7 -> 7)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_9232_full:
### IGT changes ###
#### Possible regressions ####
* igt@i915_suspend@basic-s3-without-i915:
- shard-snb: [PASS][1] -> [ABORT][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/shard-snb5/igt@i915_suspend@basic-s3-without-i915.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-snb1/igt@i915_suspend@basic-s3-without-i915.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-gtt:
- {shard-dg1}: NOTRUN -> [SKIP][3] +1 similar issue
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-dg1-13/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-gtt.html
Known issues
------------
Here are the changes found in IGTPW_9232_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@feature_discovery@psr2:
- shard-rkl: NOTRUN -> [SKIP][4] ([i915#658])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-4/igt@feature_discovery@psr2.html
* igt@gem_create@create-ext-cpu-access-sanity-check:
- shard-tglu: NOTRUN -> [SKIP][5] ([i915#6335])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-2/igt@gem_create@create-ext-cpu-access-sanity-check.html
* igt@gem_create@create-ext-set-pat:
- shard-rkl: NOTRUN -> [FAIL][6] ([i915#8621])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-1/igt@gem_create@create-ext-set-pat.html
* igt@gem_ctx_exec@basic-nohangcheck:
- shard-tglu: [PASS][7] -> [FAIL][8] ([i915#6268])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/shard-tglu-7/igt@gem_ctx_exec@basic-nohangcheck.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-10/igt@gem_ctx_exec@basic-nohangcheck.html
* igt@gem_ctx_param@set-priority-not-supported:
- shard-tglu: NOTRUN -> [SKIP][9] ([fdo#109314])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-8/igt@gem_ctx_param@set-priority-not-supported.html
* igt@gem_exec_balancer@parallel-ordering:
- shard-tglu: NOTRUN -> [FAIL][10] ([i915#6117])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-8/igt@gem_exec_balancer@parallel-ordering.html
* igt@gem_exec_fair@basic-deadline:
- shard-rkl: [PASS][11] -> [FAIL][12] ([i915#2846])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/shard-rkl-1/igt@gem_exec_fair@basic-deadline.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-2/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-none-vip@rcs0:
- shard-glk: NOTRUN -> [FAIL][13] ([i915#2842])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-glk2/igt@gem_exec_fair@basic-none-vip@rcs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-tglu: [PASS][14] -> [FAIL][15] ([i915#2842])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/shard-tglu-10/igt@gem_exec_fair@basic-pace-share@rcs0.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-10/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_fair@basic-pace@rcs0:
- shard-rkl: NOTRUN -> [FAIL][16] ([i915#2842]) +3 similar issues
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-6/igt@gem_exec_fair@basic-pace@rcs0.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-tglu: NOTRUN -> [FAIL][17] ([i915#2842])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-4/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_exec_params@secure-non-master:
- shard-rkl: NOTRUN -> [SKIP][18] ([fdo#112283])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-1/igt@gem_exec_params@secure-non-master.html
* igt@gem_exec_reloc@basic-write-read-active:
- shard-rkl: NOTRUN -> [SKIP][19] ([i915#3281]) +1 similar issue
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-1/igt@gem_exec_reloc@basic-write-read-active.html
* igt@gem_huc_copy@huc-copy:
- shard-tglu: NOTRUN -> [SKIP][20] ([i915#2190])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-4/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@heavy-random:
- shard-glk: NOTRUN -> [SKIP][21] ([fdo#109271] / [i915#4613]) +2 similar issues
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-glk8/igt@gem_lmem_swapping@heavy-random.html
* igt@gem_lmem_swapping@massive-random:
- shard-rkl: NOTRUN -> [SKIP][22] ([i915#4613]) +1 similar issue
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-4/igt@gem_lmem_swapping@massive-random.html
* igt@gem_mmap_gtt@coherency:
- shard-rkl: NOTRUN -> [SKIP][23] ([fdo#111656])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-1/igt@gem_mmap_gtt@coherency.html
* igt@gem_partial_pwrite_pread@reads:
- shard-rkl: NOTRUN -> [SKIP][24] ([i915#3282]) +1 similar issue
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-2/igt@gem_partial_pwrite_pread@reads.html
* igt@gem_pxp@reject-modify-context-protection-off-2:
- shard-rkl: NOTRUN -> [SKIP][25] ([i915#4270])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-1/igt@gem_pxp@reject-modify-context-protection-off-2.html
* igt@gem_pxp@verify-pxp-stale-buf-execution:
- shard-tglu: NOTRUN -> [SKIP][26] ([i915#4270])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-8/igt@gem_pxp@verify-pxp-stale-buf-execution.html
* igt@gem_set_tiling_vs_blt@tiled-to-tiled:
- shard-rkl: NOTRUN -> [SKIP][27] ([i915#8411])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-2/igt@gem_set_tiling_vs_blt@tiled-to-tiled.html
* igt@gen3_render_linear_blits:
- shard-tglu: NOTRUN -> [SKIP][28] ([fdo#109289]) +1 similar issue
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-4/igt@gen3_render_linear_blits.html
* igt@gen7_exec_parse@batch-without-end:
- shard-rkl: NOTRUN -> [SKIP][29] ([fdo#109289]) +1 similar issue
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-2/igt@gen7_exec_parse@batch-without-end.html
* igt@gen9_exec_parse@bb-chained:
- shard-rkl: NOTRUN -> [SKIP][30] ([i915#2527]) +1 similar issue
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-6/igt@gen9_exec_parse@bb-chained.html
* igt@i915_module_load@load:
- shard-tglu: NOTRUN -> [SKIP][31] ([i915#6227])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-3/igt@i915_module_load@load.html
* igt@i915_pm_freq_api@freq-reset:
- shard-tglu: NOTRUN -> [SKIP][32] ([i915#8399])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-5/igt@i915_pm_freq_api@freq-reset.html
* igt@i915_pm_rc6_residency@rc6-idle@rcs0:
- shard-tglu: [PASS][33] -> [WARN][34] ([i915#2681])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/shard-tglu-6/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-9/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html
* igt@i915_pm_rpm@dpms-mode-unset-lpsp:
- shard-rkl: [PASS][35] -> [SKIP][36] ([i915#1397]) +3 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/shard-rkl-7/igt@i915_pm_rpm@dpms-mode-unset-lpsp.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-2/igt@i915_pm_rpm@dpms-mode-unset-lpsp.html
* igt@i915_pm_rpm@modeset-pc8-residency-stress:
- shard-tglu: NOTRUN -> [SKIP][37] ([fdo#109506])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-6/igt@i915_pm_rpm@modeset-pc8-residency-stress.html
* igt@i915_selftest@live@gt_heartbeat:
- shard-apl: [PASS][38] -> [DMESG-FAIL][39] ([i915#5334])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/shard-apl2/igt@i915_selftest@live@gt_heartbeat.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-apl7/igt@i915_selftest@live@gt_heartbeat.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-180:
- shard-rkl: NOTRUN -> [SKIP][40] ([i915#5286]) +1 similar issue
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-2/igt@kms_big_fb@4-tiled-32bpp-rotate-180.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-tglu: NOTRUN -> [SKIP][41] ([fdo#111615] / [i915#5286])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-5/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_big_fb@linear-32bpp-rotate-270:
- shard-rkl: NOTRUN -> [SKIP][42] ([fdo#111614] / [i915#3638]) +1 similar issue
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-1/igt@kms_big_fb@linear-32bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-270:
- shard-tglu: NOTRUN -> [SKIP][43] ([fdo#111614]) +1 similar issue
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-8/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-32bpp-rotate-270:
- shard-rkl: NOTRUN -> [SKIP][44] ([fdo#110723]) +1 similar issue
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-2/igt@kms_big_fb@yf-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0:
- shard-tglu: NOTRUN -> [SKIP][45] ([fdo#111615])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-6/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0.html
* igt@kms_ccs@pipe-a-bad-aux-stride-y_tiled_ccs:
- shard-rkl: NOTRUN -> [SKIP][46] ([i915#3734] / [i915#5354] / [i915#6095]) +1 similar issue
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-4/igt@kms_ccs@pipe-a-bad-aux-stride-y_tiled_ccs.html
* igt@kms_ccs@pipe-a-crc-primary-basic-4_tiled_mtl_mc_ccs:
- shard-rkl: NOTRUN -> [SKIP][47] ([i915#5354] / [i915#6095]) +6 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-7/igt@kms_ccs@pipe-a-crc-primary-basic-4_tiled_mtl_mc_ccs.html
* igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_mc_ccs:
- shard-rkl: NOTRUN -> [SKIP][48] ([i915#3886] / [i915#5354] / [i915#6095])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-6/igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-missing-ccs-buffer-4_tiled_mtl_rc_ccs_cc:
- shard-rkl: NOTRUN -> [SKIP][49] ([i915#5354]) +7 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-7/igt@kms_ccs@pipe-c-missing-ccs-buffer-4_tiled_mtl_rc_ccs_cc.html
* igt@kms_ccs@pipe-c-missing-ccs-buffer-y_tiled_gen12_mc_ccs:
- shard-tglu: NOTRUN -> [SKIP][50] ([i915#3689] / [i915#3886] / [i915#5354] / [i915#6095])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-2/igt@kms_ccs@pipe-c-missing-ccs-buffer-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-random-ccs-data-y_tiled_gen12_mc_ccs:
- shard-glk: NOTRUN -> [SKIP][51] ([fdo#109271] / [i915#3886]) +5 similar issues
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-glk2/igt@kms_ccs@pipe-c-random-ccs-data-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-d-bad-rotation-90-4_tiled_dg2_rc_ccs_cc:
- shard-tglu: NOTRUN -> [SKIP][52] ([i915#3689] / [i915#5354] / [i915#6095]) +2 similar issues
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-8/igt@kms_ccs@pipe-d-bad-rotation-90-4_tiled_dg2_rc_ccs_cc.html
* igt@kms_ccs@pipe-d-crc-primary-rotation-180-4_tiled_dg2_rc_ccs_cc:
- shard-tglu: NOTRUN -> [SKIP][53] ([i915#5354] / [i915#6095]) +6 similar issues
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-6/igt@kms_ccs@pipe-d-crc-primary-rotation-180-4_tiled_dg2_rc_ccs_cc.html
* igt@kms_chamelium_color@degamma:
- shard-rkl: NOTRUN -> [SKIP][54] ([fdo#111827])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-1/igt@kms_chamelium_color@degamma.html
* igt@kms_chamelium_edid@dp-edid-resolution-list:
- shard-tglu: NOTRUN -> [SKIP][55] ([i915#7828]) +2 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-10/igt@kms_chamelium_edid@dp-edid-resolution-list.html
* igt@kms_chamelium_hpd@dp-hpd-after-suspend:
- shard-rkl: NOTRUN -> [SKIP][56] ([i915#7828])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-4/igt@kms_chamelium_hpd@dp-hpd-after-suspend.html
* igt@kms_content_protection@srm:
- shard-rkl: NOTRUN -> [SKIP][57] ([i915#4579] / [i915#7118])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-6/igt@kms_content_protection@srm.html
* igt@kms_cursor_crc@cursor-onscreen-512x170:
- shard-rkl: NOTRUN -> [SKIP][58] ([fdo#109279] / [i915#3359])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-1/igt@kms_cursor_crc@cursor-onscreen-512x170.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x512:
- shard-tglu: NOTRUN -> [SKIP][59] ([i915#3359])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-3/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html
* igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
- shard-tglu: NOTRUN -> [SKIP][60] ([fdo#109274]) +1 similar issue
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-7/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-apl: [PASS][61] -> [FAIL][62] ([i915#2346])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/shard-apl6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-apl4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
- shard-rkl: NOTRUN -> [SKIP][63] ([i915#4103])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-4/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
* igt@kms_flip@2x-absolute-wf_vblank:
- shard-tglu: NOTRUN -> [SKIP][64] ([fdo#109274] / [i915#3637] / [i915#3966])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-6/igt@kms_flip@2x-absolute-wf_vblank.html
* igt@kms_flip@2x-modeset-vs-vblank-race:
- shard-rkl: NOTRUN -> [SKIP][65] ([fdo#111825]) +1 similar issue
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-2/igt@kms_flip@2x-modeset-vs-vblank-race.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode:
- shard-glk: NOTRUN -> [SKIP][66] ([fdo#109271] / [i915#4579]) +4 similar issues
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-glk2/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode:
- shard-tglu: NOTRUN -> [SKIP][67] ([i915#2587] / [i915#2672] / [i915#4579]) +1 similar issue
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-2/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-pwrite:
- shard-rkl: NOTRUN -> [SKIP][68] ([i915#3023]) +5 similar issues
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-pwrite:
- shard-rkl: NOTRUN -> [SKIP][69] ([fdo#111825] / [i915#1825]) +16 similar issues
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-gtt:
- shard-tglu: NOTRUN -> [SKIP][70] ([fdo#110189]) +3 similar issues
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-render:
- shard-tglu: NOTRUN -> [SKIP][71] ([fdo#109280]) +7 similar issues
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-render.html
* igt@kms_hdr@static-toggle-suspend:
- shard-rkl: NOTRUN -> [SKIP][72] ([i915#3555] / [i915#4579]) +6 similar issues
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-6/igt@kms_hdr@static-toggle-suspend.html
* igt@kms_panel_fitting@atomic-fastset:
- shard-tglu: NOTRUN -> [SKIP][73] ([i915#4579] / [i915#6301])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-8/igt@kms_panel_fitting@atomic-fastset.html
* igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-25@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][74] ([i915#5176]) +2 similar issues
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-7/igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-25@pipe-a-hdmi-a-1.html
* igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-25@pipe-b-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][75] ([i915#4579] / [i915#5176]) +2 similar issues
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-7/igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-25@pipe-b-hdmi-a-1.html
* igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-a-vga-1:
- shard-snb: NOTRUN -> [SKIP][76] ([fdo#109271]) +9 similar issues
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-snb2/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-a-vga-1.html
* igt@kms_plane_scaling@plane-upscale-with-rotation-20x20@pipe-c-hdmi-a-1:
- shard-tglu: NOTRUN -> [SKIP][77] ([i915#5176]) +2 similar issues
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-5/igt@kms_plane_scaling@plane-upscale-with-rotation-20x20@pipe-c-hdmi-a-1.html
* igt@kms_plane_scaling@plane-upscale-with-rotation-20x20@pipe-d-hdmi-a-1:
- shard-tglu: NOTRUN -> [SKIP][78] ([i915#4579] / [i915#5176])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-5/igt@kms_plane_scaling@plane-upscale-with-rotation-20x20@pipe-d-hdmi-a-1.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][79] ([i915#5235]) +2 similar issues
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-6/igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-a-hdmi-a-2.html
* igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-b-hdmi-a-1:
- shard-snb: NOTRUN -> [SKIP][80] ([fdo#109271] / [i915#4579]) +7 similar issues
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-snb1/igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-b-hdmi-a-1.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-b-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][81] ([i915#4579] / [i915#5235]) +2 similar issues
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-7/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-b-hdmi-a-1.html
* igt@kms_psr2_sf@cursor-plane-update-sf:
- shard-glk: NOTRUN -> [SKIP][82] ([fdo#109271] / [i915#658])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-glk5/igt@kms_psr2_sf@cursor-plane-update-sf.html
* igt@kms_psr2_sf@overlay-plane-update-continuous-sf:
- shard-rkl: NOTRUN -> [SKIP][83] ([fdo#111068] / [i915#658])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-2/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-rkl: NOTRUN -> [SKIP][84] ([i915#1072]) +2 similar issues
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-7/igt@kms_psr@psr2_sprite_plane_move.html
* igt@kms_scaling_modes@scaling-mode-none:
- shard-tglu: NOTRUN -> [SKIP][85] ([i915#3555] / [i915#4579]) +1 similar issue
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-7/igt@kms_scaling_modes@scaling-mode-none.html
* igt@kms_vblank@pipe-c-query-forked-busy:
- shard-rkl: NOTRUN -> [SKIP][86] ([i915#4070] / [i915#6768])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-2/igt@kms_vblank@pipe-c-query-forked-busy.html
* igt@kms_vblank@pipe-d-wait-busy-hang:
- shard-glk: NOTRUN -> [SKIP][87] ([fdo#109271]) +86 similar issues
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-glk2/igt@kms_vblank@pipe-d-wait-busy-hang.html
* igt@kms_writeback@writeback-pixel-formats:
- shard-glk: NOTRUN -> [SKIP][88] ([fdo#109271] / [i915#2437])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-glk6/igt@kms_writeback@writeback-pixel-formats.html
* igt@tools_test@sysfs_l3_parity:
- shard-tglu: NOTRUN -> [SKIP][89] ([fdo#109307])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-3/igt@tools_test@sysfs_l3_parity.html
* igt@v3d/v3d_submit_cl@bad-multisync-in-sync:
- shard-rkl: NOTRUN -> [SKIP][90] ([fdo#109315]) +1 similar issue
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-2/igt@v3d/v3d_submit_cl@bad-multisync-in-sync.html
* igt@v3d/v3d_submit_csd@bad-multisync-pad:
- shard-tglu: NOTRUN -> [SKIP][91] ([fdo#109315] / [i915#2575]) +1 similar issue
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-8/igt@v3d/v3d_submit_csd@bad-multisync-pad.html
* igt@vc4/vc4_mmap@mmap-bo:
- shard-tglu: NOTRUN -> [SKIP][92] ([i915#2575])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-7/igt@vc4/vc4_mmap@mmap-bo.html
* igt@vc4/vc4_purgeable_bo@mark-purgeable:
- shard-rkl: NOTRUN -> [SKIP][93] ([i915#7711]) +3 similar issues
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-2/igt@vc4/vc4_purgeable_bo@mark-purgeable.html
#### Possible fixes ####
* igt@gem_eio@in-flight-contexts-10ms:
- shard-apl: [TIMEOUT][94] ([i915#3063]) -> [PASS][95]
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/shard-apl3/igt@gem_eio@in-flight-contexts-10ms.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-apl3/igt@gem_eio@in-flight-contexts-10ms.html
* igt@gem_eio@unwedge-stress:
- {shard-dg1}: [FAIL][96] ([i915#5784]) -> [PASS][97]
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/shard-dg1-12/igt@gem_eio@unwedge-stress.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-dg1-13/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_endless@dispatch@vecs0:
- shard-tglu: [TIMEOUT][98] ([i915#3778]) -> [PASS][99]
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/shard-tglu-2/igt@gem_exec_endless@dispatch@vecs0.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-5/igt@gem_exec_endless@dispatch@vecs0.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-apl: [FAIL][100] ([i915#2842]) -> [PASS][101]
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/shard-apl3/igt@gem_exec_fair@basic-none-solo@rcs0.html
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-apl1/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-none@bcs0:
- shard-rkl: [FAIL][102] ([i915#2842]) -> [PASS][103]
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/shard-rkl-6/igt@gem_exec_fair@basic-none@bcs0.html
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-2/igt@gem_exec_fair@basic-none@bcs0.html
* igt@i915_pm_rc6_residency@rc6-idle@bcs0:
- {shard-dg1}: [FAIL][104] ([i915#3591]) -> [PASS][105]
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/shard-dg1-17/igt@i915_pm_rc6_residency@rc6-idle@bcs0.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-dg1-19/igt@i915_pm_rc6_residency@rc6-idle@bcs0.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-glk: [FAIL][106] ([i915#2346]) -> [PASS][107]
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/shard-glk5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-glk6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
- shard-apl: [FAIL][108] ([i915#2346]) -> [PASS][109]
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/shard-apl3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-apl3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_cursor_legacy@single-move@pipe-b:
- {shard-dg1}: [INCOMPLETE][110] ([i915#8011] / [i915#8347]) -> [PASS][111]
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/shard-dg1-19/igt@kms_cursor_legacy@single-move@pipe-b.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-dg1-15/igt@kms_cursor_legacy@single-move@pipe-b.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-apl: [FAIL][112] ([i915#4767]) -> [PASS][113]
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/shard-apl6/igt@kms_fbcon_fbt@fbc-suspend.html
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-apl4/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2:
- shard-glk: [FAIL][114] ([i915#79]) -> [PASS][115]
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/shard-glk3/igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-glk4/igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2.html
* igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1:
- shard-tglu: [FAIL][116] ([i915#8292]) -> [PASS][117]
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/shard-tglu-8/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1.html
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-tglu-3/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1.html
#### Warnings ####
* igt@kms_force_connector_basic@force-load-detect:
- shard-rkl: [SKIP][118] ([fdo#109285]) -> [SKIP][119] ([fdo#109285] / [i915#4098])
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/shard-rkl-6/igt@kms_force_connector_basic@force-load-detect.html
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-2/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-rkl: [SKIP][120] ([i915#4816]) -> [SKIP][121] ([i915#4070] / [i915#4816])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13299/shard-rkl-7/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/shard-rkl-6/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307
[fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
[i915#3023]: https://gitlab.freedesktop.org/drm/intel/issues/3023
[i915#3063]: https://gitlab.freedesktop.org/drm/intel/issues/3063
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
[i915#3778]: https://gitlab.freedesktop.org/drm/intel/issues/3778
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3966]: https://gitlab.freedesktop.org/drm/intel/issues/3966
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4767]: https://gitlab.freedesktop.org/drm/intel/issues/4767
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4816]: https://gitlab.freedesktop.org/drm/intel/issues/4816
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6117]: https://gitlab.freedesktop.org/drm/intel/issues/6117
[i915#6227]: https://gitlab.freedesktop.org/drm/intel/issues/6227
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
[i915#6335]: https://gitlab.freedesktop.org/drm/intel/issues/6335
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
[i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011
[i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
[i915#8247]: https://gitlab.freedesktop.org/drm/intel/issues/8247
[i915#8292]: https://gitlab.freedesktop.org/drm/intel/issues/8292
[i915#8304]: https://gitlab.freedesktop.org/drm/intel/issues/8304
[i915#8347]: https://gitlab.freedesktop.org/drm/intel/issues/8347
[i915#8399]: https://gitlab.freedesktop.org/drm/intel/issues/8399
[i915#8411]: https://gitlab.freedesktop.org/drm/intel/issues/8411
[i915#8502]: https://gitlab.freedesktop.org/drm/intel/issues/8502
[i915#8621]: https://gitlab.freedesktop.org/drm/intel/issues/8621
[i915#8661]: https://gitlab.freedesktop.org/drm/intel/issues/8661
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_7343 -> IGTPW_9232
* Piglit: piglit_4509 -> None
CI-20190529: 20190529
CI_DRM_13299: 3be27d08aea3805fefdfb59d3e1f7d69c824e1e8 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_9232: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/index.html
IGT_7343: ec3d9b6e5c552ab6b811f9ed2abe6a00baf4b38b @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9232/index.html
[-- Attachment #2: Type: text/html, Size: 42265 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/8] tests/amdgpu/amd_freesync_video_mode: Adjust indents and spacing
2023-06-21 6:57 [igt-dev] [PATCH i-g-t 1/8] tests/amdgpu/amd_freesync_video_mode: Adjust indents and spacing Tom Chung
` (8 preceding siblings ...)
2023-06-22 3:34 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
@ 2023-06-28 20:57 ` Kamil Konieczny
2023-06-28 21:06 ` vitaly prosyak
2023-06-29 10:16 ` Chung, ChiaHsuan (Tom)
9 siblings, 2 replies; 13+ messages in thread
From: Kamil Konieczny @ 2023-06-28 20:57 UTC (permalink / raw)
To: igt-dev; +Cc: Tom Chung, Christian König
Hi Tom,
On 2023-06-21 at 14:57:26 +0800, Tom Chung wrote:
> Adjust some code indents and spacing.
>
> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
Please subscribe to mailing list and/or see at patchwork
https://patchwork.freedesktop.org/project/igt/series/
who can help you review your patches from amd dev team
and then add devs to Cc list, for example you could ask:
Cc: Christian König <christian.koenig@amd.com>
Cc: Vitaly Prosyak <vitaly.prosyak@amd.com>
Cc: Alex Hung <alex.hung@amd.com>
or ask them to find out a reviewer.
> ---
> tests/amdgpu/amd_freesync_video_mode.c | 539 ++++++++++++-------------
> 1 file changed, 266 insertions(+), 273 deletions(-)
>
> diff --git a/tests/amdgpu/amd_freesync_video_mode.c b/tests/amdgpu/amd_freesync_video_mode.c
> index 579d24436..fdcf1375f 100644
> --- a/tests/amdgpu/amd_freesync_video_mode.c
> +++ b/tests/amdgpu/amd_freesync_video_mode.c
> @@ -25,11 +25,11 @@
> #include <fcntl.h>
> #include <signal.h>
>
> -#define NSECS_PER_SEC (1000000000ull)
> -#define TEST_DURATION_NS (10 * NSECS_PER_SEC)
> +#define NSECS_PER_SEC (1000000000ull)
> +#define TEST_DURATION_NS (10 * NSECS_PER_SEC)
>
> -#define BYTES_PER_PIXEL 4
> -#define MK_COLOR(r, g, b) ((0 << 24) | (r << 16) | (g << 8) | b)
> +#define BYTES_PER_PIXEL 4
> +#define MK_COLOR(r, g, b) ((0 << 24) | (r << 16) | (g << 8) | b)
I do not see any value in above changes.
>
> /*
> * The Display Core of amdgpu will add a set of modes derived from the
> @@ -46,43 +46,44 @@
> IGT_TEST_DESCRIPTION("This tests transition between normal and FreeSync-Video"
> "modes and measures the FPS to ensure vblank events are"
> "happening at the expected rate.");
> +
Yes this is a style fix.
> typedef struct range {
> unsigned int min;
> unsigned int max;
> } range_t;
>
> typedef struct data {
> - int drm_fd;
> - igt_display_t display;
> + int drm_fd;
> + igt_display_t display;
> igt_plane_t *primary;
> - igt_fb_t fbs[2];
> - uint32_t *fb_mem[2];
> - int front;
> - bool fb_initialized;
> - range_t range;
> + igt_fb_t fbs[2];
> + uint32_t *fb_mem[2];
> + int front;
> + bool fb_initialized;
> + range_t range;
Same here, what did you improve? spaces to tab?
Old code looks better.
>
> drmModeConnector *connector;
> drmModeModeInfo *modes;
> - int count_modes;
> + int count_modes;
>
> - uint32_t preferred_mode_index;
> - uint32_t base_mode_index;
> - uint32_t hdisplay;
> - uint32_t vdisplay;
> + uint32_t preferred_mode_index;
> + uint32_t base_mode_index;
> + uint32_t hdisplay;
> + uint32_t vdisplay;
Same here.
> } data_t;
>
> struct fsv_sprite {
> - uint32_t w;
> - uint32_t h;
> - uint32_t *data;
> + uint32_t w;
> + uint32_t h;
> + uint32_t *data;
ok, here you fixes spaces.
I would advise to use checkpatch.pl from Linux kernel to
spot potential improvements, maybe line too long can be
sometimes ignored.
Regards,
Kamil
> };
> static struct fsv_sprite cicle_sprite;
>
> enum {
> - FSV_PREFERRED_MODE,
> - FSV_BASE_MODE,
> - FSV_FREESYNC_VIDEO_MODE,
> - FSV_NON_FREESYNC_VIDEO_MODE,
> + FSV_PREFERRED_MODE,
> + FSV_BASE_MODE,
> + FSV_FREESYNC_VIDEO_MODE,
> + FSV_NON_FREESYNC_VIDEO_MODE,
> };
>
> enum {
> @@ -93,10 +94,10 @@ enum {
> };
>
> enum {
> - SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE ,
> - SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE ,
> - SCENE_NON_FSV_MODE_TO_FSV_MODE ,
> - SCENE_BASE_MODE_TO_CUSTUM_MODE ,
> + SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE,
> + SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE,
> + SCENE_NON_FSV_MODE_TO_FSV_MODE,
> + SCENE_BASE_MODE_TO_CUSTUM_MODE,
> SCENE_NON_FSV_MODE_TO_NON_FSV_MODE,
>
> SCENE_COUNT,
> @@ -157,74 +158,70 @@ static void fbmem_draw_rect(
> uint32_t h,
> uint32_t color)
> {
> - uint32_t offset = y * stride + x;
> -
> - for (uint32_t j = 0; j < h; j++) {
> - for (uint32_t i = 0; i < w; i++) {
> - fbmem[offset + i] = color;
> - }
> - offset += stride;
> - }
> + uint32_t offset = y * stride + x;
> +
> + for (uint32_t j = 0; j < h; j++) {
> + for (uint32_t i = 0; i < w; i++) {
> + fbmem[offset + i] = color;
> + }
> + offset += stride;
> + }
> }
>
> static void fbmem_draw_smpte_pattern(uint32_t *fbmem, int width, int height)
> {
> uint32_t x, y;
> - uint32_t colors_top[] = {
> - MK_COLOR(192, 192, 192), /* grey */
> - MK_COLOR(192, 192, 0), /* yellow */
> - MK_COLOR(0, 192, 192), /* cyan */
> - MK_COLOR(0, 192, 0), /* green */
> - MK_COLOR(192, 0, 192), /* magenta */
> - MK_COLOR(192, 0, 0), /* red */
> - MK_COLOR(0, 0, 192), /* blue */
> - };
> - uint32_t colors_middle[] = {
> - MK_COLOR(0, 0, 192), /* blue */
> - MK_COLOR(19, 19, 19), /* black */
> - MK_COLOR(192, 0, 192), /* magenta */
> - MK_COLOR(19, 19, 19), /* black */
> - MK_COLOR(0, 192, 192), /* cyan */
> - MK_COLOR(19, 19, 19), /* black */
> - MK_COLOR(192, 192, 192), /* grey */
> - };
> - uint32_t colors_bottom[] = {
> - MK_COLOR(0, 33, 76), /* in-phase */
> - MK_COLOR(255, 255, 255), /* super white */
> - MK_COLOR(50, 0, 106), /* quadrature */
> - MK_COLOR(19, 19, 19), /* black */
> - MK_COLOR(9, 9, 9), /* 3.5% */
> - MK_COLOR(19, 19, 19), /* 7.5% */
> - MK_COLOR(29, 29, 29), /* 11.5% */
> - MK_COLOR(19, 19, 19), /* black */
> - };
> -
> - for (y = 0; y < height * 6 / 9; ++y) {
> - for (x = 0; x < width; ++x)
> - fbmem[x] =
> - colors_top[x * 7 / width];
> - fbmem += width;
> - }
> -
> - for (; y < height * 7 / 9; ++y) {
> - for (x = 0; x < width; ++x)
> - fbmem[x] =
> - colors_middle[x * 7 / width];
> - fbmem += width;
> - }
> -
> - for (; y < height; ++y) {
> - for (x = 0; x < width * 5 / 7; ++x)
> - fbmem[x] =
> - colors_bottom[x * 4 / (width * 5 / 7)];
> - for (; x < width * 6 / 7; ++x)
> - fbmem[x] =
> - colors_bottom[(x - width * 5 / 7) * 3
> - / (width / 7) + 4];
> - for (; x < width; ++x)
> - fbmem[x] = colors_bottom[7];
> - fbmem += width;
> - }
> + uint32_t colors_top[] = {
> + MK_COLOR(192, 192, 192), /* grey */
> + MK_COLOR(192, 192, 0), /* yellow */
> + MK_COLOR(0, 192, 192), /* cyan */
> + MK_COLOR(0, 192, 0), /* green */
> + MK_COLOR(192, 0, 192), /* magenta */
> + MK_COLOR(192, 0, 0), /* red */
> + MK_COLOR(0, 0, 192), /* blue */
> + };
> + uint32_t colors_middle[] = {
> + MK_COLOR(0, 0, 192), /* blue */
> + MK_COLOR(19, 19, 19), /* black */
> + MK_COLOR(192, 0, 192), /* magenta */
> + MK_COLOR(19, 19, 19), /* black */
> + MK_COLOR(0, 192, 192), /* cyan */
> + MK_COLOR(19, 19, 19), /* black */
> + MK_COLOR(192, 192, 192), /* grey */
> + };
> + uint32_t colors_bottom[] = {
> + MK_COLOR(0, 33, 76), /* in-phase */
> + MK_COLOR(255, 255, 255), /* super white */
> + MK_COLOR(50, 0, 106), /* quadrature */
> + MK_COLOR(19, 19, 19), /* black */
> + MK_COLOR(9, 9, 9), /* 3.5% */
> + MK_COLOR(19, 19, 19), /* 7.5% */
> + MK_COLOR(29, 29, 29), /* 11.5% */
> + MK_COLOR(19, 19, 19), /* black */
> + };
> +
> + for (y = 0; y < height * 6 / 9; ++y) {
> + for (x = 0; x < width; ++x)
> + fbmem[x] = colors_top[x * 7 / width];
> + fbmem += width;
> + }
> +
> + for (; y < height * 7 / 9; ++y) {
> + for (x = 0; x < width; ++x)
> + fbmem[x] = colors_middle[x * 7 / width];
> + fbmem += width;
> + }
> +
> + for (; y < height; ++y) {
> + for (x = 0; x < width * 5 / 7; ++x)
> + fbmem[x] = colors_bottom[x * 4 / (width * 5 / 7)];
> + for (; x < width * 6 / 7; ++x)
> + fbmem[x] = colors_bottom[(x - width * 5 / 7) * 3
> + / (width / 7) + 4];
> + for (; x < width; ++x)
> + fbmem[x] = colors_bottom[7];
> + fbmem += width;
> + }
> }
>
> static void sprite_init(
> @@ -232,13 +229,13 @@ static void sprite_init(
> uint32_t w,
> uint32_t h)
> {
> - igt_assert(sprite);
> + igt_assert(sprite);
>
> - sprite->data = (uint32_t *)malloc(w * h * BYTES_PER_PIXEL);
> - igt_assert(sprite->data);
> + sprite->data = (uint32_t *) malloc(w * h * BYTES_PER_PIXEL);
> + igt_assert(sprite->data);
>
> - sprite->w = w;
> - sprite->h = h;
> + sprite->w = w;
> + sprite->h = h;
> }
>
> static void sprite_paste(
> @@ -248,14 +245,14 @@ static void sprite_paste(
> uint32_t x,
> uint32_t y)
> {
> - uint32_t fb_offset = y * fb_stride + x;
> - uint32_t sprite_offset = 0;
> -
> - for (int j = 0; j < sprite->h; j++) {
> - memcpy(fbmem + fb_offset, sprite->data + sprite_offset, sprite->w * 4);
> - sprite_offset += sprite->w;
> - fb_offset += fb_stride;
> - }
> + uint32_t fb_offset = y * fb_stride + x;
> + uint32_t sprite_offset = 0;
> +
> + for (int j = 0; j < sprite->h; j++) {
> + memcpy(fbmem + fb_offset, sprite->data + sprite_offset, sprite->w * 4);
> + sprite_offset += sprite->w;
> + fb_offset += fb_stride;
> + }
> }
>
> static void sprite_draw_rect(
> @@ -266,16 +263,15 @@ static void sprite_draw_rect(
> uint32_t h,
> uint32_t color)
> {
> - uint32_t offset = y * sprite->w + x;
> - uint32_t *addr = (uint32_t *)sprite->data;
> -
> - for (uint32_t j = 0; j < h; j++) {
> - addr = (uint32_t *)(sprite->data + offset);
> - for (uint32_t i = 0; i < w; i++) {
> - addr[i] = color;
> - }
> - offset += sprite->w;
> - }
> + uint32_t offset = y * sprite->w + x;
> + uint32_t *addr = (uint32_t *)sprite->data;
> +
> + for (uint32_t j = 0; j < h; j++) {
> + addr = (uint32_t *) (sprite->data + offset);
> + for (uint32_t i = 0; i < w; i++)
> + addr[i] = color;
> + offset += sprite->w;
> + }
> }
>
> /* drawing horizontal line in the sprite */
> @@ -287,9 +283,9 @@ static void sprite_draw_hline(
> uint32_t color)
> {
> uint32_t offset = y1 * sprite->w;
> - for (int x = x1 ; x < x2; x++) {
> - sprite->data[offset + x] = color;
> - }
> + for (int x = x1 ; x < x2; x++) {
> + sprite->data[offset + x] = color;
> + }
> }
>
> /* drawing filled circle with Bresenham's algorithm */
> @@ -300,71 +296,70 @@ static void sprite_draw_circle(
> uint32_t radius,
> uint32_t color)
> {
> - int offsetx = 0, offsety = radius, d = radius -1;
> -
> - while (offsety >= offsetx) {
> - sprite_draw_hline(sprite, x - offsety, y + offsetx,
> - x + offsety, color);
> - sprite_draw_hline(sprite, x - offsetx, y + offsety,
> - x + offsetx, color);
> - sprite_draw_hline(sprite, x - offsetx, y - offsety,
> - x + offsetx, color);
> - sprite_draw_hline(sprite, x - offsety, y - offsetx,
> - x + offsety, color);
> -
> - if (d >= 2 * offsetx) {
> - d -= 2 * offsetx + 1;
> - offsetx += 1;
> - } else if (d < 2 * (radius - offsety)) {
> - d += 2 * offsety - 1;
> - offsety -= 1;
> - } else {
> - d += 2 * (offsety - offsetx - 1);
> - offsety -= 1;
> - offsetx += 1;
> - }
> - }
> + int offsetx = 0, offsety = radius, d = radius -1;
> +
> + while (offsety >= offsetx) {
> + sprite_draw_hline(sprite, x - offsety, y + offsetx,
> + x + offsety, color);
> + sprite_draw_hline(sprite, x - offsetx, y + offsety,
> + x + offsetx, color);
> + sprite_draw_hline(sprite, x - offsetx, y - offsety,
> + x + offsetx, color);
> + sprite_draw_hline(sprite, x - offsety, y - offsetx,
> + x + offsety, color);
> +
> + if (d >= 2 * offsetx) {
> + d -= 2 * offsetx + 1;
> + offsetx += 1;
> + } else if (d < 2 * (radius - offsety)) {
> + d += 2 * offsety - 1;
> + offsety -= 1;
> + } else {
> + d += 2 * (offsety - offsetx - 1);
> + offsety -= 1;
> + offsetx += 1;
> + }
> + }
> }
>
> static void sprite_anim_init(void)
> {
> - memset(&cicle_sprite, 0, sizeof(cicle_sprite));
> - sprite_init(&cicle_sprite, 100, 100);
> -
> - sprite_draw_rect(&cicle_sprite, 0, 0, 100, 100, MK_COLOR(128, 128, 128));
> + memset(&cicle_sprite, 0, sizeof(cicle_sprite));
> + sprite_init(&cicle_sprite, 100, 100);
> + sprite_draw_rect(&cicle_sprite, 0, 0, 100, 100, MK_COLOR(128, 128, 128));
> /* draw filled circle with center (50, 50), radius 50. */
> - sprite_draw_circle(&cicle_sprite, 50, 50, 50, MK_COLOR(0, 0, 255));
> + sprite_draw_circle(&cicle_sprite, 50, 50, 50, MK_COLOR(0, 0, 255));
> }
>
> static void sprite_anim(data_t *data, uint32_t *addr)
> {
> - struct timeval tv1, tv2, tv_delta;
> - uint64_t frame_ns = get_time_ns();
> - double now = frame_ns / (double)NSECS_PER_SEC;
> + struct timeval tv1, tv2, tv_delta;
> + uint64_t frame_ns = get_time_ns();
> + double now = frame_ns / (double)NSECS_PER_SEC;
>
> - gettimeofday(&tv1, NULL);
> + gettimeofday(&tv1, NULL);
>
> - fbmem_draw_rect(addr, data->hdisplay, 0, 0,
> - data->hdisplay, data->vdisplay, MK_COLOR(128, 128, 128));
> + fbmem_draw_rect(addr, data->hdisplay, 0, 0,
> + data->hdisplay, data->vdisplay, MK_COLOR(128, 128, 128));
> /* red rectangle for checking tearing effect*/
> - if (data->front) {
> - fbmem_draw_rect(addr, data->hdisplay, 0, 0,
> + if (data->front) {
> + fbmem_draw_rect(addr, data->hdisplay, 0, 0,
> 30, data->vdisplay, MK_COLOR(191, 0, 0));
> - }
> + }
>
> /* draw 16 filled circles */
> - for (int i = 0; i < 16; ++i) {
> - double tv = now + i * 0.25;
> - float x, y;
> - x = data->hdisplay - 10.0f - 118.0f * i - 100.0f;
> - y = data->vdisplay * 0.5f + cos(tv) * data->vdisplay * 0.35;
> - sprite_paste(addr, data->hdisplay, &cicle_sprite, (uint32_t)x, (uint32_t)y);
> - }
> -
> - gettimeofday(&tv2, NULL);
> - timersub(&tv2, &tv1, &tv_delta);
> -
> - igt_debug("time of drawing: %ld ms\n", tv_delta.tv_usec / 1000);
> + for (int i = 0; i < 16; ++i) {
> + double tv = now + i * 0.25;
> + float x, y;
> + x = data->hdisplay - 10.0f - 118.0f * i - 100.0f;
> + y = data->vdisplay * 0.5f + cos(tv) * (double) data->vdisplay * 0.35f;
> + sprite_paste(addr, data->hdisplay, &cicle_sprite, (uint32_t)x, (uint32_t)y);
> + }
> +
> + gettimeofday(&tv2, NULL);
> + timersub(&tv2, &tv1, &tv_delta);
> +
> + igt_debug("time of drawing: %ld ms\n", tv_delta.tv_usec / 1000);
> }
>
> /*----------------------------------------------------------------------------*/
> @@ -376,79 +371,79 @@ static void sprite_anim(data_t *data, uint32_t *addr)
> */
> static bool is_freesync_video_mode(data_t *data, drmModeModeInfo *mode)
> {
> - drmModeModeInfo *base_mode = &data->modes[data->base_mode_index];
> - uint32_t bm_clock = base_mode->clock;
> + drmModeModeInfo *base_mode = &data->modes[data->base_mode_index];
> + uint32_t bm_clock = base_mode->clock;
>
> - if ( mode->hdisplay == data->hdisplay &&
> - mode->vdisplay == data->vdisplay &&
> - mode->clock == bm_clock &&
> + if (mode->hdisplay == data->hdisplay &&
> + mode->vdisplay == data->vdisplay &&
> + mode->clock == bm_clock &&
> mode->type & DRM_MODE_TYPE_DRIVER) {
> - return true;
> - }
> + return true;
> + }
>
> - return false;
> + return false;
> }
>
> static drmModeModeInfo* select_mode(
> - data_t *data,
> - uint32_t mode_type,
> - int refresh_rate)
> + data_t *data,
> + uint32_t mode_type,
> + int refresh_rate)
> {
> int i;
> - int index;
> - drmModeModeInfo *mode = NULL;
> + int index;
> + drmModeModeInfo *mode = NULL;
> igt_debug("select_mode: type=%d, refresh_rate=%d\n", mode_type, refresh_rate);
>
> - switch (mode_type) {
> - case FSV_BASE_MODE:
> - index = data->base_mode_index;
> - mode = &data->modes[index];
> - break;
> -
> - case FSV_PREFERRED_MODE:
> - index = data->preferred_mode_index;
> - mode = &data->modes[index];
> - break;
> -
> - case FSV_FREESYNC_VIDEO_MODE:
> - for (i = 0; i < data->count_modes; i++) {
> - mode = &data->modes[i];
> - if ( mode->vrefresh == refresh_rate &&
> - is_freesync_video_mode(data, mode)) {
> - break;
> - }
> - }
> + switch (mode_type) {
> + case FSV_BASE_MODE:
> + index = data->base_mode_index;
> + mode = &data->modes[index];
> + break;
> +
> + case FSV_PREFERRED_MODE:
> + index = data->preferred_mode_index;
> + mode = &data->modes[index];
> + break;
> +
> + case FSV_FREESYNC_VIDEO_MODE:
> + for (i = 0; i < data->count_modes; i++) {
> + mode = &data->modes[i];
> + if (mode->vrefresh == refresh_rate &&
> + is_freesync_video_mode(data, mode)) {
> + break;
> + }
> + }
> if (i == data->count_modes)
> mode = NULL;
> - break;
> -
> - case FSV_NON_FREESYNC_VIDEO_MODE:
> - for (i = 0; i < data->count_modes; i++) {
> - mode = &data->modes[i];
> - if ( mode->vrefresh == refresh_rate &&
> - !is_freesync_video_mode(data, mode)) {
> - break;
> - }
> - }
> + break;
> +
> + case FSV_NON_FREESYNC_VIDEO_MODE:
> + for (i = 0; i < data->count_modes; i++) {
> + mode = &data->modes[i];
> + if (mode->vrefresh == refresh_rate &&
> + !is_freesync_video_mode(data, mode)) {
> + break;
> + }
> + }
> if (i == data->count_modes)
> mode = NULL;
> - break;
> + break;
>
> - default:
> - igt_assert("Cannot find mode with specified rate and type.");
> - break;
> - }
> + default:
> + igt_assert("Cannot find mode with specified rate and type.");
> + break;
> + }
>
> if (mode) {
> igt_info("selected mode:\n");
> kmstest_dump_mode(mode);
> }
>
> - return mode;
> + return mode;
> }
>
> static int prepare_custom_mode(
> - data_t *data,
> + data_t *data,
> drmModeModeInfo *custom_mode,
> uint32_t refresh_rate)
> {
> @@ -473,14 +468,13 @@ static int prepare_custom_mode(
> return -1;
> }
>
> - num = (unsigned long long)base_mode->clock * 1000 * 1000;
> - den = refresh_rate * 1000 * (unsigned long long)base_mode->htotal;
> + num = (unsigned long long) base_mode->clock * 1000 * 1000;
> + den = refresh_rate * 1000 * (unsigned long long) base_mode->htotal;
> target_vtotal = num / den;
> target_vtotal_diff = target_vtotal - base_mode->vtotal;
> igt_debug("num=%lu, den=%lu, " \
> - "target_vtotal=%lu, target_vtotal_diff=%lu, base_mode->vtotal=%d\n",
> - num, den, target_vtotal, target_vtotal_diff, base_mode->vtotal
> - );
> + "target_vtotal=%lu, target_vtotal_diff=%lu, base_mode->vtotal=%d\n",
> + num, den, target_vtotal, target_vtotal_diff, base_mode->vtotal);
>
> /* Check for illegal modes */
> if (base_mode->vsync_start + target_vtotal_diff < base_mode->vdisplay ||
> @@ -489,9 +483,9 @@ static int prepare_custom_mode(
> return -1;
>
> *custom_mode = *base_mode;
> - custom_mode->vtotal += (uint16_t)target_vtotal_diff;
> - custom_mode->vsync_start += (uint16_t)target_vtotal_diff;
> - custom_mode->vsync_end += (uint16_t)target_vtotal_diff;
> + custom_mode->vtotal += (uint16_t) target_vtotal_diff;
> + custom_mode->vsync_start += (uint16_t) target_vtotal_diff;
> + custom_mode->vsync_end += (uint16_t) target_vtotal_diff;
> custom_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
> custom_mode->type |= DRM_MODE_TYPE_DRIVER;
> custom_mode->vrefresh = refresh_rate;
> @@ -688,7 +682,7 @@ static void init_data(data_t *data, igt_output_t *output) {
>
> connector = data->connector = output->config.connector;
> data->count_modes = connector->count_modes;
> - data->modes = (drmModeModeInfo *)malloc(sizeof(drmModeModeInfo) * data->count_modes);
> + data->modes = (drmModeModeInfo *) malloc(sizeof(drmModeModeInfo) * data->count_modes);
>
> for (i = 0; i < data->count_modes; i++) {
> data->modes[i] = connector->modes[i];
> @@ -699,36 +693,35 @@ static void init_data(data_t *data, igt_output_t *output) {
> }
>
> /* searching the preferred mode */
> - for (i = 0; i < connector->count_modes; i++) {
> - drmModeModeInfo *mode = &connector->modes[i];
> -
> - if (mode->type & DRM_MODE_TYPE_PREFERRED) {
> - data->preferred_mode_index = i;
> + for (i = 0; i < connector->count_modes; i++) {
> + drmModeModeInfo *mode = &connector->modes[i];
> + if (mode->type & DRM_MODE_TYPE_PREFERRED) {
> + data->preferred_mode_index = i;
> data->hdisplay = mode->hdisplay;
> data->vdisplay = mode->vdisplay;
> pm_hdisplay = preferred_mode->hdisplay;
> pm_vdisplay = preferred_mode->vdisplay;
> break;
> - }
> - }
> -
> - /* searching the base mode; */
> - for (i = 0; i < connector->count_modes; i++) {
> - drmModeModeInfo *mode = &connector->modes[i];
> - if (mode->hdisplay == pm_hdisplay && mode->vdisplay == pm_vdisplay) {
> - if (mode->clock > max_clk) {
> - max_clk = mode->clock;
> - data->base_mode_index = i;
> - }
> - }
> - }
> - igt_info("preferred=%d, base=%d\n", data->preferred_mode_index, data->base_mode_index);
> -
> - for (i = 0; i < connector->count_modes; i++) {
> - drmModeModeInfo *mode = &connector->modes[i];
> - if (is_freesync_video_mode(data, mode))
> - igt_debug("mode[%d] is freesync video mode.\n", i);
> - }
> + }
> + }
> +
> + /* searching the base mode */
> + for (i = 0; i < connector->count_modes; i++) {
> + drmModeModeInfo *mode = &connector->modes[i];
> + if (mode->hdisplay == pm_hdisplay && mode->vdisplay == pm_vdisplay) {
> + if (mode->clock > max_clk) {
> + max_clk = mode->clock;
> + data->base_mode_index = i;
> + }
> + }
> + }
> + igt_info("preferred=%d, base=%d\n", data->preferred_mode_index, data->base_mode_index);
> +
> + for (i = 0; i < connector->count_modes; i++) {
> + drmModeModeInfo *mode = &connector->modes[i];
> + if (is_freesync_video_mode(data, mode))
> + igt_debug("mode[%d] is freesync video mode.\n", i);
> + }
>
> data->range = get_vrr_range(data, output);
> }
> @@ -759,19 +752,19 @@ mode_transition(data_t *data, enum pipe pipe, igt_output_t *output, uint32_t sce
>
> igt_info("stage-1:\n");
> switch(scene) {
> - case SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE:
> + case SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE:
> mode_start = select_mode(data, FSV_BASE_MODE, 0);
> - mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
> + mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
> break;
> - case SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE:
> + case SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE:
> mode_start = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
> - mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 120);
> + mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 120);
> break;
> - case SCENE_NON_FSV_MODE_TO_FSV_MODE:
> + case SCENE_NON_FSV_MODE_TO_FSV_MODE:
> mode_start = select_mode(data, FSV_NON_FREESYNC_VIDEO_MODE, 60);
> - mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
> + mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
> break;
> - case SCENE_BASE_MODE_TO_CUSTUM_MODE:
> + case SCENE_BASE_MODE_TO_CUSTUM_MODE:
> mode_start = select_mode(data, FSV_BASE_MODE, 0);
> prepare_custom_mode(data, &mode_custom, 72);
> mode_playback = &mode_custom;
> @@ -841,30 +834,30 @@ igt_main
> }
>
> /* Expectation: Modeset happens instantaneously without blanking */
> - igt_describe("Test switch from base freesync mode to " \
> - "various freesync video modes");
> - igt_subtest("freesync-base-to-various")
> - run_test(&data, SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE);
> + igt_describe("Test switch from base freesync mode to " \
> + "various freesync video modes");
> + igt_subtest("freesync-base-to-various")
> + run_test(&data, SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE);
>
> /* Expectation: Modeset happens instantaneously without blanking */
> - igt_describe("Test switching from lower refresh freesync mode to " \
> - "another freesync mode with higher refresh rate");
> - igt_subtest("freesync-lower-to-higher")
> - run_test(&data, SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE);
> + igt_describe("Test switching from lower refresh freesync mode to " \
> + "another freesync mode with higher refresh rate");
> + igt_subtest("freesync-lower-to-higher")
> + run_test(&data, SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE);
>
> /* Expectation: Full modeset is triggered. */
> - igt_describe("Test switching from non preferred video mode to " \
> - "one of freesync video mode");
> - igt_subtest("freesync-non-preferred-to-freesync")
> - run_test(&data, SCENE_NON_FSV_MODE_TO_FSV_MODE);
> + igt_describe("Test switching from non preferred video mode to " \
> + "one of freesync video mode");
> + igt_subtest("freesync-non-preferred-to-freesync")
> + run_test(&data, SCENE_NON_FSV_MODE_TO_FSV_MODE);
>
> /* Expectation: Modeset happens instantaneously without blanking */
> - igt_describe("Add custom mode through xrandr based on " \
> - "base freesync mode and apply the new mode");
> - igt_subtest("freesync-custom-mode")
> - run_test(&data, SCENE_BASE_MODE_TO_CUSTUM_MODE);
> + igt_describe("Add custom mode through xrandr based on " \
> + "base freesync mode and apply the new mode");
> + igt_subtest("freesync-custom-mode")
> + run_test(&data, SCENE_BASE_MODE_TO_CUSTUM_MODE);
>
> - igt_info("end of test\n");
> + igt_info("end of test\n");
>
> igt_fixture {
> igt_display_fini(&data.display);
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/8] tests/amdgpu/amd_freesync_video_mode: Adjust indents and spacing
2023-06-28 20:57 ` [igt-dev] [PATCH i-g-t 1/8] " Kamil Konieczny
@ 2023-06-28 21:06 ` vitaly prosyak
2023-06-29 10:16 ` Chung, ChiaHsuan (Tom)
1 sibling, 0 replies; 13+ messages in thread
From: vitaly prosyak @ 2023-06-28 21:06 UTC (permalink / raw)
To: Kamil Konieczny, igt-dev, Tom Chung, Christian König,
Vitaly Prosyak, Alex Hung, Siqueira, Rodrigo
Thanks Kamil.
Added Rodrigo to review since it is a display related change.
Regards, Vitaly
On 2023-06-28 16:57, Kamil Konieczny wrote:
> Hi Tom,
>
> On 2023-06-21 at 14:57:26 +0800, Tom Chung wrote:
>> Adjust some code indents and spacing.
>>
>> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
> Please subscribe to mailing list and/or see at patchwork
> https://patchwork.freedesktop.org/project/igt/series/
>
> who can help you review your patches from amd dev team
> and then add devs to Cc list, for example you could ask:
>
> Cc: Christian König <christian.koenig@amd.com>
> Cc: Vitaly Prosyak <vitaly.prosyak@amd.com>
> Cc: Alex Hung <alex.hung@amd.com>
>
> or ask them to find out a reviewer.
>
>> ---
>> tests/amdgpu/amd_freesync_video_mode.c | 539 ++++++++++++-------------
>> 1 file changed, 266 insertions(+), 273 deletions(-)
>>
>> diff --git a/tests/amdgpu/amd_freesync_video_mode.c b/tests/amdgpu/amd_freesync_video_mode.c
>> index 579d24436..fdcf1375f 100644
>> --- a/tests/amdgpu/amd_freesync_video_mode.c
>> +++ b/tests/amdgpu/amd_freesync_video_mode.c
>> @@ -25,11 +25,11 @@
>> #include <fcntl.h>
>> #include <signal.h>
>>
>> -#define NSECS_PER_SEC (1000000000ull)
>> -#define TEST_DURATION_NS (10 * NSECS_PER_SEC)
>> +#define NSECS_PER_SEC (1000000000ull)
>> +#define TEST_DURATION_NS (10 * NSECS_PER_SEC)
>>
>> -#define BYTES_PER_PIXEL 4
>> -#define MK_COLOR(r, g, b) ((0 << 24) | (r << 16) | (g << 8) | b)
>> +#define BYTES_PER_PIXEL 4
>> +#define MK_COLOR(r, g, b) ((0 << 24) | (r << 16) | (g << 8) | b)
> I do not see any value in above changes.
>
>>
>> /*
>> * The Display Core of amdgpu will add a set of modes derived from the
>> @@ -46,43 +46,44 @@
>> IGT_TEST_DESCRIPTION("This tests transition between normal and FreeSync-Video"
>> "modes and measures the FPS to ensure vblank events are"
>> "happening at the expected rate.");
>> +
> Yes this is a style fix.
>
>> typedef struct range {
>> unsigned int min;
>> unsigned int max;
>> } range_t;
>>
>> typedef struct data {
>> - int drm_fd;
>> - igt_display_t display;
>> + int drm_fd;
>> + igt_display_t display;
>> igt_plane_t *primary;
>> - igt_fb_t fbs[2];
>> - uint32_t *fb_mem[2];
>> - int front;
>> - bool fb_initialized;
>> - range_t range;
>> + igt_fb_t fbs[2];
>> + uint32_t *fb_mem[2];
>> + int front;
>> + bool fb_initialized;
>> + range_t range;
> Same here, what did you improve? spaces to tab?
> Old code looks better.
>
>>
>> drmModeConnector *connector;
>> drmModeModeInfo *modes;
>> - int count_modes;
>> + int count_modes;
>>
>> - uint32_t preferred_mode_index;
>> - uint32_t base_mode_index;
>> - uint32_t hdisplay;
>> - uint32_t vdisplay;
>> + uint32_t preferred_mode_index;
>> + uint32_t base_mode_index;
>> + uint32_t hdisplay;
>> + uint32_t vdisplay;
> Same here.
>
>> } data_t;
>>
>> struct fsv_sprite {
>> - uint32_t w;
>> - uint32_t h;
>> - uint32_t *data;
>> + uint32_t w;
>> + uint32_t h;
>> + uint32_t *data;
> ok, here you fixes spaces.
>
> I would advise to use checkpatch.pl from Linux kernel to
> spot potential improvements, maybe line too long can be
> sometimes ignored.
>
> Regards,
> Kamil
>
>> };
>> static struct fsv_sprite cicle_sprite;
>>
>> enum {
>> - FSV_PREFERRED_MODE,
>> - FSV_BASE_MODE,
>> - FSV_FREESYNC_VIDEO_MODE,
>> - FSV_NON_FREESYNC_VIDEO_MODE,
>> + FSV_PREFERRED_MODE,
>> + FSV_BASE_MODE,
>> + FSV_FREESYNC_VIDEO_MODE,
>> + FSV_NON_FREESYNC_VIDEO_MODE,
>> };
>>
>> enum {
>> @@ -93,10 +94,10 @@ enum {
>> };
>>
>> enum {
>> - SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE ,
>> - SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE ,
>> - SCENE_NON_FSV_MODE_TO_FSV_MODE ,
>> - SCENE_BASE_MODE_TO_CUSTUM_MODE ,
>> + SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE,
>> + SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE,
>> + SCENE_NON_FSV_MODE_TO_FSV_MODE,
>> + SCENE_BASE_MODE_TO_CUSTUM_MODE,
>> SCENE_NON_FSV_MODE_TO_NON_FSV_MODE,
>>
>> SCENE_COUNT,
>> @@ -157,74 +158,70 @@ static void fbmem_draw_rect(
>> uint32_t h,
>> uint32_t color)
>> {
>> - uint32_t offset = y * stride + x;
>> -
>> - for (uint32_t j = 0; j < h; j++) {
>> - for (uint32_t i = 0; i < w; i++) {
>> - fbmem[offset + i] = color;
>> - }
>> - offset += stride;
>> - }
>> + uint32_t offset = y * stride + x;
>> +
>> + for (uint32_t j = 0; j < h; j++) {
>> + for (uint32_t i = 0; i < w; i++) {
>> + fbmem[offset + i] = color;
>> + }
>> + offset += stride;
>> + }
>> }
>>
>> static void fbmem_draw_smpte_pattern(uint32_t *fbmem, int width, int height)
>> {
>> uint32_t x, y;
>> - uint32_t colors_top[] = {
>> - MK_COLOR(192, 192, 192), /* grey */
>> - MK_COLOR(192, 192, 0), /* yellow */
>> - MK_COLOR(0, 192, 192), /* cyan */
>> - MK_COLOR(0, 192, 0), /* green */
>> - MK_COLOR(192, 0, 192), /* magenta */
>> - MK_COLOR(192, 0, 0), /* red */
>> - MK_COLOR(0, 0, 192), /* blue */
>> - };
>> - uint32_t colors_middle[] = {
>> - MK_COLOR(0, 0, 192), /* blue */
>> - MK_COLOR(19, 19, 19), /* black */
>> - MK_COLOR(192, 0, 192), /* magenta */
>> - MK_COLOR(19, 19, 19), /* black */
>> - MK_COLOR(0, 192, 192), /* cyan */
>> - MK_COLOR(19, 19, 19), /* black */
>> - MK_COLOR(192, 192, 192), /* grey */
>> - };
>> - uint32_t colors_bottom[] = {
>> - MK_COLOR(0, 33, 76), /* in-phase */
>> - MK_COLOR(255, 255, 255), /* super white */
>> - MK_COLOR(50, 0, 106), /* quadrature */
>> - MK_COLOR(19, 19, 19), /* black */
>> - MK_COLOR(9, 9, 9), /* 3.5% */
>> - MK_COLOR(19, 19, 19), /* 7.5% */
>> - MK_COLOR(29, 29, 29), /* 11.5% */
>> - MK_COLOR(19, 19, 19), /* black */
>> - };
>> -
>> - for (y = 0; y < height * 6 / 9; ++y) {
>> - for (x = 0; x < width; ++x)
>> - fbmem[x] =
>> - colors_top[x * 7 / width];
>> - fbmem += width;
>> - }
>> -
>> - for (; y < height * 7 / 9; ++y) {
>> - for (x = 0; x < width; ++x)
>> - fbmem[x] =
>> - colors_middle[x * 7 / width];
>> - fbmem += width;
>> - }
>> -
>> - for (; y < height; ++y) {
>> - for (x = 0; x < width * 5 / 7; ++x)
>> - fbmem[x] =
>> - colors_bottom[x * 4 / (width * 5 / 7)];
>> - for (; x < width * 6 / 7; ++x)
>> - fbmem[x] =
>> - colors_bottom[(x - width * 5 / 7) * 3
>> - / (width / 7) + 4];
>> - for (; x < width; ++x)
>> - fbmem[x] = colors_bottom[7];
>> - fbmem += width;
>> - }
>> + uint32_t colors_top[] = {
>> + MK_COLOR(192, 192, 192), /* grey */
>> + MK_COLOR(192, 192, 0), /* yellow */
>> + MK_COLOR(0, 192, 192), /* cyan */
>> + MK_COLOR(0, 192, 0), /* green */
>> + MK_COLOR(192, 0, 192), /* magenta */
>> + MK_COLOR(192, 0, 0), /* red */
>> + MK_COLOR(0, 0, 192), /* blue */
>> + };
>> + uint32_t colors_middle[] = {
>> + MK_COLOR(0, 0, 192), /* blue */
>> + MK_COLOR(19, 19, 19), /* black */
>> + MK_COLOR(192, 0, 192), /* magenta */
>> + MK_COLOR(19, 19, 19), /* black */
>> + MK_COLOR(0, 192, 192), /* cyan */
>> + MK_COLOR(19, 19, 19), /* black */
>> + MK_COLOR(192, 192, 192), /* grey */
>> + };
>> + uint32_t colors_bottom[] = {
>> + MK_COLOR(0, 33, 76), /* in-phase */
>> + MK_COLOR(255, 255, 255), /* super white */
>> + MK_COLOR(50, 0, 106), /* quadrature */
>> + MK_COLOR(19, 19, 19), /* black */
>> + MK_COLOR(9, 9, 9), /* 3.5% */
>> + MK_COLOR(19, 19, 19), /* 7.5% */
>> + MK_COLOR(29, 29, 29), /* 11.5% */
>> + MK_COLOR(19, 19, 19), /* black */
>> + };
>> +
>> + for (y = 0; y < height * 6 / 9; ++y) {
>> + for (x = 0; x < width; ++x)
>> + fbmem[x] = colors_top[x * 7 / width];
>> + fbmem += width;
>> + }
>> +
>> + for (; y < height * 7 / 9; ++y) {
>> + for (x = 0; x < width; ++x)
>> + fbmem[x] = colors_middle[x * 7 / width];
>> + fbmem += width;
>> + }
>> +
>> + for (; y < height; ++y) {
>> + for (x = 0; x < width * 5 / 7; ++x)
>> + fbmem[x] = colors_bottom[x * 4 / (width * 5 / 7)];
>> + for (; x < width * 6 / 7; ++x)
>> + fbmem[x] = colors_bottom[(x - width * 5 / 7) * 3
>> + / (width / 7) + 4];
>> + for (; x < width; ++x)
>> + fbmem[x] = colors_bottom[7];
>> + fbmem += width;
>> + }
>> }
>>
>> static void sprite_init(
>> @@ -232,13 +229,13 @@ static void sprite_init(
>> uint32_t w,
>> uint32_t h)
>> {
>> - igt_assert(sprite);
>> + igt_assert(sprite);
>>
>> - sprite->data = (uint32_t *)malloc(w * h * BYTES_PER_PIXEL);
>> - igt_assert(sprite->data);
>> + sprite->data = (uint32_t *) malloc(w * h * BYTES_PER_PIXEL);
>> + igt_assert(sprite->data);
>>
>> - sprite->w = w;
>> - sprite->h = h;
>> + sprite->w = w;
>> + sprite->h = h;
>> }
>>
>> static void sprite_paste(
>> @@ -248,14 +245,14 @@ static void sprite_paste(
>> uint32_t x,
>> uint32_t y)
>> {
>> - uint32_t fb_offset = y * fb_stride + x;
>> - uint32_t sprite_offset = 0;
>> -
>> - for (int j = 0; j < sprite->h; j++) {
>> - memcpy(fbmem + fb_offset, sprite->data + sprite_offset, sprite->w * 4);
>> - sprite_offset += sprite->w;
>> - fb_offset += fb_stride;
>> - }
>> + uint32_t fb_offset = y * fb_stride + x;
>> + uint32_t sprite_offset = 0;
>> +
>> + for (int j = 0; j < sprite->h; j++) {
>> + memcpy(fbmem + fb_offset, sprite->data + sprite_offset, sprite->w * 4);
>> + sprite_offset += sprite->w;
>> + fb_offset += fb_stride;
>> + }
>> }
>>
>> static void sprite_draw_rect(
>> @@ -266,16 +263,15 @@ static void sprite_draw_rect(
>> uint32_t h,
>> uint32_t color)
>> {
>> - uint32_t offset = y * sprite->w + x;
>> - uint32_t *addr = (uint32_t *)sprite->data;
>> -
>> - for (uint32_t j = 0; j < h; j++) {
>> - addr = (uint32_t *)(sprite->data + offset);
>> - for (uint32_t i = 0; i < w; i++) {
>> - addr[i] = color;
>> - }
>> - offset += sprite->w;
>> - }
>> + uint32_t offset = y * sprite->w + x;
>> + uint32_t *addr = (uint32_t *)sprite->data;
>> +
>> + for (uint32_t j = 0; j < h; j++) {
>> + addr = (uint32_t *) (sprite->data + offset);
>> + for (uint32_t i = 0; i < w; i++)
>> + addr[i] = color;
>> + offset += sprite->w;
>> + }
>> }
>>
>> /* drawing horizontal line in the sprite */
>> @@ -287,9 +283,9 @@ static void sprite_draw_hline(
>> uint32_t color)
>> {
>> uint32_t offset = y1 * sprite->w;
>> - for (int x = x1 ; x < x2; x++) {
>> - sprite->data[offset + x] = color;
>> - }
>> + for (int x = x1 ; x < x2; x++) {
>> + sprite->data[offset + x] = color;
>> + }
>> }
>>
>> /* drawing filled circle with Bresenham's algorithm */
>> @@ -300,71 +296,70 @@ static void sprite_draw_circle(
>> uint32_t radius,
>> uint32_t color)
>> {
>> - int offsetx = 0, offsety = radius, d = radius -1;
>> -
>> - while (offsety >= offsetx) {
>> - sprite_draw_hline(sprite, x - offsety, y + offsetx,
>> - x + offsety, color);
>> - sprite_draw_hline(sprite, x - offsetx, y + offsety,
>> - x + offsetx, color);
>> - sprite_draw_hline(sprite, x - offsetx, y - offsety,
>> - x + offsetx, color);
>> - sprite_draw_hline(sprite, x - offsety, y - offsetx,
>> - x + offsety, color);
>> -
>> - if (d >= 2 * offsetx) {
>> - d -= 2 * offsetx + 1;
>> - offsetx += 1;
>> - } else if (d < 2 * (radius - offsety)) {
>> - d += 2 * offsety - 1;
>> - offsety -= 1;
>> - } else {
>> - d += 2 * (offsety - offsetx - 1);
>> - offsety -= 1;
>> - offsetx += 1;
>> - }
>> - }
>> + int offsetx = 0, offsety = radius, d = radius -1;
>> +
>> + while (offsety >= offsetx) {
>> + sprite_draw_hline(sprite, x - offsety, y + offsetx,
>> + x + offsety, color);
>> + sprite_draw_hline(sprite, x - offsetx, y + offsety,
>> + x + offsetx, color);
>> + sprite_draw_hline(sprite, x - offsetx, y - offsety,
>> + x + offsetx, color);
>> + sprite_draw_hline(sprite, x - offsety, y - offsetx,
>> + x + offsety, color);
>> +
>> + if (d >= 2 * offsetx) {
>> + d -= 2 * offsetx + 1;
>> + offsetx += 1;
>> + } else if (d < 2 * (radius - offsety)) {
>> + d += 2 * offsety - 1;
>> + offsety -= 1;
>> + } else {
>> + d += 2 * (offsety - offsetx - 1);
>> + offsety -= 1;
>> + offsetx += 1;
>> + }
>> + }
>> }
>>
>> static void sprite_anim_init(void)
>> {
>> - memset(&cicle_sprite, 0, sizeof(cicle_sprite));
>> - sprite_init(&cicle_sprite, 100, 100);
>> -
>> - sprite_draw_rect(&cicle_sprite, 0, 0, 100, 100, MK_COLOR(128, 128, 128));
>> + memset(&cicle_sprite, 0, sizeof(cicle_sprite));
>> + sprite_init(&cicle_sprite, 100, 100);
>> + sprite_draw_rect(&cicle_sprite, 0, 0, 100, 100, MK_COLOR(128, 128, 128));
>> /* draw filled circle with center (50, 50), radius 50. */
>> - sprite_draw_circle(&cicle_sprite, 50, 50, 50, MK_COLOR(0, 0, 255));
>> + sprite_draw_circle(&cicle_sprite, 50, 50, 50, MK_COLOR(0, 0, 255));
>> }
>>
>> static void sprite_anim(data_t *data, uint32_t *addr)
>> {
>> - struct timeval tv1, tv2, tv_delta;
>> - uint64_t frame_ns = get_time_ns();
>> - double now = frame_ns / (double)NSECS_PER_SEC;
>> + struct timeval tv1, tv2, tv_delta;
>> + uint64_t frame_ns = get_time_ns();
>> + double now = frame_ns / (double)NSECS_PER_SEC;
>>
>> - gettimeofday(&tv1, NULL);
>> + gettimeofday(&tv1, NULL);
>>
>> - fbmem_draw_rect(addr, data->hdisplay, 0, 0,
>> - data->hdisplay, data->vdisplay, MK_COLOR(128, 128, 128));
>> + fbmem_draw_rect(addr, data->hdisplay, 0, 0,
>> + data->hdisplay, data->vdisplay, MK_COLOR(128, 128, 128));
>> /* red rectangle for checking tearing effect*/
>> - if (data->front) {
>> - fbmem_draw_rect(addr, data->hdisplay, 0, 0,
>> + if (data->front) {
>> + fbmem_draw_rect(addr, data->hdisplay, 0, 0,
>> 30, data->vdisplay, MK_COLOR(191, 0, 0));
>> - }
>> + }
>>
>> /* draw 16 filled circles */
>> - for (int i = 0; i < 16; ++i) {
>> - double tv = now + i * 0.25;
>> - float x, y;
>> - x = data->hdisplay - 10.0f - 118.0f * i - 100.0f;
>> - y = data->vdisplay * 0.5f + cos(tv) * data->vdisplay * 0.35;
>> - sprite_paste(addr, data->hdisplay, &cicle_sprite, (uint32_t)x, (uint32_t)y);
>> - }
>> -
>> - gettimeofday(&tv2, NULL);
>> - timersub(&tv2, &tv1, &tv_delta);
>> -
>> - igt_debug("time of drawing: %ld ms\n", tv_delta.tv_usec / 1000);
>> + for (int i = 0; i < 16; ++i) {
>> + double tv = now + i * 0.25;
>> + float x, y;
>> + x = data->hdisplay - 10.0f - 118.0f * i - 100.0f;
>> + y = data->vdisplay * 0.5f + cos(tv) * (double) data->vdisplay * 0.35f;
>> + sprite_paste(addr, data->hdisplay, &cicle_sprite, (uint32_t)x, (uint32_t)y);
>> + }
>> +
>> + gettimeofday(&tv2, NULL);
>> + timersub(&tv2, &tv1, &tv_delta);
>> +
>> + igt_debug("time of drawing: %ld ms\n", tv_delta.tv_usec / 1000);
>> }
>>
>> /*----------------------------------------------------------------------------*/
>> @@ -376,79 +371,79 @@ static void sprite_anim(data_t *data, uint32_t *addr)
>> */
>> static bool is_freesync_video_mode(data_t *data, drmModeModeInfo *mode)
>> {
>> - drmModeModeInfo *base_mode = &data->modes[data->base_mode_index];
>> - uint32_t bm_clock = base_mode->clock;
>> + drmModeModeInfo *base_mode = &data->modes[data->base_mode_index];
>> + uint32_t bm_clock = base_mode->clock;
>>
>> - if ( mode->hdisplay == data->hdisplay &&
>> - mode->vdisplay == data->vdisplay &&
>> - mode->clock == bm_clock &&
>> + if (mode->hdisplay == data->hdisplay &&
>> + mode->vdisplay == data->vdisplay &&
>> + mode->clock == bm_clock &&
>> mode->type & DRM_MODE_TYPE_DRIVER) {
>> - return true;
>> - }
>> + return true;
>> + }
>>
>> - return false;
>> + return false;
>> }
>>
>> static drmModeModeInfo* select_mode(
>> - data_t *data,
>> - uint32_t mode_type,
>> - int refresh_rate)
>> + data_t *data,
>> + uint32_t mode_type,
>> + int refresh_rate)
>> {
>> int i;
>> - int index;
>> - drmModeModeInfo *mode = NULL;
>> + int index;
>> + drmModeModeInfo *mode = NULL;
>> igt_debug("select_mode: type=%d, refresh_rate=%d\n", mode_type, refresh_rate);
>>
>> - switch (mode_type) {
>> - case FSV_BASE_MODE:
>> - index = data->base_mode_index;
>> - mode = &data->modes[index];
>> - break;
>> -
>> - case FSV_PREFERRED_MODE:
>> - index = data->preferred_mode_index;
>> - mode = &data->modes[index];
>> - break;
>> -
>> - case FSV_FREESYNC_VIDEO_MODE:
>> - for (i = 0; i < data->count_modes; i++) {
>> - mode = &data->modes[i];
>> - if ( mode->vrefresh == refresh_rate &&
>> - is_freesync_video_mode(data, mode)) {
>> - break;
>> - }
>> - }
>> + switch (mode_type) {
>> + case FSV_BASE_MODE:
>> + index = data->base_mode_index;
>> + mode = &data->modes[index];
>> + break;
>> +
>> + case FSV_PREFERRED_MODE:
>> + index = data->preferred_mode_index;
>> + mode = &data->modes[index];
>> + break;
>> +
>> + case FSV_FREESYNC_VIDEO_MODE:
>> + for (i = 0; i < data->count_modes; i++) {
>> + mode = &data->modes[i];
>> + if (mode->vrefresh == refresh_rate &&
>> + is_freesync_video_mode(data, mode)) {
>> + break;
>> + }
>> + }
>> if (i == data->count_modes)
>> mode = NULL;
>> - break;
>> -
>> - case FSV_NON_FREESYNC_VIDEO_MODE:
>> - for (i = 0; i < data->count_modes; i++) {
>> - mode = &data->modes[i];
>> - if ( mode->vrefresh == refresh_rate &&
>> - !is_freesync_video_mode(data, mode)) {
>> - break;
>> - }
>> - }
>> + break;
>> +
>> + case FSV_NON_FREESYNC_VIDEO_MODE:
>> + for (i = 0; i < data->count_modes; i++) {
>> + mode = &data->modes[i];
>> + if (mode->vrefresh == refresh_rate &&
>> + !is_freesync_video_mode(data, mode)) {
>> + break;
>> + }
>> + }
>> if (i == data->count_modes)
>> mode = NULL;
>> - break;
>> + break;
>>
>> - default:
>> - igt_assert("Cannot find mode with specified rate and type.");
>> - break;
>> - }
>> + default:
>> + igt_assert("Cannot find mode with specified rate and type.");
>> + break;
>> + }
>>
>> if (mode) {
>> igt_info("selected mode:\n");
>> kmstest_dump_mode(mode);
>> }
>>
>> - return mode;
>> + return mode;
>> }
>>
>> static int prepare_custom_mode(
>> - data_t *data,
>> + data_t *data,
>> drmModeModeInfo *custom_mode,
>> uint32_t refresh_rate)
>> {
>> @@ -473,14 +468,13 @@ static int prepare_custom_mode(
>> return -1;
>> }
>>
>> - num = (unsigned long long)base_mode->clock * 1000 * 1000;
>> - den = refresh_rate * 1000 * (unsigned long long)base_mode->htotal;
>> + num = (unsigned long long) base_mode->clock * 1000 * 1000;
>> + den = refresh_rate * 1000 * (unsigned long long) base_mode->htotal;
>> target_vtotal = num / den;
>> target_vtotal_diff = target_vtotal - base_mode->vtotal;
>> igt_debug("num=%lu, den=%lu, " \
>> - "target_vtotal=%lu, target_vtotal_diff=%lu, base_mode->vtotal=%d\n",
>> - num, den, target_vtotal, target_vtotal_diff, base_mode->vtotal
>> - );
>> + "target_vtotal=%lu, target_vtotal_diff=%lu, base_mode->vtotal=%d\n",
>> + num, den, target_vtotal, target_vtotal_diff, base_mode->vtotal);
>>
>> /* Check for illegal modes */
>> if (base_mode->vsync_start + target_vtotal_diff < base_mode->vdisplay ||
>> @@ -489,9 +483,9 @@ static int prepare_custom_mode(
>> return -1;
>>
>> *custom_mode = *base_mode;
>> - custom_mode->vtotal += (uint16_t)target_vtotal_diff;
>> - custom_mode->vsync_start += (uint16_t)target_vtotal_diff;
>> - custom_mode->vsync_end += (uint16_t)target_vtotal_diff;
>> + custom_mode->vtotal += (uint16_t) target_vtotal_diff;
>> + custom_mode->vsync_start += (uint16_t) target_vtotal_diff;
>> + custom_mode->vsync_end += (uint16_t) target_vtotal_diff;
>> custom_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
>> custom_mode->type |= DRM_MODE_TYPE_DRIVER;
>> custom_mode->vrefresh = refresh_rate;
>> @@ -688,7 +682,7 @@ static void init_data(data_t *data, igt_output_t *output) {
>>
>> connector = data->connector = output->config.connector;
>> data->count_modes = connector->count_modes;
>> - data->modes = (drmModeModeInfo *)malloc(sizeof(drmModeModeInfo) * data->count_modes);
>> + data->modes = (drmModeModeInfo *) malloc(sizeof(drmModeModeInfo) * data->count_modes);
>>
>> for (i = 0; i < data->count_modes; i++) {
>> data->modes[i] = connector->modes[i];
>> @@ -699,36 +693,35 @@ static void init_data(data_t *data, igt_output_t *output) {
>> }
>>
>> /* searching the preferred mode */
>> - for (i = 0; i < connector->count_modes; i++) {
>> - drmModeModeInfo *mode = &connector->modes[i];
>> -
>> - if (mode->type & DRM_MODE_TYPE_PREFERRED) {
>> - data->preferred_mode_index = i;
>> + for (i = 0; i < connector->count_modes; i++) {
>> + drmModeModeInfo *mode = &connector->modes[i];
>> + if (mode->type & DRM_MODE_TYPE_PREFERRED) {
>> + data->preferred_mode_index = i;
>> data->hdisplay = mode->hdisplay;
>> data->vdisplay = mode->vdisplay;
>> pm_hdisplay = preferred_mode->hdisplay;
>> pm_vdisplay = preferred_mode->vdisplay;
>> break;
>> - }
>> - }
>> -
>> - /* searching the base mode; */
>> - for (i = 0; i < connector->count_modes; i++) {
>> - drmModeModeInfo *mode = &connector->modes[i];
>> - if (mode->hdisplay == pm_hdisplay && mode->vdisplay == pm_vdisplay) {
>> - if (mode->clock > max_clk) {
>> - max_clk = mode->clock;
>> - data->base_mode_index = i;
>> - }
>> - }
>> - }
>> - igt_info("preferred=%d, base=%d\n", data->preferred_mode_index, data->base_mode_index);
>> -
>> - for (i = 0; i < connector->count_modes; i++) {
>> - drmModeModeInfo *mode = &connector->modes[i];
>> - if (is_freesync_video_mode(data, mode))
>> - igt_debug("mode[%d] is freesync video mode.\n", i);
>> - }
>> + }
>> + }
>> +
>> + /* searching the base mode */
>> + for (i = 0; i < connector->count_modes; i++) {
>> + drmModeModeInfo *mode = &connector->modes[i];
>> + if (mode->hdisplay == pm_hdisplay && mode->vdisplay == pm_vdisplay) {
>> + if (mode->clock > max_clk) {
>> + max_clk = mode->clock;
>> + data->base_mode_index = i;
>> + }
>> + }
>> + }
>> + igt_info("preferred=%d, base=%d\n", data->preferred_mode_index, data->base_mode_index);
>> +
>> + for (i = 0; i < connector->count_modes; i++) {
>> + drmModeModeInfo *mode = &connector->modes[i];
>> + if (is_freesync_video_mode(data, mode))
>> + igt_debug("mode[%d] is freesync video mode.\n", i);
>> + }
>>
>> data->range = get_vrr_range(data, output);
>> }
>> @@ -759,19 +752,19 @@ mode_transition(data_t *data, enum pipe pipe, igt_output_t *output, uint32_t sce
>>
>> igt_info("stage-1:\n");
>> switch(scene) {
>> - case SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE:
>> + case SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE:
>> mode_start = select_mode(data, FSV_BASE_MODE, 0);
>> - mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
>> + mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
>> break;
>> - case SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE:
>> + case SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE:
>> mode_start = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
>> - mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 120);
>> + mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 120);
>> break;
>> - case SCENE_NON_FSV_MODE_TO_FSV_MODE:
>> + case SCENE_NON_FSV_MODE_TO_FSV_MODE:
>> mode_start = select_mode(data, FSV_NON_FREESYNC_VIDEO_MODE, 60);
>> - mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
>> + mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
>> break;
>> - case SCENE_BASE_MODE_TO_CUSTUM_MODE:
>> + case SCENE_BASE_MODE_TO_CUSTUM_MODE:
>> mode_start = select_mode(data, FSV_BASE_MODE, 0);
>> prepare_custom_mode(data, &mode_custom, 72);
>> mode_playback = &mode_custom;
>> @@ -841,30 +834,30 @@ igt_main
>> }
>>
>> /* Expectation: Modeset happens instantaneously without blanking */
>> - igt_describe("Test switch from base freesync mode to " \
>> - "various freesync video modes");
>> - igt_subtest("freesync-base-to-various")
>> - run_test(&data, SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE);
>> + igt_describe("Test switch from base freesync mode to " \
>> + "various freesync video modes");
>> + igt_subtest("freesync-base-to-various")
>> + run_test(&data, SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE);
>>
>> /* Expectation: Modeset happens instantaneously without blanking */
>> - igt_describe("Test switching from lower refresh freesync mode to " \
>> - "another freesync mode with higher refresh rate");
>> - igt_subtest("freesync-lower-to-higher")
>> - run_test(&data, SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE);
>> + igt_describe("Test switching from lower refresh freesync mode to " \
>> + "another freesync mode with higher refresh rate");
>> + igt_subtest("freesync-lower-to-higher")
>> + run_test(&data, SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE);
>>
>> /* Expectation: Full modeset is triggered. */
>> - igt_describe("Test switching from non preferred video mode to " \
>> - "one of freesync video mode");
>> - igt_subtest("freesync-non-preferred-to-freesync")
>> - run_test(&data, SCENE_NON_FSV_MODE_TO_FSV_MODE);
>> + igt_describe("Test switching from non preferred video mode to " \
>> + "one of freesync video mode");
>> + igt_subtest("freesync-non-preferred-to-freesync")
>> + run_test(&data, SCENE_NON_FSV_MODE_TO_FSV_MODE);
>>
>> /* Expectation: Modeset happens instantaneously without blanking */
>> - igt_describe("Add custom mode through xrandr based on " \
>> - "base freesync mode and apply the new mode");
>> - igt_subtest("freesync-custom-mode")
>> - run_test(&data, SCENE_BASE_MODE_TO_CUSTUM_MODE);
>> + igt_describe("Add custom mode through xrandr based on " \
>> + "base freesync mode and apply the new mode");
>> + igt_subtest("freesync-custom-mode")
>> + run_test(&data, SCENE_BASE_MODE_TO_CUSTUM_MODE);
>>
>> - igt_info("end of test\n");
>> + igt_info("end of test\n");
>>
>> igt_fixture {
>> igt_display_fini(&data.display);
>> --
>> 2.34.1
>>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/8] tests/amdgpu/amd_freesync_video_mode: Adjust indents and spacing
2023-06-28 20:57 ` [igt-dev] [PATCH i-g-t 1/8] " Kamil Konieczny
2023-06-28 21:06 ` vitaly prosyak
@ 2023-06-29 10:16 ` Chung, ChiaHsuan (Tom)
1 sibling, 0 replies; 13+ messages in thread
From: Chung, ChiaHsuan (Tom) @ 2023-06-29 10:16 UTC (permalink / raw)
To: Kamil Konieczny, igt-dev, Christian König, Vitaly Prosyak,
Alex Hung
Hi Kamil,
Thanks, I will check with the checkpatch.pl and remove the unnecessary
modification.
Tom
On 6/29/2023 4:57 AM, Kamil Konieczny wrote:
> Hi Tom,
>
> On 2023-06-21 at 14:57:26 +0800, Tom Chung wrote:
>> Adjust some code indents and spacing.
>>
>> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
> Please subscribe to mailing list and/or see at patchwork
> https://patchwork.freedesktop.org/project/igt/series/
>
> who can help you review your patches from amd dev team
> and then add devs to Cc list, for example you could ask:
>
> Cc: Christian König <christian.koenig@amd.com>
> Cc: Vitaly Prosyak <vitaly.prosyak@amd.com>
> Cc: Alex Hung <alex.hung@amd.com>
>
> or ask them to find out a reviewer.
>
>> ---
>> tests/amdgpu/amd_freesync_video_mode.c | 539 ++++++++++++-------------
>> 1 file changed, 266 insertions(+), 273 deletions(-)
>>
>> diff --git a/tests/amdgpu/amd_freesync_video_mode.c b/tests/amdgpu/amd_freesync_video_mode.c
>> index 579d24436..fdcf1375f 100644
>> --- a/tests/amdgpu/amd_freesync_video_mode.c
>> +++ b/tests/amdgpu/amd_freesync_video_mode.c
>> @@ -25,11 +25,11 @@
>> #include <fcntl.h>
>> #include <signal.h>
>>
>> -#define NSECS_PER_SEC (1000000000ull)
>> -#define TEST_DURATION_NS (10 * NSECS_PER_SEC)
>> +#define NSECS_PER_SEC (1000000000ull)
>> +#define TEST_DURATION_NS (10 * NSECS_PER_SEC)
>>
>> -#define BYTES_PER_PIXEL 4
>> -#define MK_COLOR(r, g, b) ((0 << 24) | (r << 16) | (g << 8) | b)
>> +#define BYTES_PER_PIXEL 4
>> +#define MK_COLOR(r, g, b) ((0 << 24) | (r << 16) | (g << 8) | b)
> I do not see any value in above changes.
>
>>
>> /*
>> * The Display Core of amdgpu will add a set of modes derived from the
>> @@ -46,43 +46,44 @@
>> IGT_TEST_DESCRIPTION("This tests transition between normal and FreeSync-Video"
>> "modes and measures the FPS to ensure vblank events are"
>> "happening at the expected rate.");
>> +
> Yes this is a style fix.
>
>> typedef struct range {
>> unsigned int min;
>> unsigned int max;
>> } range_t;
>>
>> typedef struct data {
>> - int drm_fd;
>> - igt_display_t display;
>> + int drm_fd;
>> + igt_display_t display;
>> igt_plane_t *primary;
>> - igt_fb_t fbs[2];
>> - uint32_t *fb_mem[2];
>> - int front;
>> - bool fb_initialized;
>> - range_t range;
>> + igt_fb_t fbs[2];
>> + uint32_t *fb_mem[2];
>> + int front;
>> + bool fb_initialized;
>> + range_t range;
> Same here, what did you improve? spaces to tab?
> Old code looks better.
>
>>
>> drmModeConnector *connector;
>> drmModeModeInfo *modes;
>> - int count_modes;
>> + int count_modes;
>>
>> - uint32_t preferred_mode_index;
>> - uint32_t base_mode_index;
>> - uint32_t hdisplay;
>> - uint32_t vdisplay;
>> + uint32_t preferred_mode_index;
>> + uint32_t base_mode_index;
>> + uint32_t hdisplay;
>> + uint32_t vdisplay;
> Same here.
>
>> } data_t;
>>
>> struct fsv_sprite {
>> - uint32_t w;
>> - uint32_t h;
>> - uint32_t *data;
>> + uint32_t w;
>> + uint32_t h;
>> + uint32_t *data;
> ok, here you fixes spaces.
>
> I would advise to use checkpatch.pl from Linux kernel to
> spot potential improvements, maybe line too long can be
> sometimes ignored.
>
> Regards,
> Kamil
>
>> };
>> static struct fsv_sprite cicle_sprite;
>>
>> enum {
>> - FSV_PREFERRED_MODE,
>> - FSV_BASE_MODE,
>> - FSV_FREESYNC_VIDEO_MODE,
>> - FSV_NON_FREESYNC_VIDEO_MODE,
>> + FSV_PREFERRED_MODE,
>> + FSV_BASE_MODE,
>> + FSV_FREESYNC_VIDEO_MODE,
>> + FSV_NON_FREESYNC_VIDEO_MODE,
>> };
>>
>> enum {
>> @@ -93,10 +94,10 @@ enum {
>> };
>>
>> enum {
>> - SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE ,
>> - SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE ,
>> - SCENE_NON_FSV_MODE_TO_FSV_MODE ,
>> - SCENE_BASE_MODE_TO_CUSTUM_MODE ,
>> + SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE,
>> + SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE,
>> + SCENE_NON_FSV_MODE_TO_FSV_MODE,
>> + SCENE_BASE_MODE_TO_CUSTUM_MODE,
>> SCENE_NON_FSV_MODE_TO_NON_FSV_MODE,
>>
>> SCENE_COUNT,
>> @@ -157,74 +158,70 @@ static void fbmem_draw_rect(
>> uint32_t h,
>> uint32_t color)
>> {
>> - uint32_t offset = y * stride + x;
>> -
>> - for (uint32_t j = 0; j < h; j++) {
>> - for (uint32_t i = 0; i < w; i++) {
>> - fbmem[offset + i] = color;
>> - }
>> - offset += stride;
>> - }
>> + uint32_t offset = y * stride + x;
>> +
>> + for (uint32_t j = 0; j < h; j++) {
>> + for (uint32_t i = 0; i < w; i++) {
>> + fbmem[offset + i] = color;
>> + }
>> + offset += stride;
>> + }
>> }
>>
>> static void fbmem_draw_smpte_pattern(uint32_t *fbmem, int width, int height)
>> {
>> uint32_t x, y;
>> - uint32_t colors_top[] = {
>> - MK_COLOR(192, 192, 192), /* grey */
>> - MK_COLOR(192, 192, 0), /* yellow */
>> - MK_COLOR(0, 192, 192), /* cyan */
>> - MK_COLOR(0, 192, 0), /* green */
>> - MK_COLOR(192, 0, 192), /* magenta */
>> - MK_COLOR(192, 0, 0), /* red */
>> - MK_COLOR(0, 0, 192), /* blue */
>> - };
>> - uint32_t colors_middle[] = {
>> - MK_COLOR(0, 0, 192), /* blue */
>> - MK_COLOR(19, 19, 19), /* black */
>> - MK_COLOR(192, 0, 192), /* magenta */
>> - MK_COLOR(19, 19, 19), /* black */
>> - MK_COLOR(0, 192, 192), /* cyan */
>> - MK_COLOR(19, 19, 19), /* black */
>> - MK_COLOR(192, 192, 192), /* grey */
>> - };
>> - uint32_t colors_bottom[] = {
>> - MK_COLOR(0, 33, 76), /* in-phase */
>> - MK_COLOR(255, 255, 255), /* super white */
>> - MK_COLOR(50, 0, 106), /* quadrature */
>> - MK_COLOR(19, 19, 19), /* black */
>> - MK_COLOR(9, 9, 9), /* 3.5% */
>> - MK_COLOR(19, 19, 19), /* 7.5% */
>> - MK_COLOR(29, 29, 29), /* 11.5% */
>> - MK_COLOR(19, 19, 19), /* black */
>> - };
>> -
>> - for (y = 0; y < height * 6 / 9; ++y) {
>> - for (x = 0; x < width; ++x)
>> - fbmem[x] =
>> - colors_top[x * 7 / width];
>> - fbmem += width;
>> - }
>> -
>> - for (; y < height * 7 / 9; ++y) {
>> - for (x = 0; x < width; ++x)
>> - fbmem[x] =
>> - colors_middle[x * 7 / width];
>> - fbmem += width;
>> - }
>> -
>> - for (; y < height; ++y) {
>> - for (x = 0; x < width * 5 / 7; ++x)
>> - fbmem[x] =
>> - colors_bottom[x * 4 / (width * 5 / 7)];
>> - for (; x < width * 6 / 7; ++x)
>> - fbmem[x] =
>> - colors_bottom[(x - width * 5 / 7) * 3
>> - / (width / 7) + 4];
>> - for (; x < width; ++x)
>> - fbmem[x] = colors_bottom[7];
>> - fbmem += width;
>> - }
>> + uint32_t colors_top[] = {
>> + MK_COLOR(192, 192, 192), /* grey */
>> + MK_COLOR(192, 192, 0), /* yellow */
>> + MK_COLOR(0, 192, 192), /* cyan */
>> + MK_COLOR(0, 192, 0), /* green */
>> + MK_COLOR(192, 0, 192), /* magenta */
>> + MK_COLOR(192, 0, 0), /* red */
>> + MK_COLOR(0, 0, 192), /* blue */
>> + };
>> + uint32_t colors_middle[] = {
>> + MK_COLOR(0, 0, 192), /* blue */
>> + MK_COLOR(19, 19, 19), /* black */
>> + MK_COLOR(192, 0, 192), /* magenta */
>> + MK_COLOR(19, 19, 19), /* black */
>> + MK_COLOR(0, 192, 192), /* cyan */
>> + MK_COLOR(19, 19, 19), /* black */
>> + MK_COLOR(192, 192, 192), /* grey */
>> + };
>> + uint32_t colors_bottom[] = {
>> + MK_COLOR(0, 33, 76), /* in-phase */
>> + MK_COLOR(255, 255, 255), /* super white */
>> + MK_COLOR(50, 0, 106), /* quadrature */
>> + MK_COLOR(19, 19, 19), /* black */
>> + MK_COLOR(9, 9, 9), /* 3.5% */
>> + MK_COLOR(19, 19, 19), /* 7.5% */
>> + MK_COLOR(29, 29, 29), /* 11.5% */
>> + MK_COLOR(19, 19, 19), /* black */
>> + };
>> +
>> + for (y = 0; y < height * 6 / 9; ++y) {
>> + for (x = 0; x < width; ++x)
>> + fbmem[x] = colors_top[x * 7 / width];
>> + fbmem += width;
>> + }
>> +
>> + for (; y < height * 7 / 9; ++y) {
>> + for (x = 0; x < width; ++x)
>> + fbmem[x] = colors_middle[x * 7 / width];
>> + fbmem += width;
>> + }
>> +
>> + for (; y < height; ++y) {
>> + for (x = 0; x < width * 5 / 7; ++x)
>> + fbmem[x] = colors_bottom[x * 4 / (width * 5 / 7)];
>> + for (; x < width * 6 / 7; ++x)
>> + fbmem[x] = colors_bottom[(x - width * 5 / 7) * 3
>> + / (width / 7) + 4];
>> + for (; x < width; ++x)
>> + fbmem[x] = colors_bottom[7];
>> + fbmem += width;
>> + }
>> }
>>
>> static void sprite_init(
>> @@ -232,13 +229,13 @@ static void sprite_init(
>> uint32_t w,
>> uint32_t h)
>> {
>> - igt_assert(sprite);
>> + igt_assert(sprite);
>>
>> - sprite->data = (uint32_t *)malloc(w * h * BYTES_PER_PIXEL);
>> - igt_assert(sprite->data);
>> + sprite->data = (uint32_t *) malloc(w * h * BYTES_PER_PIXEL);
>> + igt_assert(sprite->data);
>>
>> - sprite->w = w;
>> - sprite->h = h;
>> + sprite->w = w;
>> + sprite->h = h;
>> }
>>
>> static void sprite_paste(
>> @@ -248,14 +245,14 @@ static void sprite_paste(
>> uint32_t x,
>> uint32_t y)
>> {
>> - uint32_t fb_offset = y * fb_stride + x;
>> - uint32_t sprite_offset = 0;
>> -
>> - for (int j = 0; j < sprite->h; j++) {
>> - memcpy(fbmem + fb_offset, sprite->data + sprite_offset, sprite->w * 4);
>> - sprite_offset += sprite->w;
>> - fb_offset += fb_stride;
>> - }
>> + uint32_t fb_offset = y * fb_stride + x;
>> + uint32_t sprite_offset = 0;
>> +
>> + for (int j = 0; j < sprite->h; j++) {
>> + memcpy(fbmem + fb_offset, sprite->data + sprite_offset, sprite->w * 4);
>> + sprite_offset += sprite->w;
>> + fb_offset += fb_stride;
>> + }
>> }
>>
>> static void sprite_draw_rect(
>> @@ -266,16 +263,15 @@ static void sprite_draw_rect(
>> uint32_t h,
>> uint32_t color)
>> {
>> - uint32_t offset = y * sprite->w + x;
>> - uint32_t *addr = (uint32_t *)sprite->data;
>> -
>> - for (uint32_t j = 0; j < h; j++) {
>> - addr = (uint32_t *)(sprite->data + offset);
>> - for (uint32_t i = 0; i < w; i++) {
>> - addr[i] = color;
>> - }
>> - offset += sprite->w;
>> - }
>> + uint32_t offset = y * sprite->w + x;
>> + uint32_t *addr = (uint32_t *)sprite->data;
>> +
>> + for (uint32_t j = 0; j < h; j++) {
>> + addr = (uint32_t *) (sprite->data + offset);
>> + for (uint32_t i = 0; i < w; i++)
>> + addr[i] = color;
>> + offset += sprite->w;
>> + }
>> }
>>
>> /* drawing horizontal line in the sprite */
>> @@ -287,9 +283,9 @@ static void sprite_draw_hline(
>> uint32_t color)
>> {
>> uint32_t offset = y1 * sprite->w;
>> - for (int x = x1 ; x < x2; x++) {
>> - sprite->data[offset + x] = color;
>> - }
>> + for (int x = x1 ; x < x2; x++) {
>> + sprite->data[offset + x] = color;
>> + }
>> }
>>
>> /* drawing filled circle with Bresenham's algorithm */
>> @@ -300,71 +296,70 @@ static void sprite_draw_circle(
>> uint32_t radius,
>> uint32_t color)
>> {
>> - int offsetx = 0, offsety = radius, d = radius -1;
>> -
>> - while (offsety >= offsetx) {
>> - sprite_draw_hline(sprite, x - offsety, y + offsetx,
>> - x + offsety, color);
>> - sprite_draw_hline(sprite, x - offsetx, y + offsety,
>> - x + offsetx, color);
>> - sprite_draw_hline(sprite, x - offsetx, y - offsety,
>> - x + offsetx, color);
>> - sprite_draw_hline(sprite, x - offsety, y - offsetx,
>> - x + offsety, color);
>> -
>> - if (d >= 2 * offsetx) {
>> - d -= 2 * offsetx + 1;
>> - offsetx += 1;
>> - } else if (d < 2 * (radius - offsety)) {
>> - d += 2 * offsety - 1;
>> - offsety -= 1;
>> - } else {
>> - d += 2 * (offsety - offsetx - 1);
>> - offsety -= 1;
>> - offsetx += 1;
>> - }
>> - }
>> + int offsetx = 0, offsety = radius, d = radius -1;
>> +
>> + while (offsety >= offsetx) {
>> + sprite_draw_hline(sprite, x - offsety, y + offsetx,
>> + x + offsety, color);
>> + sprite_draw_hline(sprite, x - offsetx, y + offsety,
>> + x + offsetx, color);
>> + sprite_draw_hline(sprite, x - offsetx, y - offsety,
>> + x + offsetx, color);
>> + sprite_draw_hline(sprite, x - offsety, y - offsetx,
>> + x + offsety, color);
>> +
>> + if (d >= 2 * offsetx) {
>> + d -= 2 * offsetx + 1;
>> + offsetx += 1;
>> + } else if (d < 2 * (radius - offsety)) {
>> + d += 2 * offsety - 1;
>> + offsety -= 1;
>> + } else {
>> + d += 2 * (offsety - offsetx - 1);
>> + offsety -= 1;
>> + offsetx += 1;
>> + }
>> + }
>> }
>>
>> static void sprite_anim_init(void)
>> {
>> - memset(&cicle_sprite, 0, sizeof(cicle_sprite));
>> - sprite_init(&cicle_sprite, 100, 100);
>> -
>> - sprite_draw_rect(&cicle_sprite, 0, 0, 100, 100, MK_COLOR(128, 128, 128));
>> + memset(&cicle_sprite, 0, sizeof(cicle_sprite));
>> + sprite_init(&cicle_sprite, 100, 100);
>> + sprite_draw_rect(&cicle_sprite, 0, 0, 100, 100, MK_COLOR(128, 128, 128));
>> /* draw filled circle with center (50, 50), radius 50. */
>> - sprite_draw_circle(&cicle_sprite, 50, 50, 50, MK_COLOR(0, 0, 255));
>> + sprite_draw_circle(&cicle_sprite, 50, 50, 50, MK_COLOR(0, 0, 255));
>> }
>>
>> static void sprite_anim(data_t *data, uint32_t *addr)
>> {
>> - struct timeval tv1, tv2, tv_delta;
>> - uint64_t frame_ns = get_time_ns();
>> - double now = frame_ns / (double)NSECS_PER_SEC;
>> + struct timeval tv1, tv2, tv_delta;
>> + uint64_t frame_ns = get_time_ns();
>> + double now = frame_ns / (double)NSECS_PER_SEC;
>>
>> - gettimeofday(&tv1, NULL);
>> + gettimeofday(&tv1, NULL);
>>
>> - fbmem_draw_rect(addr, data->hdisplay, 0, 0,
>> - data->hdisplay, data->vdisplay, MK_COLOR(128, 128, 128));
>> + fbmem_draw_rect(addr, data->hdisplay, 0, 0,
>> + data->hdisplay, data->vdisplay, MK_COLOR(128, 128, 128));
>> /* red rectangle for checking tearing effect*/
>> - if (data->front) {
>> - fbmem_draw_rect(addr, data->hdisplay, 0, 0,
>> + if (data->front) {
>> + fbmem_draw_rect(addr, data->hdisplay, 0, 0,
>> 30, data->vdisplay, MK_COLOR(191, 0, 0));
>> - }
>> + }
>>
>> /* draw 16 filled circles */
>> - for (int i = 0; i < 16; ++i) {
>> - double tv = now + i * 0.25;
>> - float x, y;
>> - x = data->hdisplay - 10.0f - 118.0f * i - 100.0f;
>> - y = data->vdisplay * 0.5f + cos(tv) * data->vdisplay * 0.35;
>> - sprite_paste(addr, data->hdisplay, &cicle_sprite, (uint32_t)x, (uint32_t)y);
>> - }
>> -
>> - gettimeofday(&tv2, NULL);
>> - timersub(&tv2, &tv1, &tv_delta);
>> -
>> - igt_debug("time of drawing: %ld ms\n", tv_delta.tv_usec / 1000);
>> + for (int i = 0; i < 16; ++i) {
>> + double tv = now + i * 0.25;
>> + float x, y;
>> + x = data->hdisplay - 10.0f - 118.0f * i - 100.0f;
>> + y = data->vdisplay * 0.5f + cos(tv) * (double) data->vdisplay * 0.35f;
>> + sprite_paste(addr, data->hdisplay, &cicle_sprite, (uint32_t)x, (uint32_t)y);
>> + }
>> +
>> + gettimeofday(&tv2, NULL);
>> + timersub(&tv2, &tv1, &tv_delta);
>> +
>> + igt_debug("time of drawing: %ld ms\n", tv_delta.tv_usec / 1000);
>> }
>>
>> /*----------------------------------------------------------------------------*/
>> @@ -376,79 +371,79 @@ static void sprite_anim(data_t *data, uint32_t *addr)
>> */
>> static bool is_freesync_video_mode(data_t *data, drmModeModeInfo *mode)
>> {
>> - drmModeModeInfo *base_mode = &data->modes[data->base_mode_index];
>> - uint32_t bm_clock = base_mode->clock;
>> + drmModeModeInfo *base_mode = &data->modes[data->base_mode_index];
>> + uint32_t bm_clock = base_mode->clock;
>>
>> - if ( mode->hdisplay == data->hdisplay &&
>> - mode->vdisplay == data->vdisplay &&
>> - mode->clock == bm_clock &&
>> + if (mode->hdisplay == data->hdisplay &&
>> + mode->vdisplay == data->vdisplay &&
>> + mode->clock == bm_clock &&
>> mode->type & DRM_MODE_TYPE_DRIVER) {
>> - return true;
>> - }
>> + return true;
>> + }
>>
>> - return false;
>> + return false;
>> }
>>
>> static drmModeModeInfo* select_mode(
>> - data_t *data,
>> - uint32_t mode_type,
>> - int refresh_rate)
>> + data_t *data,
>> + uint32_t mode_type,
>> + int refresh_rate)
>> {
>> int i;
>> - int index;
>> - drmModeModeInfo *mode = NULL;
>> + int index;
>> + drmModeModeInfo *mode = NULL;
>> igt_debug("select_mode: type=%d, refresh_rate=%d\n", mode_type, refresh_rate);
>>
>> - switch (mode_type) {
>> - case FSV_BASE_MODE:
>> - index = data->base_mode_index;
>> - mode = &data->modes[index];
>> - break;
>> -
>> - case FSV_PREFERRED_MODE:
>> - index = data->preferred_mode_index;
>> - mode = &data->modes[index];
>> - break;
>> -
>> - case FSV_FREESYNC_VIDEO_MODE:
>> - for (i = 0; i < data->count_modes; i++) {
>> - mode = &data->modes[i];
>> - if ( mode->vrefresh == refresh_rate &&
>> - is_freesync_video_mode(data, mode)) {
>> - break;
>> - }
>> - }
>> + switch (mode_type) {
>> + case FSV_BASE_MODE:
>> + index = data->base_mode_index;
>> + mode = &data->modes[index];
>> + break;
>> +
>> + case FSV_PREFERRED_MODE:
>> + index = data->preferred_mode_index;
>> + mode = &data->modes[index];
>> + break;
>> +
>> + case FSV_FREESYNC_VIDEO_MODE:
>> + for (i = 0; i < data->count_modes; i++) {
>> + mode = &data->modes[i];
>> + if (mode->vrefresh == refresh_rate &&
>> + is_freesync_video_mode(data, mode)) {
>> + break;
>> + }
>> + }
>> if (i == data->count_modes)
>> mode = NULL;
>> - break;
>> -
>> - case FSV_NON_FREESYNC_VIDEO_MODE:
>> - for (i = 0; i < data->count_modes; i++) {
>> - mode = &data->modes[i];
>> - if ( mode->vrefresh == refresh_rate &&
>> - !is_freesync_video_mode(data, mode)) {
>> - break;
>> - }
>> - }
>> + break;
>> +
>> + case FSV_NON_FREESYNC_VIDEO_MODE:
>> + for (i = 0; i < data->count_modes; i++) {
>> + mode = &data->modes[i];
>> + if (mode->vrefresh == refresh_rate &&
>> + !is_freesync_video_mode(data, mode)) {
>> + break;
>> + }
>> + }
>> if (i == data->count_modes)
>> mode = NULL;
>> - break;
>> + break;
>>
>> - default:
>> - igt_assert("Cannot find mode with specified rate and type.");
>> - break;
>> - }
>> + default:
>> + igt_assert("Cannot find mode with specified rate and type.");
>> + break;
>> + }
>>
>> if (mode) {
>> igt_info("selected mode:\n");
>> kmstest_dump_mode(mode);
>> }
>>
>> - return mode;
>> + return mode;
>> }
>>
>> static int prepare_custom_mode(
>> - data_t *data,
>> + data_t *data,
>> drmModeModeInfo *custom_mode,
>> uint32_t refresh_rate)
>> {
>> @@ -473,14 +468,13 @@ static int prepare_custom_mode(
>> return -1;
>> }
>>
>> - num = (unsigned long long)base_mode->clock * 1000 * 1000;
>> - den = refresh_rate * 1000 * (unsigned long long)base_mode->htotal;
>> + num = (unsigned long long) base_mode->clock * 1000 * 1000;
>> + den = refresh_rate * 1000 * (unsigned long long) base_mode->htotal;
>> target_vtotal = num / den;
>> target_vtotal_diff = target_vtotal - base_mode->vtotal;
>> igt_debug("num=%lu, den=%lu, " \
>> - "target_vtotal=%lu, target_vtotal_diff=%lu, base_mode->vtotal=%d\n",
>> - num, den, target_vtotal, target_vtotal_diff, base_mode->vtotal
>> - );
>> + "target_vtotal=%lu, target_vtotal_diff=%lu, base_mode->vtotal=%d\n",
>> + num, den, target_vtotal, target_vtotal_diff, base_mode->vtotal);
>>
>> /* Check for illegal modes */
>> if (base_mode->vsync_start + target_vtotal_diff < base_mode->vdisplay ||
>> @@ -489,9 +483,9 @@ static int prepare_custom_mode(
>> return -1;
>>
>> *custom_mode = *base_mode;
>> - custom_mode->vtotal += (uint16_t)target_vtotal_diff;
>> - custom_mode->vsync_start += (uint16_t)target_vtotal_diff;
>> - custom_mode->vsync_end += (uint16_t)target_vtotal_diff;
>> + custom_mode->vtotal += (uint16_t) target_vtotal_diff;
>> + custom_mode->vsync_start += (uint16_t) target_vtotal_diff;
>> + custom_mode->vsync_end += (uint16_t) target_vtotal_diff;
>> custom_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
>> custom_mode->type |= DRM_MODE_TYPE_DRIVER;
>> custom_mode->vrefresh = refresh_rate;
>> @@ -688,7 +682,7 @@ static void init_data(data_t *data, igt_output_t *output) {
>>
>> connector = data->connector = output->config.connector;
>> data->count_modes = connector->count_modes;
>> - data->modes = (drmModeModeInfo *)malloc(sizeof(drmModeModeInfo) * data->count_modes);
>> + data->modes = (drmModeModeInfo *) malloc(sizeof(drmModeModeInfo) * data->count_modes);
>>
>> for (i = 0; i < data->count_modes; i++) {
>> data->modes[i] = connector->modes[i];
>> @@ -699,36 +693,35 @@ static void init_data(data_t *data, igt_output_t *output) {
>> }
>>
>> /* searching the preferred mode */
>> - for (i = 0; i < connector->count_modes; i++) {
>> - drmModeModeInfo *mode = &connector->modes[i];
>> -
>> - if (mode->type & DRM_MODE_TYPE_PREFERRED) {
>> - data->preferred_mode_index = i;
>> + for (i = 0; i < connector->count_modes; i++) {
>> + drmModeModeInfo *mode = &connector->modes[i];
>> + if (mode->type & DRM_MODE_TYPE_PREFERRED) {
>> + data->preferred_mode_index = i;
>> data->hdisplay = mode->hdisplay;
>> data->vdisplay = mode->vdisplay;
>> pm_hdisplay = preferred_mode->hdisplay;
>> pm_vdisplay = preferred_mode->vdisplay;
>> break;
>> - }
>> - }
>> -
>> - /* searching the base mode; */
>> - for (i = 0; i < connector->count_modes; i++) {
>> - drmModeModeInfo *mode = &connector->modes[i];
>> - if (mode->hdisplay == pm_hdisplay && mode->vdisplay == pm_vdisplay) {
>> - if (mode->clock > max_clk) {
>> - max_clk = mode->clock;
>> - data->base_mode_index = i;
>> - }
>> - }
>> - }
>> - igt_info("preferred=%d, base=%d\n", data->preferred_mode_index, data->base_mode_index);
>> -
>> - for (i = 0; i < connector->count_modes; i++) {
>> - drmModeModeInfo *mode = &connector->modes[i];
>> - if (is_freesync_video_mode(data, mode))
>> - igt_debug("mode[%d] is freesync video mode.\n", i);
>> - }
>> + }
>> + }
>> +
>> + /* searching the base mode */
>> + for (i = 0; i < connector->count_modes; i++) {
>> + drmModeModeInfo *mode = &connector->modes[i];
>> + if (mode->hdisplay == pm_hdisplay && mode->vdisplay == pm_vdisplay) {
>> + if (mode->clock > max_clk) {
>> + max_clk = mode->clock;
>> + data->base_mode_index = i;
>> + }
>> + }
>> + }
>> + igt_info("preferred=%d, base=%d\n", data->preferred_mode_index, data->base_mode_index);
>> +
>> + for (i = 0; i < connector->count_modes; i++) {
>> + drmModeModeInfo *mode = &connector->modes[i];
>> + if (is_freesync_video_mode(data, mode))
>> + igt_debug("mode[%d] is freesync video mode.\n", i);
>> + }
>>
>> data->range = get_vrr_range(data, output);
>> }
>> @@ -759,19 +752,19 @@ mode_transition(data_t *data, enum pipe pipe, igt_output_t *output, uint32_t sce
>>
>> igt_info("stage-1:\n");
>> switch(scene) {
>> - case SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE:
>> + case SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE:
>> mode_start = select_mode(data, FSV_BASE_MODE, 0);
>> - mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
>> + mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
>> break;
>> - case SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE:
>> + case SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE:
>> mode_start = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
>> - mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 120);
>> + mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 120);
>> break;
>> - case SCENE_NON_FSV_MODE_TO_FSV_MODE:
>> + case SCENE_NON_FSV_MODE_TO_FSV_MODE:
>> mode_start = select_mode(data, FSV_NON_FREESYNC_VIDEO_MODE, 60);
>> - mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
>> + mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
>> break;
>> - case SCENE_BASE_MODE_TO_CUSTUM_MODE:
>> + case SCENE_BASE_MODE_TO_CUSTUM_MODE:
>> mode_start = select_mode(data, FSV_BASE_MODE, 0);
>> prepare_custom_mode(data, &mode_custom, 72);
>> mode_playback = &mode_custom;
>> @@ -841,30 +834,30 @@ igt_main
>> }
>>
>> /* Expectation: Modeset happens instantaneously without blanking */
>> - igt_describe("Test switch from base freesync mode to " \
>> - "various freesync video modes");
>> - igt_subtest("freesync-base-to-various")
>> - run_test(&data, SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE);
>> + igt_describe("Test switch from base freesync mode to " \
>> + "various freesync video modes");
>> + igt_subtest("freesync-base-to-various")
>> + run_test(&data, SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE);
>>
>> /* Expectation: Modeset happens instantaneously without blanking */
>> - igt_describe("Test switching from lower refresh freesync mode to " \
>> - "another freesync mode with higher refresh rate");
>> - igt_subtest("freesync-lower-to-higher")
>> - run_test(&data, SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE);
>> + igt_describe("Test switching from lower refresh freesync mode to " \
>> + "another freesync mode with higher refresh rate");
>> + igt_subtest("freesync-lower-to-higher")
>> + run_test(&data, SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE);
>>
>> /* Expectation: Full modeset is triggered. */
>> - igt_describe("Test switching from non preferred video mode to " \
>> - "one of freesync video mode");
>> - igt_subtest("freesync-non-preferred-to-freesync")
>> - run_test(&data, SCENE_NON_FSV_MODE_TO_FSV_MODE);
>> + igt_describe("Test switching from non preferred video mode to " \
>> + "one of freesync video mode");
>> + igt_subtest("freesync-non-preferred-to-freesync")
>> + run_test(&data, SCENE_NON_FSV_MODE_TO_FSV_MODE);
>>
>> /* Expectation: Modeset happens instantaneously without blanking */
>> - igt_describe("Add custom mode through xrandr based on " \
>> - "base freesync mode and apply the new mode");
>> - igt_subtest("freesync-custom-mode")
>> - run_test(&data, SCENE_BASE_MODE_TO_CUSTUM_MODE);
>> + igt_describe("Add custom mode through xrandr based on " \
>> + "base freesync mode and apply the new mode");
>> + igt_subtest("freesync-custom-mode")
>> + run_test(&data, SCENE_BASE_MODE_TO_CUSTUM_MODE);
>>
>> - igt_info("end of test\n");
>> + igt_info("end of test\n");
>>
>> igt_fixture {
>> igt_display_fini(&data.display);
>> --
>> 2.34.1
>>
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2023-06-29 10:16 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-06-21 6:57 [igt-dev] [PATCH i-g-t 1/8] tests/amdgpu/amd_freesync_video_mode: Adjust indents and spacing Tom Chung
2023-06-21 6:57 ` [igt-dev] [PATCH i-g-t 2/8] tests/amdgpu/amd_freesync_video_mode: Fix memory leak and corruption Tom Chung
2023-06-21 6:57 ` [igt-dev] [PATCH i-g-t 3/8] tests/amdgpu/amd_freesync_video_mode: Fix wrong resolution setting during the test Tom Chung
2023-06-21 6:57 ` [igt-dev] [PATCH i-g-t 4/8] tests/amdgpu/amd_freesync_video_mode: Add some code from kms_vrr to resolve tearing issue Tom Chung
2023-06-21 6:57 ` [igt-dev] [PATCH i-g-t 5/8] tests/amdgpu/amd_freesync_video_mode: Add/remove some test progress messages Tom Chung
2023-06-21 6:57 ` [igt-dev] [PATCH i-g-t 6/8] tests/amdgpu/amd_freesync_video_mode: Move the vrr setting and display reset Tom Chung
2023-06-21 6:57 ` [igt-dev] [PATCH i-g-t 7/8] tests/amdgpu/amd_freesync_video_mode: Fix wrong resolution setting for some panel Tom Chung
2023-06-21 6:57 ` [igt-dev] [PATCH i-g-t 8/8] tests/amdgpu/amd_freesync_video_mode: Add amd_freesync_video_mode to meson.build Tom Chung
2023-06-21 14:55 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/8] tests/amdgpu/amd_freesync_video_mode: Adjust indents and spacing Patchwork
2023-06-22 3:34 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
2023-06-28 20:57 ` [igt-dev] [PATCH i-g-t 1/8] " Kamil Konieczny
2023-06-28 21:06 ` vitaly prosyak
2023-06-29 10:16 ` Chung, ChiaHsuan (Tom)
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