* [PATCH 1/2] tests/amdgpu: Fix typos and grammar in test files
@ 2026-04-17 0:21 Alex Hung
2026-04-17 0:21 ` [PATCH 2/2] tests/amdgpu/amd_plane: Remove unused parameters from test_plane() Alex Hung
` (4 more replies)
0 siblings, 5 replies; 7+ messages in thread
From: Alex Hung @ 2026-04-17 0:21 UTC (permalink / raw)
To: igt-dev; +Cc: aurabindo.pillai, Alex Hung
Fix various typos and grammar errors across multiple AMDGPU
test files:
- amd_abm: "amdpgu" -> "amdgpu", fix grammar in comment
- amd_assr: add missing article, remove trailing spaces
- amd_color: "amdpgu" -> "amdgpu", "liner" -> "linear",
fix incorrect "degamma" comment in regamma function
- amd_plane: "backgroud" -> "background",
"overley" -> "overlay", "beacause" -> "because",
fix wrong size notation and misleading comment
- amd_vrr_range: "gange" -> "range" in function name
Assisted-by: GitHub Copilot:Claude Opus 4.6
Signed-off-by: Alex Hung <alex.hung@amd.com>
---
tests/amdgpu/amd_abm.c | 4 ++--
tests/amdgpu/amd_assr.c | 6 +++---
tests/amdgpu/amd_color.c | 6 +++---
tests/amdgpu/amd_plane.c | 14 +++++++-------
tests/amdgpu/amd_vrr_range.c | 4 ++--
5 files changed, 17 insertions(+), 17 deletions(-)
diff --git a/tests/amdgpu/amd_abm.c b/tests/amdgpu/amd_abm.c
index d36044aab..207d075b0 100644
--- a/tests/amdgpu/amd_abm.c
+++ b/tests/amdgpu/amd_abm.c
@@ -128,7 +128,7 @@ static void test_init(data_t *data)
if (!has_edp)
igt_skip("No eDP connector found\n");
- /* It doesn't matter which pipe we choose on amdpgu. */
+ /* It doesn't matter which pipe we choose on amdgpu. */
data->crtc = igt_first_crtc(&data->display);
igt_display_reset(display);
@@ -169,7 +169,7 @@ static void test_fini(data_t *data)
igt_display_t *display = &data->display;
igt_output_t *output;
- /* Disable ABM before exit test */
+ /* Disable ABM before exiting the test */
for_each_valid_output_on_crtc(&data->display,
data->crtc,
output) {
diff --git a/tests/amdgpu/amd_assr.c b/tests/amdgpu/amd_assr.c
index b07f3fb15..71209e79f 100644
--- a/tests/amdgpu/amd_assr.c
+++ b/tests/amdgpu/amd_assr.c
@@ -29,7 +29,7 @@
#include <sys/stat.h>
IGT_TEST_DESCRIPTION("Check if ASSR is enabled on eDP links that support "
- "the display authentication by changing scrambling sequence. "
+ "the display authentication by changing the scrambling sequence. "
"The test also covers embedded and non-removable "
"displays that appear as DP.");
@@ -285,10 +285,10 @@ int igt_main()
igt_describe("Test ASSR on connected DP/eDP links");
igt_subtest("assr-links")
test_assr_links(&data, TEST_NONE);
- igt_describe("Test ASSR with DPMS ");
+ igt_describe("Test ASSR with DPMS");
igt_subtest("assr-links-dpms")
test_assr_links(&data, TEST_DPMS);
- igt_describe("Test ASSR with suspend ");
+ igt_describe("Test ASSR with suspend");
igt_subtest("assr-links-suspend")
test_assr_links(&data, TEST_SUSPEND);
diff --git a/tests/amdgpu/amd_color.c b/tests/amdgpu/amd_color.c
index 68f541d64..eb1eb581a 100644
--- a/tests/amdgpu/amd_color.c
+++ b/tests/amdgpu/amd_color.c
@@ -177,7 +177,7 @@ static void test_init(data_t *data)
{
igt_display_t *display = &data->display;
- /* It doesn't matter which pipe we choose on amdpgu. */
+ /* It doesn't matter which pipe we choose on amdgpu. */
data->crtc = igt_first_crtc(&data->display);
igt_display_reset(display);
@@ -262,7 +262,7 @@ static void test_crtc_linear_degamma(data_t *data)
* sRGB regamma matrix with incorrect calculations or rounding errors.
* If we put the pipe into bypass or use the hardware defined sRGB regamma
* on the plane then we can and should get the correct CRTC when passing a
- * liner regamma matrix to DRM.
+ * linear regamma matrix to DRM.
*/
static void test_crtc_linear_regamma(data_t *data)
{
@@ -291,7 +291,7 @@ static void test_crtc_linear_regamma(data_t *data)
igt_pipe_crc_collect_crc(data->pipe_crc, &ref_crc);
- /* Apply a linear degamma. The result should remain the same. */
+ /* Apply a linear regamma. The result should remain the same. */
set_regamma_lut(data, &lut_linear);
igt_display_commit_atomic(display, 0, NULL);
diff --git a/tests/amdgpu/amd_plane.c b/tests/amdgpu/amd_plane.c
index 412a220b2..e63d4dc2f 100644
--- a/tests/amdgpu/amd_plane.c
+++ b/tests/amdgpu/amd_plane.c
@@ -366,14 +366,14 @@ static void test_multi_overlay(data_t *data, int display_count, int w, int h, st
}
/*
- * Compares the result of white backgroud with white window with and without MPO
+ * Compares the result of white background with white window with and without MPO
*
* Reference crc:
* Draws a White background of size (pw,ph).
*
* Test crc:
- * Draws a White Overlay of size (pw,ph) then creates a cutout of size (p,w) at location (x,y)
- * Draws a White Primary plane of size (p,w) at location (x,y) (under the overlay)
+ * Draws a White Overlay of size (pw,ph) then creates a cutout of size (dw,dh) at location (x,y)
+ * Draws a White Primary plane of size (dw,dh) at location (x,y) (under the overlay)
*
* NOTE: The reason for using White+White is to speed up the crc (reuse the ref crc for all cases vs taking
* a ref crc per flip)
@@ -400,7 +400,7 @@ static void test_plane(data_t *data, int n, int x, int y, double w, double h, do
igt_plane_set_fb(data->primary[n], &fbc[n].test_primary);
igt_plane_set_fb(data->overlay[n], &fbc[n].test_overlay);
- /* Move the overlay to cover the cutout */
+ /* Move the primary to cover the cutout */
igt_plane_set_position(data->primary[n], x, y);
igt_plane_set_size(data->primary[n], dw, dh);
@@ -451,7 +451,7 @@ static void test_panning_1_display(data_t *data, int display_count, int w, int h
int x = dx*j*dir[i][0];
int y = dy*j*dir[i][1];
- /* No need to pan a overley that is bigger than the display */
+ /* No need to pan an overlay that is bigger than the display */
if (pw <= w && ph <= h)
break;
@@ -491,7 +491,7 @@ static void test_scaling_planes(data_t *data, int display_count, int w, int h, s
int ph = data->h[n];
for (int i=0;i<ARRAY_SIZE(scale);i++) {
- /* No need to scale a overley that is bigger than the display */
+ /* No need to scale an overlay that is bigger than the display */
if (pw <= w*scale[i] && ph <= h*scale[i])
break;
test_plane(data, n, 0, 0, w, h, w*scale[i], h*scale[i], pw, ph, fb);
@@ -523,7 +523,7 @@ static void test_panning_2_display(data_t *data, int w, int h, struct fbc *fbc)
int it = 3; /* # of times to swap */
/* Set y to 0 if window is bigger than one of the displays
- * beacause y will be negative in that case
+ * because y will be negative in that case
*/
if (h >= smallest_h)
y[0] = y[1] = y[2] = 0;
diff --git a/tests/amdgpu/amd_vrr_range.c b/tests/amdgpu/amd_vrr_range.c
index 4397f3c15..0312e22c2 100644
--- a/tests/amdgpu/amd_vrr_range.c
+++ b/tests/amdgpu/amd_vrr_range.c
@@ -260,7 +260,7 @@ static bool has_vrr(igt_output_t *output)
igt_output_get_prop(output, IGT_CONNECTOR_VRR_CAPABLE);
}
-static void parse_vrr_gange_from_edid(data_t *data, uint8_t *edid, int index)
+static void parse_vrr_range_from_edid(data_t *data, uint8_t *edid, int index)
{
bool max_rate_offset = false;
bool min_rate_offset = false;
@@ -314,7 +314,7 @@ static bool find_vrr_range_from_edid(data_t *data, igt_output_t *output)
break;
else if (i == range_head_size-1) {
/* Found Display Range Limits Descriptor block */
- parse_vrr_gange_from_edid(data, sink_edid, index);
+ parse_vrr_range_from_edid(data, sink_edid, index);
return true;
}
}
--
2.43.0
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/2] tests/amdgpu/amd_plane: Remove unused parameters from test_plane()
2026-04-17 0:21 [PATCH 1/2] tests/amdgpu: Fix typos and grammar in test files Alex Hung
@ 2026-04-17 0:21 ` Alex Hung
2026-04-17 3:26 ` Karthik B S
2026-04-17 2:51 ` ✓ i915.CI.BAT: success for series starting with [1/2] tests/amdgpu: Fix typos and grammar in test files Patchwork
` (3 subsequent siblings)
4 siblings, 1 reply; 7+ messages in thread
From: Alex Hung @ 2026-04-17 0:21 UTC (permalink / raw)
To: igt-dev; +Cc: aurabindo.pillai, Alex Hung
Remove unused w and h parameters from test_plane() in
amd_plane. These parameters were never referenced inside
the function body; only dw and dh are used for the cutout
and primary plane sizing. Update all call sites accordingly.
Assisted-by: GitHub Copilot:Claude Opus 4.6
Signed-off-by: Alex Hung <alex.hung@amd.com>
---
tests/amdgpu/amd_plane.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/tests/amdgpu/amd_plane.c b/tests/amdgpu/amd_plane.c
index e63d4dc2f..9a08f8e29 100644
--- a/tests/amdgpu/amd_plane.c
+++ b/tests/amdgpu/amd_plane.c
@@ -378,7 +378,7 @@ static void test_multi_overlay(data_t *data, int display_count, int w, int h, st
* NOTE: The reason for using White+White is to speed up the crc (reuse the ref crc for all cases vs taking
* a ref crc per flip)
*/
-static void test_plane(data_t *data, int n, int x, int y, double w, double h, double dw, double dh, int pw, int ph, struct fbc *fbc){
+static void test_plane(data_t *data, int n, int x, int y, double dw, double dh, int pw, int ph, struct fbc *fbc){
igt_crc_t test_crc;
igt_display_t *display = &data->display;
@@ -455,7 +455,7 @@ static void test_panning_1_display(data_t *data, int display_count, int w, int h
if (pw <= w && ph <= h)
break;
- test_plane(data, n, x, y, w, h, w, h, pw, ph, fb);
+ test_plane(data, n, x, y, w, h, pw, ph, fb);
}
}
@@ -494,11 +494,11 @@ static void test_scaling_planes(data_t *data, int display_count, int w, int h, s
/* No need to scale an overlay that is bigger than the display */
if (pw <= w*scale[i] && ph <= h*scale[i])
break;
- test_plane(data, n, 0, 0, w, h, w*scale[i], h*scale[i], pw, ph, fb);
+ test_plane(data, n, 0, 0, w*scale[i], h*scale[i], pw, ph, fb);
}
/* Test Fullscreen scale*/
- test_plane(data, n, 0, 0, w, h, pw, ph, pw, ph, fb);
+ test_plane(data, n, 0, 0, pw, ph, pw, ph, fb);
}
return;
@@ -532,9 +532,9 @@ static void test_panning_2_display(data_t *data, int w, int h, struct fbc *fbc)
for (int j = 0; j < ARRAY_SIZE(y); j++){
for (int i = 0; i < it; i++){
if (toggle)
- test_plane(data, 0, pw-w, y[j], w, h, w, h, pw, ph, fbc);
+ test_plane(data, 0, pw-w, y[j], w, h, pw, ph, fbc);
else
- test_plane(data, 1, 0, y[j], w, h, w, h, pw2, ph2, fbc);
+ test_plane(data, 1, 0, y[j], w, h, pw2, ph2, fbc);
toggle = !toggle;
}
--
2.43.0
^ permalink raw reply related [flat|nested] 7+ messages in thread
* ✓ i915.CI.BAT: success for series starting with [1/2] tests/amdgpu: Fix typos and grammar in test files
2026-04-17 0:21 [PATCH 1/2] tests/amdgpu: Fix typos and grammar in test files Alex Hung
2026-04-17 0:21 ` [PATCH 2/2] tests/amdgpu/amd_plane: Remove unused parameters from test_plane() Alex Hung
@ 2026-04-17 2:51 ` Patchwork
2026-04-17 3:16 ` ✓ Xe.CI.BAT: " Patchwork
` (2 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2026-04-17 2:51 UTC (permalink / raw)
To: Alex Hung; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 3034 bytes --]
== Series Details ==
Series: series starting with [1/2] tests/amdgpu: Fix typos and grammar in test files
URL : https://patchwork.freedesktop.org/series/165030/
State : success
== Summary ==
CI Bug Log - changes from IGT_8863 -> IGTPW_15005
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15005/index.html
Participating hosts (42 -> 40)
------------------------------
Missing (2): bat-dg2-13 fi-snb-2520m
Known issues
------------
Here are the changes found in IGTPW_15005 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@dmabuf@all-tests:
- fi-skl-6600u: NOTRUN -> [SKIP][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15005/fi-skl-6600u/igt@dmabuf@all-tests.html
* igt@i915_selftest@live@workarounds:
- bat-arlh-3: [PASS][2] -> [DMESG-FAIL][3] ([i915#12061]) +1 other test dmesg-fail
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8863/bat-arlh-3/igt@i915_selftest@live@workarounds.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15005/bat-arlh-3/igt@i915_selftest@live@workarounds.html
#### Possible fixes ####
* igt@i915_selftest@live:
- fi-skl-6600u: [INCOMPLETE][4] ([i915#15859]) -> [PASS][5]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8863/fi-skl-6600u/igt@i915_selftest@live.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15005/fi-skl-6600u/igt@i915_selftest@live.html
* igt@i915_selftest@live@gtt:
- fi-skl-6600u: [INCOMPLETE][6] -> [PASS][7]
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8863/fi-skl-6600u/igt@i915_selftest@live@gtt.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15005/fi-skl-6600u/igt@i915_selftest@live@gtt.html
* igt@i915_selftest@live@workarounds:
- bat-arls-6: [DMESG-FAIL][8] ([i915#12061]) -> [PASS][9] +1 other test pass
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8863/bat-arls-6/igt@i915_selftest@live@workarounds.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15005/bat-arls-6/igt@i915_selftest@live@workarounds.html
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
[i915#15859]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15859
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_8863 -> IGTPW_15005
* Linux: CI_DRM_18347 -> CI_DRM_18348
CI-20190529: 20190529
CI_DRM_18347: 2a1c604bebed8cbbe6aea00f761777eed424dc55 @ git://anongit.freedesktop.org/gfx-ci/linux
CI_DRM_18348: 3b9ca4c40814c96c38986ae2ba6651e43757ca5f @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_15005: 7cb744bbf68f7b35ccaf15c11b0ad4517f6ce6e3 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8863: 5b279a8b71dc1672099205a1a9e8135c7c7fadb5 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15005/index.html
[-- Attachment #2: Type: text/html, Size: 3846 bytes --]
^ permalink raw reply [flat|nested] 7+ messages in thread
* ✓ Xe.CI.BAT: success for series starting with [1/2] tests/amdgpu: Fix typos and grammar in test files
2026-04-17 0:21 [PATCH 1/2] tests/amdgpu: Fix typos and grammar in test files Alex Hung
2026-04-17 0:21 ` [PATCH 2/2] tests/amdgpu/amd_plane: Remove unused parameters from test_plane() Alex Hung
2026-04-17 2:51 ` ✓ i915.CI.BAT: success for series starting with [1/2] tests/amdgpu: Fix typos and grammar in test files Patchwork
@ 2026-04-17 3:16 ` Patchwork
2026-04-17 3:25 ` [PATCH 1/2] " Karthik B S
2026-04-17 5:42 ` ✗ Xe.CI.FULL: failure for series starting with [1/2] " Patchwork
4 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2026-04-17 3:16 UTC (permalink / raw)
To: Alex Hung; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 1192 bytes --]
== Series Details ==
Series: series starting with [1/2] tests/amdgpu: Fix typos and grammar in test files
URL : https://patchwork.freedesktop.org/series/165030/
State : success
== Summary ==
CI Bug Log - changes from XEIGT_8863_BAT -> XEIGTPW_15005_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* IGT: IGT_8863 -> IGTPW_15005
* Linux: xe-4917-ff84b38d86b994ebb03d940be1c73a63e231f454 -> xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f
IGTPW_15005: 7cb744bbf68f7b35ccaf15c11b0ad4517f6ce6e3 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8863: 5b279a8b71dc1672099205a1a9e8135c7c7fadb5 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-4917-ff84b38d86b994ebb03d940be1c73a63e231f454: ff84b38d86b994ebb03d940be1c73a63e231f454
xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f: 3b9ca4c40814c96c38986ae2ba6651e43757ca5f
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/index.html
[-- Attachment #2: Type: text/html, Size: 1751 bytes --]
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] tests/amdgpu: Fix typos and grammar in test files
2026-04-17 0:21 [PATCH 1/2] tests/amdgpu: Fix typos and grammar in test files Alex Hung
` (2 preceding siblings ...)
2026-04-17 3:16 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-04-17 3:25 ` Karthik B S
2026-04-17 5:42 ` ✗ Xe.CI.FULL: failure for series starting with [1/2] " Patchwork
4 siblings, 0 replies; 7+ messages in thread
From: Karthik B S @ 2026-04-17 3:25 UTC (permalink / raw)
To: Alex Hung, igt-dev; +Cc: aurabindo.pillai
On 4/17/2026 5:51 AM, Alex Hung wrote:
> Fix various typos and grammar errors across multiple AMDGPU
> test files:
> - amd_abm: "amdpgu" -> "amdgpu", fix grammar in comment
> - amd_assr: add missing article, remove trailing spaces
> - amd_color: "amdpgu" -> "amdgpu", "liner" -> "linear",
> fix incorrect "degamma" comment in regamma function
> - amd_plane: "backgroud" -> "background",
> "overley" -> "overlay", "beacause" -> "because",
> fix wrong size notation and misleading comment
> - amd_vrr_range: "gange" -> "range" in function name
>
> Assisted-by: GitHub Copilot:Claude Opus 4.6
> Signed-off-by: Alex Hung <alex.hung@amd.com>
Reviewed-by: Karthik B S <karthik.b.s@intel.com>
> ---
> tests/amdgpu/amd_abm.c | 4 ++--
> tests/amdgpu/amd_assr.c | 6 +++---
> tests/amdgpu/amd_color.c | 6 +++---
> tests/amdgpu/amd_plane.c | 14 +++++++-------
> tests/amdgpu/amd_vrr_range.c | 4 ++--
> 5 files changed, 17 insertions(+), 17 deletions(-)
>
> diff --git a/tests/amdgpu/amd_abm.c b/tests/amdgpu/amd_abm.c
> index d36044aab..207d075b0 100644
> --- a/tests/amdgpu/amd_abm.c
> +++ b/tests/amdgpu/amd_abm.c
> @@ -128,7 +128,7 @@ static void test_init(data_t *data)
> if (!has_edp)
> igt_skip("No eDP connector found\n");
>
> - /* It doesn't matter which pipe we choose on amdpgu. */
> + /* It doesn't matter which pipe we choose on amdgpu. */
> data->crtc = igt_first_crtc(&data->display);
>
> igt_display_reset(display);
> @@ -169,7 +169,7 @@ static void test_fini(data_t *data)
> igt_display_t *display = &data->display;
> igt_output_t *output;
>
> - /* Disable ABM before exit test */
> + /* Disable ABM before exiting the test */
> for_each_valid_output_on_crtc(&data->display,
> data->crtc,
> output) {
> diff --git a/tests/amdgpu/amd_assr.c b/tests/amdgpu/amd_assr.c
> index b07f3fb15..71209e79f 100644
> --- a/tests/amdgpu/amd_assr.c
> +++ b/tests/amdgpu/amd_assr.c
> @@ -29,7 +29,7 @@
> #include <sys/stat.h>
>
> IGT_TEST_DESCRIPTION("Check if ASSR is enabled on eDP links that support "
> - "the display authentication by changing scrambling sequence. "
> + "the display authentication by changing the scrambling sequence. "
> "The test also covers embedded and non-removable "
> "displays that appear as DP.");
>
> @@ -285,10 +285,10 @@ int igt_main()
> igt_describe("Test ASSR on connected DP/eDP links");
> igt_subtest("assr-links")
> test_assr_links(&data, TEST_NONE);
> - igt_describe("Test ASSR with DPMS ");
> + igt_describe("Test ASSR with DPMS");
> igt_subtest("assr-links-dpms")
> test_assr_links(&data, TEST_DPMS);
> - igt_describe("Test ASSR with suspend ");
> + igt_describe("Test ASSR with suspend");
> igt_subtest("assr-links-suspend")
> test_assr_links(&data, TEST_SUSPEND);
>
> diff --git a/tests/amdgpu/amd_color.c b/tests/amdgpu/amd_color.c
> index 68f541d64..eb1eb581a 100644
> --- a/tests/amdgpu/amd_color.c
> +++ b/tests/amdgpu/amd_color.c
> @@ -177,7 +177,7 @@ static void test_init(data_t *data)
> {
> igt_display_t *display = &data->display;
>
> - /* It doesn't matter which pipe we choose on amdpgu. */
> + /* It doesn't matter which pipe we choose on amdgpu. */
> data->crtc = igt_first_crtc(&data->display);
>
> igt_display_reset(display);
> @@ -262,7 +262,7 @@ static void test_crtc_linear_degamma(data_t *data)
> * sRGB regamma matrix with incorrect calculations or rounding errors.
> * If we put the pipe into bypass or use the hardware defined sRGB regamma
> * on the plane then we can and should get the correct CRTC when passing a
> - * liner regamma matrix to DRM.
> + * linear regamma matrix to DRM.
> */
> static void test_crtc_linear_regamma(data_t *data)
> {
> @@ -291,7 +291,7 @@ static void test_crtc_linear_regamma(data_t *data)
>
> igt_pipe_crc_collect_crc(data->pipe_crc, &ref_crc);
>
> - /* Apply a linear degamma. The result should remain the same. */
> + /* Apply a linear regamma. The result should remain the same. */
> set_regamma_lut(data, &lut_linear);
> igt_display_commit_atomic(display, 0, NULL);
>
> diff --git a/tests/amdgpu/amd_plane.c b/tests/amdgpu/amd_plane.c
> index 412a220b2..e63d4dc2f 100644
> --- a/tests/amdgpu/amd_plane.c
> +++ b/tests/amdgpu/amd_plane.c
> @@ -366,14 +366,14 @@ static void test_multi_overlay(data_t *data, int display_count, int w, int h, st
> }
>
> /*
> - * Compares the result of white backgroud with white window with and without MPO
> + * Compares the result of white background with white window with and without MPO
> *
> * Reference crc:
> * Draws a White background of size (pw,ph).
> *
> * Test crc:
> - * Draws a White Overlay of size (pw,ph) then creates a cutout of size (p,w) at location (x,y)
> - * Draws a White Primary plane of size (p,w) at location (x,y) (under the overlay)
> + * Draws a White Overlay of size (pw,ph) then creates a cutout of size (dw,dh) at location (x,y)
> + * Draws a White Primary plane of size (dw,dh) at location (x,y) (under the overlay)
> *
> * NOTE: The reason for using White+White is to speed up the crc (reuse the ref crc for all cases vs taking
> * a ref crc per flip)
> @@ -400,7 +400,7 @@ static void test_plane(data_t *data, int n, int x, int y, double w, double h, do
> igt_plane_set_fb(data->primary[n], &fbc[n].test_primary);
> igt_plane_set_fb(data->overlay[n], &fbc[n].test_overlay);
>
> - /* Move the overlay to cover the cutout */
> + /* Move the primary to cover the cutout */
> igt_plane_set_position(data->primary[n], x, y);
> igt_plane_set_size(data->primary[n], dw, dh);
>
> @@ -451,7 +451,7 @@ static void test_panning_1_display(data_t *data, int display_count, int w, int h
> int x = dx*j*dir[i][0];
> int y = dy*j*dir[i][1];
>
> - /* No need to pan a overley that is bigger than the display */
> + /* No need to pan an overlay that is bigger than the display */
> if (pw <= w && ph <= h)
> break;
>
> @@ -491,7 +491,7 @@ static void test_scaling_planes(data_t *data, int display_count, int w, int h, s
> int ph = data->h[n];
>
> for (int i=0;i<ARRAY_SIZE(scale);i++) {
> - /* No need to scale a overley that is bigger than the display */
> + /* No need to scale an overlay that is bigger than the display */
> if (pw <= w*scale[i] && ph <= h*scale[i])
> break;
> test_plane(data, n, 0, 0, w, h, w*scale[i], h*scale[i], pw, ph, fb);
> @@ -523,7 +523,7 @@ static void test_panning_2_display(data_t *data, int w, int h, struct fbc *fbc)
> int it = 3; /* # of times to swap */
>
> /* Set y to 0 if window is bigger than one of the displays
> - * beacause y will be negative in that case
> + * because y will be negative in that case
> */
> if (h >= smallest_h)
> y[0] = y[1] = y[2] = 0;
> diff --git a/tests/amdgpu/amd_vrr_range.c b/tests/amdgpu/amd_vrr_range.c
> index 4397f3c15..0312e22c2 100644
> --- a/tests/amdgpu/amd_vrr_range.c
> +++ b/tests/amdgpu/amd_vrr_range.c
> @@ -260,7 +260,7 @@ static bool has_vrr(igt_output_t *output)
> igt_output_get_prop(output, IGT_CONNECTOR_VRR_CAPABLE);
> }
>
> -static void parse_vrr_gange_from_edid(data_t *data, uint8_t *edid, int index)
> +static void parse_vrr_range_from_edid(data_t *data, uint8_t *edid, int index)
> {
> bool max_rate_offset = false;
> bool min_rate_offset = false;
> @@ -314,7 +314,7 @@ static bool find_vrr_range_from_edid(data_t *data, igt_output_t *output)
> break;
> else if (i == range_head_size-1) {
> /* Found Display Range Limits Descriptor block */
> - parse_vrr_gange_from_edid(data, sink_edid, index);
> + parse_vrr_range_from_edid(data, sink_edid, index);
> return true;
> }
> }
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] tests/amdgpu/amd_plane: Remove unused parameters from test_plane()
2026-04-17 0:21 ` [PATCH 2/2] tests/amdgpu/amd_plane: Remove unused parameters from test_plane() Alex Hung
@ 2026-04-17 3:26 ` Karthik B S
0 siblings, 0 replies; 7+ messages in thread
From: Karthik B S @ 2026-04-17 3:26 UTC (permalink / raw)
To: Alex Hung, igt-dev; +Cc: aurabindo.pillai
On 4/17/2026 5:51 AM, Alex Hung wrote:
> Remove unused w and h parameters from test_plane() in
> amd_plane. These parameters were never referenced inside
> the function body; only dw and dh are used for the cutout
> and primary plane sizing. Update all call sites accordingly.
>
> Assisted-by: GitHub Copilot:Claude Opus 4.6
> Signed-off-by: Alex Hung <alex.hung@amd.com>
Reviewed-by: Karthik B S <karthik.b.s@intel.com>
> ---
> tests/amdgpu/amd_plane.c | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/tests/amdgpu/amd_plane.c b/tests/amdgpu/amd_plane.c
> index e63d4dc2f..9a08f8e29 100644
> --- a/tests/amdgpu/amd_plane.c
> +++ b/tests/amdgpu/amd_plane.c
> @@ -378,7 +378,7 @@ static void test_multi_overlay(data_t *data, int display_count, int w, int h, st
> * NOTE: The reason for using White+White is to speed up the crc (reuse the ref crc for all cases vs taking
> * a ref crc per flip)
> */
> -static void test_plane(data_t *data, int n, int x, int y, double w, double h, double dw, double dh, int pw, int ph, struct fbc *fbc){
> +static void test_plane(data_t *data, int n, int x, int y, double dw, double dh, int pw, int ph, struct fbc *fbc){
>
> igt_crc_t test_crc;
> igt_display_t *display = &data->display;
> @@ -455,7 +455,7 @@ static void test_panning_1_display(data_t *data, int display_count, int w, int h
> if (pw <= w && ph <= h)
> break;
>
> - test_plane(data, n, x, y, w, h, w, h, pw, ph, fb);
> + test_plane(data, n, x, y, w, h, pw, ph, fb);
>
> }
> }
> @@ -494,11 +494,11 @@ static void test_scaling_planes(data_t *data, int display_count, int w, int h, s
> /* No need to scale an overlay that is bigger than the display */
> if (pw <= w*scale[i] && ph <= h*scale[i])
> break;
> - test_plane(data, n, 0, 0, w, h, w*scale[i], h*scale[i], pw, ph, fb);
> + test_plane(data, n, 0, 0, w*scale[i], h*scale[i], pw, ph, fb);
> }
>
> /* Test Fullscreen scale*/
> - test_plane(data, n, 0, 0, w, h, pw, ph, pw, ph, fb);
> + test_plane(data, n, 0, 0, pw, ph, pw, ph, fb);
> }
>
> return;
> @@ -532,9 +532,9 @@ static void test_panning_2_display(data_t *data, int w, int h, struct fbc *fbc)
> for (int j = 0; j < ARRAY_SIZE(y); j++){
> for (int i = 0; i < it; i++){
> if (toggle)
> - test_plane(data, 0, pw-w, y[j], w, h, w, h, pw, ph, fbc);
> + test_plane(data, 0, pw-w, y[j], w, h, pw, ph, fbc);
> else
> - test_plane(data, 1, 0, y[j], w, h, w, h, pw2, ph2, fbc);
> + test_plane(data, 1, 0, y[j], w, h, pw2, ph2, fbc);
>
> toggle = !toggle;
> }
^ permalink raw reply [flat|nested] 7+ messages in thread
* ✗ Xe.CI.FULL: failure for series starting with [1/2] tests/amdgpu: Fix typos and grammar in test files
2026-04-17 0:21 [PATCH 1/2] tests/amdgpu: Fix typos and grammar in test files Alex Hung
` (3 preceding siblings ...)
2026-04-17 3:25 ` [PATCH 1/2] " Karthik B S
@ 2026-04-17 5:42 ` Patchwork
4 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2026-04-17 5:42 UTC (permalink / raw)
To: Alex Hung; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 15932 bytes --]
== Series Details ==
Series: series starting with [1/2] tests/amdgpu: Fix typos and grammar in test files
URL : https://patchwork.freedesktop.org/series/165030/
State : failure
== Summary ==
CI Bug Log - changes from XEIGT_8863_FULL -> XEIGTPW_15005_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with XEIGTPW_15005_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in XEIGTPW_15005_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in XEIGTPW_15005_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible@ad-dp2-hdmi-a3:
- shard-bmg: [PASS][1] -> [FAIL][2] +2 other tests fail
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8863/shard-bmg-10/igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible@ad-dp2-hdmi-a3.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-bmg-3/igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible@ad-dp2-hdmi-a3.html
#### Warnings ####
* igt@kms_content_protection@legacy-hdcp14:
- shard-bmg: [FAIL][3] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) -> [TIMEOUT][4] +1 other test timeout
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8863/shard-bmg-4/igt@kms_content_protection@legacy-hdcp14.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-bmg-3/igt@kms_content_protection@legacy-hdcp14.html
New tests
---------
New tests have been introduced between XEIGT_8863_FULL and XEIGTPW_15005_FULL:
### New IGT tests (2) ###
* igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-3-xrgb16161616f:
- Statuses : 1 pass(s)
- Exec time: [0.00] s
* igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-3-xrgb2101010:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in XEIGTPW_15005_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@x-tiled-16bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][5] ([Intel XE#2327])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-bmg-9/igt@kms_big_fb@x-tiled-16bpp-rotate-90.html
* igt@kms_ccs@bad-aux-stride-yf-tiled-ccs:
- shard-bmg: NOTRUN -> [SKIP][6] ([Intel XE#2887])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-bmg-1/igt@kms_ccs@bad-aux-stride-yf-tiled-ccs.html
* igt@kms_content_protection@dp-mst-lic-type-0-hdcp14:
- shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#6974])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-bmg-8/igt@kms_content_protection@dp-mst-lic-type-0-hdcp14.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic:
- shard-bmg: [PASS][8] -> [FAIL][9] ([Intel XE#7571])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8863/shard-bmg-2/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-bmg-1/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
* igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible:
- shard-bmg: [PASS][10] -> [FAIL][11] ([Intel XE#3149]) +1 other test fail
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8863/shard-bmg-10/igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible.html
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-bmg-3/igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling:
- shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#7178] / [Intel XE#7351])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-bmg-10/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render:
- shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#2311]) +3 other tests skip
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [PASS][14] -> [SKIP][15] ([Intel XE#1503])
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8863/shard-bmg-3/igt@kms_hdr@invalid-hdr.html
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-bmg-2/igt@kms_hdr@invalid-hdr.html
* igt@kms_pm_dc@dc5-dpms:
- shard-lnl: [PASS][16] -> [FAIL][17] ([Intel XE#7340] / [Intel XE#7504])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8863/shard-lnl-4/igt@kms_pm_dc@dc5-dpms.html
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-lnl-8/igt@kms_pm_dc@dc5-dpms.html
* igt@kms_psr@fbc-psr2-primary-blt:
- shard-bmg: NOTRUN -> [SKIP][18] ([Intel XE#2234] / [Intel XE#2850])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-bmg-9/igt@kms_psr@fbc-psr2-primary-blt.html
* igt@kms_setmode@basic@pipe-b-edp-1:
- shard-lnl: [PASS][19] -> [FAIL][20] ([Intel XE#6361]) +2 other tests fail
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8863/shard-lnl-8/igt@kms_setmode@basic@pipe-b-edp-1.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-lnl-8/igt@kms_setmode@basic@pipe-b-edp-1.html
* igt@kms_vrr@flip-dpms:
- shard-bmg: NOTRUN -> [SKIP][21] ([Intel XE#1499])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-bmg-2/igt@kms_vrr@flip-dpms.html
* igt@xe_exec_multi_queue@two-queues-preempt-mode-dyn-priority:
- shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#6874])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-bmg-9/igt@xe_exec_multi_queue@two-queues-preempt-mode-dyn-priority.html
* igt@xe_sriov_vfio@open-basic:
- shard-bmg: [PASS][23] -> [FAIL][24] ([Intel XE#5937])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8863/shard-bmg-5/igt@xe_sriov_vfio@open-basic.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-bmg-4/igt@xe_sriov_vfio@open-basic.html
#### Possible fixes ####
* igt@intel_hwmon@hwmon-write:
- shard-bmg: [FAIL][25] ([Intel XE#7445]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8863/shard-bmg-10/igt@intel_hwmon@hwmon-write.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-bmg-8/igt@intel_hwmon@hwmon-write.html
* igt@kms_flip@2x-absolute-wf_vblank-interruptible@bc-dp2-hdmi-a3:
- shard-bmg: [FAIL][27] -> [PASS][28] +3 other tests pass
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8863/shard-bmg-3/igt@kms_flip@2x-absolute-wf_vblank-interruptible@bc-dp2-hdmi-a3.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-bmg-5/igt@kms_flip@2x-absolute-wf_vblank-interruptible@bc-dp2-hdmi-a3.html
* igt@kms_flip@2x-flip-vs-expired-vblank@ac-dp2-hdmi-a3:
- shard-bmg: [FAIL][29] ([Intel XE#3321]) -> [PASS][30] +1 other test pass
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8863/shard-bmg-10/igt@kms_flip@2x-flip-vs-expired-vblank@ac-dp2-hdmi-a3.html
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-bmg-9/igt@kms_flip@2x-flip-vs-expired-vblank@ac-dp2-hdmi-a3.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-lnl: [FAIL][31] ([Intel XE#301]) -> [PASS][32] +3 other tests pass
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8863/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_universal_plane@disable-primary-vs-flip:
- shard-bmg: [DMESG-WARN][33] ([Intel XE#7725]) -> [PASS][34] +1 other test pass
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8863/shard-bmg-3/igt@kms_universal_plane@disable-primary-vs-flip.html
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-bmg-2/igt@kms_universal_plane@disable-primary-vs-flip.html
* igt@kms_vrr@flipline:
- shard-lnl: [FAIL][35] ([Intel XE#4227] / [Intel XE#7397]) -> [PASS][36] +1 other test pass
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8863/shard-lnl-2/igt@kms_vrr@flipline.html
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-lnl-8/igt@kms_vrr@flipline.html
* igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1:
- shard-lnl: [FAIL][37] ([Intel XE#2142]) -> [PASS][38] +1 other test pass
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8863/shard-lnl-5/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-lnl-5/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
* igt@xe_evict@evict-mixed-many-threads-small:
- shard-bmg: [INCOMPLETE][39] ([Intel XE#6321]) -> [PASS][40]
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8863/shard-bmg-4/igt@xe_evict@evict-mixed-many-threads-small.html
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-bmg-1/igt@xe_evict@evict-mixed-many-threads-small.html
* igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma:
- shard-lnl: [FAIL][41] ([Intel XE#5625]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8863/shard-lnl-8/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma.html
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-lnl-7/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma.html
* igt@xe_sriov_flr@flr-each-isolation:
- shard-bmg: [FAIL][43] ([Intel XE#6569]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8863/shard-bmg-7/igt@xe_sriov_flr@flr-each-isolation.html
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-bmg-10/igt@xe_sriov_flr@flr-each-isolation.html
#### Warnings ####
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-blt:
- shard-bmg: [SKIP][45] ([Intel XE#2312]) -> [SKIP][46] ([Intel XE#2311])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8863/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-blt.html
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-bmg-10/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-blt.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
- shard-bmg: [SKIP][47] ([Intel XE#3904] / [Intel XE#7342]) -> [SKIP][48] ([Intel XE#3414] / [Intel XE#3904] / [Intel XE#7342])
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8863/shard-bmg-10/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-bmg-3/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: [FAIL][49] ([Intel XE#1729] / [Intel XE#7424]) -> [SKIP][50] ([Intel XE#2426] / [Intel XE#5848])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8863/shard-bmg-4/igt@kms_tiled_display@basic-test-pattern.html
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-bmg-3/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][51] ([Intel XE#2509] / [Intel XE#7437]) -> [SKIP][52] ([Intel XE#2426] / [Intel XE#5848])
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8863/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/shard-bmg-8/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#2142]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2142
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
[Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4227
[Intel XE#5625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5625
[Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
[Intel XE#5937]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5937
[Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
[Intel XE#6361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6361
[Intel XE#6569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6569
[Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
[Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
[Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
[Intel XE#7340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7340
[Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
[Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
[Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
[Intel XE#7397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7397
[Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
[Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
[Intel XE#7445]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7445
[Intel XE#7504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7504
[Intel XE#7571]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7571
[Intel XE#7725]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7725
Build changes
-------------
* IGT: IGT_8863 -> IGTPW_15005
* Linux: xe-4917-ff84b38d86b994ebb03d940be1c73a63e231f454 -> xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f
IGTPW_15005: 7cb744bbf68f7b35ccaf15c11b0ad4517f6ce6e3 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8863: 5b279a8b71dc1672099205a1a9e8135c7c7fadb5 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-4917-ff84b38d86b994ebb03d940be1c73a63e231f454: ff84b38d86b994ebb03d940be1c73a63e231f454
xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f: 3b9ca4c40814c96c38986ae2ba6651e43757ca5f
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15005/index.html
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2026-04-17 0:21 [PATCH 1/2] tests/amdgpu: Fix typos and grammar in test files Alex Hung
2026-04-17 0:21 ` [PATCH 2/2] tests/amdgpu/amd_plane: Remove unused parameters from test_plane() Alex Hung
2026-04-17 3:26 ` Karthik B S
2026-04-17 2:51 ` ✓ i915.CI.BAT: success for series starting with [1/2] tests/amdgpu: Fix typos and grammar in test files Patchwork
2026-04-17 3:16 ` ✓ Xe.CI.BAT: " Patchwork
2026-04-17 3:25 ` [PATCH 1/2] " Karthik B S
2026-04-17 5:42 ` ✗ Xe.CI.FULL: failure for series starting with [1/2] " Patchwork
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