Re: [PATCH i-g-t v5 04/17] tests/kms_async_flips: limit S/R to first and last CRTC

[Jani Nikula <jani.nikula@intel.com>]

On Thu, 10 Sep 2026, Michał Grzelak <michal.grzelak@intel.com> wrote:
> In order to increase tests performance limit suspend-resume's execution
> to only first and last CRTC.
>
> v3->v4
> - use crtc instead of display->crtcs (Mohammed)
> - use proper logic operator (Mohammed)
>
> v2->v3
> - add missing S-O-B
>
> Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
> ---
>  tests/kms_async_flips.c | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/tests/kms_async_flips.c b/tests/kms_async_flips.c
> index 8884efd8ba..f373dfcd95 100644
> --- a/tests/kms_async_flips.c
> +++ b/tests/kms_async_flips.c
> @@ -873,6 +873,7 @@ static void run_test(data_t *data, void (*test)(data_t *))
>  {
>  	igt_crtc_t *crtc;
>  	igt_display_t *display = &data->display;
> +	int idx;
>  
>  	if (data->atomic_path)
>  		require_atomic_async_cap(data);
> @@ -885,6 +886,10 @@ static void run_test(data_t *data, void (*test)(data_t *))
>  			data->crtc = crtc;
>  			igt_display_reset(display);
>  
> +			idx = crtc->crtc_index;
> +			if (data->suspend_resume && idx != 0 && idx != display->n_crtcs - 1)

This probably doesn't do what you think it does. Or, more precisely, it
only does it by coincidence.

For Intel, the loop's going to be in pipe order, not CRTC index
order. Any of the pipes could have the first and the last CRTC index. As
the only reordering currently happening is ABCD -> ACBD, you'll have
first and last being the same thing.

In the future, this could and likely will change. This will still only
test the first and last *CRTC*, but that will have no bearing on which
pipes are being tested.


BR,
Jani.

> +				continue;
> +
>  			igt_output_set_crtc(data->output,
>  					    crtc);
>  			if (!intel_pipe_output_combo_valid(display))

-- 
Jani Nikula, Intel