* [PATCH v2] tests/intel/xe_vm: Always have at least 2 pages bound in hammer sections
@ 2024-04-10 1:21 Matthew Brost
2024-04-10 1:59 ` ✓ CI.xeBAT: success for tests/intel/xe_vm: Always have at least 2 pages bound in hammer sections (rev2) Patchwork
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Matthew Brost @ 2024-04-10 1:21 UTC (permalink / raw)
To: igt-dev; +Cc: Matthew Brost
If the prefetch buffer is 2k or larger the hammer sections will prefetch
the next page, if the page is unbound a fault will occur. Account for
larger prefetchs by always having at least 2 pages bound for the hammer
thread.
v2:
- Missed table entry
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
tests/intel/xe_vm.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/tests/intel/xe_vm.c b/tests/intel/xe_vm.c
index bd4973cc38..9f9f61b7ef 100644
--- a/tests/intel/xe_vm.c
+++ b/tests/intel/xe_vm.c
@@ -1843,12 +1843,12 @@ igt_main
{ "all", 4, 2, 0, 4, 0 },
{ "one-partial", 4, 1, 1, 2, 0 },
{ "either-side-partial", 4, 2, 1, 2, 0 },
- { "either-side-partial-hammer", 4, 2, 1, 2,
+ { "either-side-partial-hammer", 6, 2, 2, 2,
MAP_FLAG_HAMMER_FIRST_PAGE },
- { "either-side-partial-split-page-hammer", 4, 2, 1, 2,
+ { "either-side-partial-split-page-hammer", 6, 2, 2, 2,
MAP_FLAG_HAMMER_FIRST_PAGE |
MAP_FLAG_LARGE_PAGE },
- { "either-side-partial-large-page-hammer", 4, 2, 1, 2,
+ { "either-side-partial-large-page-hammer", 6, 2, 2, 2,
MAP_FLAG_HAMMER_FIRST_PAGE |
MAP_FLAG_LARGE_PAGE |
MAP_FLAG_LARGE_PAGE_NO_SPLIT },
@@ -1857,7 +1857,7 @@ igt_main
{ "front", 4, 2, 1, 3, 0 },
{ "many-all", 4 * 8, 2 * 8, 0 * 8, 4 * 8, 0 },
{ "many-either-side-partial", 4 * 8, 2 * 8, 1, 4 * 8 - 2, 0 },
- { "many-either-side-partial-hammer", 4 * 8, 2 * 8, 1, 4 * 8 - 2,
+ { "many-either-side-partial-hammer", 4 * 8, 2 * 8, 2, 4 * 8 - 4,
MAP_FLAG_HAMMER_FIRST_PAGE },
{ "many-either-side-full", 4 * 8, 4 * 8, 1 * 8, 2 * 8, 0 },
{ "many-end", 4 * 8, 4, 0 * 8, 3 * 8 + 2, 0 },
@@ -1902,12 +1902,12 @@ igt_main
{ "one-partial", 4, 1, 1, 2, 0 },
{ "either-side-partial", 4, 2, 1, 2, 0 },
{ "either-side-full", 4, 4, 1, 2, 0 },
- { "either-side-partial-hammer", 4, 2, 1, 2,
+ { "either-side-partial-hammer", 6, 2, 2, 2,
MAP_FLAG_HAMMER_FIRST_PAGE },
- { "either-side-partial-split-page-hammer", 4, 2, 1, 2,
+ { "either-side-partial-split-page-hammer", 6, 2, 2, 2,
MAP_FLAG_HAMMER_FIRST_PAGE |
MAP_FLAG_LARGE_PAGE },
- { "either-side-partial-large-page-hammer", 4, 2, 1, 2,
+ { "either-side-partial-large-page-hammer", 6, 2, 2, 2,
MAP_FLAG_HAMMER_FIRST_PAGE |
MAP_FLAG_LARGE_PAGE |
MAP_FLAG_LARGE_PAGE_NO_SPLIT },
@@ -1915,7 +1915,7 @@ igt_main
{ "front", 4, 2, 1, 3, 0 },
{ "many-all", 4 * 8, 2 * 8, 0 * 8, 4 * 8, 0 },
{ "many-either-side-partial", 4 * 8, 2 * 8, 1, 4 * 8 - 2, 0 },
- { "many-either-side-partial-hammer", 4 * 8, 2 * 8, 1, 4 * 8 - 2,
+ { "many-either-side-partial-hammer", 4 * 8, 2 * 8, 2, 4 * 8 - 4,
MAP_FLAG_HAMMER_FIRST_PAGE },
{ "userptr-all", 4, 2, 0, 4, MAP_FLAG_USERPTR },
{ "userptr-one-partial", 4, 1, 1, 2, MAP_FLAG_USERPTR },
--
2.34.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* ✓ CI.xeBAT: success for tests/intel/xe_vm: Always have at least 2 pages bound in hammer sections (rev2) 2024-04-10 1:21 [PATCH v2] tests/intel/xe_vm: Always have at least 2 pages bound in hammer sections Matthew Brost @ 2024-04-10 1:59 ` Patchwork 2024-04-10 2:25 ` ✗ Fi.CI.BAT: failure " Patchwork 2024-04-10 8:42 ` [PATCH v2] tests/intel/xe_vm: Always have at least 2 pages bound in hammer sections Matthew Auld 2 siblings, 0 replies; 5+ messages in thread From: Patchwork @ 2024-04-10 1:59 UTC (permalink / raw) To: Matthew Brost; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 1107 bytes --] == Series Details == Series: tests/intel/xe_vm: Always have at least 2 pages bound in hammer sections (rev2) URL : https://patchwork.freedesktop.org/series/132238/ State : success == Summary == CI Bug Log - changes from XEIGT_7803_BAT -> XEIGTPW_10995_BAT ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (5 -> 3) ------------------------------ Missing (2): bat-lnl-1 bat-adlp-7 Changes ------- No changes found Build changes ------------- * IGT: IGT_7803 -> IGTPW_10995 * Linux: xe-1063-7be27f645de2f00384b862d2812a90675e8392fa -> xe-1064-057ec21a54cddd595a7725fa8731eb4c5bd5abff IGTPW_10995: 10995 IGT_7803: 9669a17ae56f1dcd22ba4c5cb39b3cd334a46862 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git xe-1063-7be27f645de2f00384b862d2812a90675e8392fa: 7be27f645de2f00384b862d2812a90675e8392fa xe-1064-057ec21a54cddd595a7725fa8731eb4c5bd5abff: 057ec21a54cddd595a7725fa8731eb4c5bd5abff == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10995/index.html [-- Attachment #2: Type: text/html, Size: 1666 bytes --] ^ permalink raw reply [flat|nested] 5+ messages in thread
* ✗ Fi.CI.BAT: failure for tests/intel/xe_vm: Always have at least 2 pages bound in hammer sections (rev2) 2024-04-10 1:21 [PATCH v2] tests/intel/xe_vm: Always have at least 2 pages bound in hammer sections Matthew Brost 2024-04-10 1:59 ` ✓ CI.xeBAT: success for tests/intel/xe_vm: Always have at least 2 pages bound in hammer sections (rev2) Patchwork @ 2024-04-10 2:25 ` Patchwork 2024-04-10 8:42 ` [PATCH v2] tests/intel/xe_vm: Always have at least 2 pages bound in hammer sections Matthew Auld 2 siblings, 0 replies; 5+ messages in thread From: Patchwork @ 2024-04-10 2:25 UTC (permalink / raw) To: Matthew Brost; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 7491 bytes --] == Series Details == Series: tests/intel/xe_vm: Always have at least 2 pages bound in hammer sections (rev2) URL : https://patchwork.freedesktop.org/series/132238/ State : failure == Summary == CI Bug Log - changes from CI_DRM_14552 -> IGTPW_10995 ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with IGTPW_10995 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in IGTPW_10995, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10995/index.html Participating hosts (37 -> 36) ------------------------------ Additional (3): bat-kbl-2 fi-rkl-11600 fi-cfl-8109u Missing (4): fi-kbl-7567u fi-glk-j4005 fi-apl-guc fi-kbl-8809g Possible new issues ------------------- Here are the unknown changes that may have been introduced in IGTPW_10995: ### IGT changes ### #### Possible regressions #### * igt@i915_module_load@reload: - bat-dg2-14: [PASS][1] -> [ABORT][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14552/bat-dg2-14/igt@i915_module_load@reload.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10995/bat-dg2-14/igt@i915_module_load@reload.html Known issues ------------ Here are the changes found in IGTPW_10995 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@debugfs_test@basic-hwmon: - fi-rkl-11600: NOTRUN -> [SKIP][3] ([i915#9318]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10995/fi-rkl-11600/igt@debugfs_test@basic-hwmon.html * igt@fbdev@info: - bat-kbl-2: NOTRUN -> [SKIP][4] ([i915#1849]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10995/bat-kbl-2/igt@fbdev@info.html * igt@gem_huc_copy@huc-copy: - fi-cfl-8109u: NOTRUN -> [SKIP][5] ([i915#2190]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10995/fi-cfl-8109u/igt@gem_huc_copy@huc-copy.html - fi-rkl-11600: NOTRUN -> [SKIP][6] ([i915#2190]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10995/fi-rkl-11600/igt@gem_huc_copy@huc-copy.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-kbl-2: NOTRUN -> [SKIP][7] +39 other tests skip [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10995/bat-kbl-2/igt@gem_lmem_swapping@parallel-random-engines.html - fi-rkl-11600: NOTRUN -> [SKIP][8] ([i915#4613]) +3 other tests skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10995/fi-rkl-11600/igt@gem_lmem_swapping@parallel-random-engines.html * igt@gem_lmem_swapping@verify-random: - fi-cfl-8109u: NOTRUN -> [SKIP][9] ([i915#4613]) +3 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10995/fi-cfl-8109u/igt@gem_lmem_swapping@verify-random.html * igt@gem_tiled_pread_basic: - fi-rkl-11600: NOTRUN -> [SKIP][10] ([i915#3282]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10995/fi-rkl-11600/igt@gem_tiled_pread_basic.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - fi-rkl-11600: NOTRUN -> [SKIP][11] ([i915#4103]) +1 other test skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10995/fi-rkl-11600/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html * igt@kms_dsc@dsc-basic: - fi-rkl-11600: NOTRUN -> [SKIP][12] ([i915#3555] / [i915#3840]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10995/fi-rkl-11600/igt@kms_dsc@dsc-basic.html * igt@kms_force_connector_basic@force-load-detect: - fi-rkl-11600: NOTRUN -> [SKIP][13] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10995/fi-rkl-11600/igt@kms_force_connector_basic@force-load-detect.html * igt@kms_pm_backlight@basic-brightness: - fi-rkl-11600: NOTRUN -> [SKIP][14] ([i915#5354]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10995/fi-rkl-11600/igt@kms_pm_backlight@basic-brightness.html - fi-cfl-8109u: NOTRUN -> [SKIP][15] +11 other tests skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10995/fi-cfl-8109u/igt@kms_pm_backlight@basic-brightness.html * igt@kms_psr@psr-sprite-plane-onoff: - fi-rkl-11600: NOTRUN -> [SKIP][16] ([i915#1072] / [i915#9732]) +3 other tests skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10995/fi-rkl-11600/igt@kms_psr@psr-sprite-plane-onoff.html * igt@kms_setmode@basic-clone-single-crtc: - fi-rkl-11600: NOTRUN -> [SKIP][17] ([i915#3555]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10995/fi-rkl-11600/igt@kms_setmode@basic-clone-single-crtc.html * igt@prime_vgem@basic-read: - fi-rkl-11600: NOTRUN -> [SKIP][18] ([i915#3291] / [i915#3708]) +2 other tests skip [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10995/fi-rkl-11600/igt@prime_vgem@basic-read.html #### Possible fixes #### * igt@gem_lmem_swapping@basic@lmem0: - bat-dg2-11: [FAIL][19] ([i915#10378]) -> [PASS][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14552/bat-dg2-11/igt@gem_lmem_swapping@basic@lmem0.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10995/bat-dg2-11/igt@gem_lmem_swapping@basic@lmem0.html - bat-dg2-9: [FAIL][21] ([i915#10378]) -> [PASS][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14552/bat-dg2-9/igt@gem_lmem_swapping@basic@lmem0.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10995/bat-dg2-9/igt@gem_lmem_swapping@basic@lmem0.html * igt@i915_selftest@live@gt_contexts: - bat-dg2-8: [ABORT][23] ([i915#10366]) -> [PASS][24] [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14552/bat-dg2-8/igt@i915_selftest@live@gt_contexts.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10995/bat-dg2-8/igt@i915_selftest@live@gt_contexts.html [i915#10366]: https://gitlab.freedesktop.org/drm/intel/issues/10366 [i915#10378]: https://gitlab.freedesktop.org/drm/intel/issues/10378 [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072 [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849 [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190 [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282 [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291 [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555 [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708 [i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840 [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103 [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354 [i915#9318]: https://gitlab.freedesktop.org/drm/intel/issues/9318 [i915#9732]: https://gitlab.freedesktop.org/drm/intel/issues/9732 Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_7803 -> IGTPW_10995 CI-20190529: 20190529 CI_DRM_14552: 057ec21a54cddd595a7725fa8731eb4c5bd5abff @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_10995: 10995 IGT_7803: 9669a17ae56f1dcd22ba4c5cb39b3cd334a46862 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10995/index.html [-- Attachment #2: Type: text/html, Size: 8791 bytes --] ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2] tests/intel/xe_vm: Always have at least 2 pages bound in hammer sections 2024-04-10 1:21 [PATCH v2] tests/intel/xe_vm: Always have at least 2 pages bound in hammer sections Matthew Brost 2024-04-10 1:59 ` ✓ CI.xeBAT: success for tests/intel/xe_vm: Always have at least 2 pages bound in hammer sections (rev2) Patchwork 2024-04-10 2:25 ` ✗ Fi.CI.BAT: failure " Patchwork @ 2024-04-10 8:42 ` Matthew Auld 2024-04-12 1:58 ` Matthew Brost 2 siblings, 1 reply; 5+ messages in thread From: Matthew Auld @ 2024-04-10 8:42 UTC (permalink / raw) To: Matthew Brost, igt-dev On 10/04/2024 02:21, Matthew Brost wrote: > If the prefetch buffer is 2k or larger the hammer sections will prefetch > the next page, if the page is unbound a fault will occur. Account for > larger prefetchs by always having at least 2 pages bound for the hammer > thread. Is this referring to bb_start pre-fetch? It should be + 4K at most for xe2. Is it possible to make the test consider xe_cs_prefetch_size() somehow instead of hardcoding? Or perhaps that is tricky here? Otherwise maybe we can add an assert that xe_cs_prefetch_size() remains <= 4K for this test, with comment explaining what needs to change if we start triggering the assert? Thinking is that would be easier to debug and fix than seeing CAT errors, faults etc. if the pre-fetch changes again. > > v2: > - Missed table entry > > Signed-off-by: Matthew Brost <matthew.brost@intel.com> > --- > tests/intel/xe_vm.c | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) > > diff --git a/tests/intel/xe_vm.c b/tests/intel/xe_vm.c > index bd4973cc38..9f9f61b7ef 100644 > --- a/tests/intel/xe_vm.c > +++ b/tests/intel/xe_vm.c > @@ -1843,12 +1843,12 @@ igt_main > { "all", 4, 2, 0, 4, 0 }, > { "one-partial", 4, 1, 1, 2, 0 }, > { "either-side-partial", 4, 2, 1, 2, 0 }, > - { "either-side-partial-hammer", 4, 2, 1, 2, > + { "either-side-partial-hammer", 6, 2, 2, 2, > MAP_FLAG_HAMMER_FIRST_PAGE }, > - { "either-side-partial-split-page-hammer", 4, 2, 1, 2, > + { "either-side-partial-split-page-hammer", 6, 2, 2, 2, > MAP_FLAG_HAMMER_FIRST_PAGE | > MAP_FLAG_LARGE_PAGE }, > - { "either-side-partial-large-page-hammer", 4, 2, 1, 2, > + { "either-side-partial-large-page-hammer", 6, 2, 2, 2, > MAP_FLAG_HAMMER_FIRST_PAGE | > MAP_FLAG_LARGE_PAGE | > MAP_FLAG_LARGE_PAGE_NO_SPLIT }, > @@ -1857,7 +1857,7 @@ igt_main > { "front", 4, 2, 1, 3, 0 }, > { "many-all", 4 * 8, 2 * 8, 0 * 8, 4 * 8, 0 }, > { "many-either-side-partial", 4 * 8, 2 * 8, 1, 4 * 8 - 2, 0 }, > - { "many-either-side-partial-hammer", 4 * 8, 2 * 8, 1, 4 * 8 - 2, > + { "many-either-side-partial-hammer", 4 * 8, 2 * 8, 2, 4 * 8 - 4, > MAP_FLAG_HAMMER_FIRST_PAGE }, > { "many-either-side-full", 4 * 8, 4 * 8, 1 * 8, 2 * 8, 0 }, > { "many-end", 4 * 8, 4, 0 * 8, 3 * 8 + 2, 0 }, > @@ -1902,12 +1902,12 @@ igt_main > { "one-partial", 4, 1, 1, 2, 0 }, > { "either-side-partial", 4, 2, 1, 2, 0 }, > { "either-side-full", 4, 4, 1, 2, 0 }, > - { "either-side-partial-hammer", 4, 2, 1, 2, > + { "either-side-partial-hammer", 6, 2, 2, 2, > MAP_FLAG_HAMMER_FIRST_PAGE }, > - { "either-side-partial-split-page-hammer", 4, 2, 1, 2, > + { "either-side-partial-split-page-hammer", 6, 2, 2, 2, > MAP_FLAG_HAMMER_FIRST_PAGE | > MAP_FLAG_LARGE_PAGE }, > - { "either-side-partial-large-page-hammer", 4, 2, 1, 2, > + { "either-side-partial-large-page-hammer", 6, 2, 2, 2, > MAP_FLAG_HAMMER_FIRST_PAGE | > MAP_FLAG_LARGE_PAGE | > MAP_FLAG_LARGE_PAGE_NO_SPLIT }, > @@ -1915,7 +1915,7 @@ igt_main > { "front", 4, 2, 1, 3, 0 }, > { "many-all", 4 * 8, 2 * 8, 0 * 8, 4 * 8, 0 }, > { "many-either-side-partial", 4 * 8, 2 * 8, 1, 4 * 8 - 2, 0 }, > - { "many-either-side-partial-hammer", 4 * 8, 2 * 8, 1, 4 * 8 - 2, > + { "many-either-side-partial-hammer", 4 * 8, 2 * 8, 2, 4 * 8 - 4, > MAP_FLAG_HAMMER_FIRST_PAGE }, > { "userptr-all", 4, 2, 0, 4, MAP_FLAG_USERPTR }, > { "userptr-one-partial", 4, 1, 1, 2, MAP_FLAG_USERPTR }, ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2] tests/intel/xe_vm: Always have at least 2 pages bound in hammer sections 2024-04-10 8:42 ` [PATCH v2] tests/intel/xe_vm: Always have at least 2 pages bound in hammer sections Matthew Auld @ 2024-04-12 1:58 ` Matthew Brost 0 siblings, 0 replies; 5+ messages in thread From: Matthew Brost @ 2024-04-12 1:58 UTC (permalink / raw) To: Matthew Auld; +Cc: igt-dev On Wed, Apr 10, 2024 at 09:42:37AM +0100, Matthew Auld wrote: > On 10/04/2024 02:21, Matthew Brost wrote: > > If the prefetch buffer is 2k or larger the hammer sections will prefetch > > the next page, if the page is unbound a fault will occur. Account for > > larger prefetchs by always having at least 2 pages bound for the hammer > > thread. > > Is this referring to bb_start pre-fetch? It should be + 4K at most for xe2. Yes. > Is it possible to make the test consider xe_cs_prefetch_size() somehow > instead of hardcoding? Or perhaps that is tricky here? Otherwise maybe we That's tricky. > can add an assert that xe_cs_prefetch_size() remains <= 4K for this test, Will add an assert to the test. > with comment explaining what needs to change if we start triggering the > assert? Thinking is that would be easier to debug and fix than seeing CAT > errors, faults etc. if the pre-fetch changes again. Will also add a comment. Thanks, Matt > > > > > v2: > > - Missed table entry > > > > Signed-off-by: Matthew Brost <matthew.brost@intel.com> > > --- > > tests/intel/xe_vm.c | 16 ++++++++-------- > > 1 file changed, 8 insertions(+), 8 deletions(-) > > > > diff --git a/tests/intel/xe_vm.c b/tests/intel/xe_vm.c > > index bd4973cc38..9f9f61b7ef 100644 > > --- a/tests/intel/xe_vm.c > > +++ b/tests/intel/xe_vm.c > > @@ -1843,12 +1843,12 @@ igt_main > > { "all", 4, 2, 0, 4, 0 }, > > { "one-partial", 4, 1, 1, 2, 0 }, > > { "either-side-partial", 4, 2, 1, 2, 0 }, > > - { "either-side-partial-hammer", 4, 2, 1, 2, > > + { "either-side-partial-hammer", 6, 2, 2, 2, > > MAP_FLAG_HAMMER_FIRST_PAGE }, > > - { "either-side-partial-split-page-hammer", 4, 2, 1, 2, > > + { "either-side-partial-split-page-hammer", 6, 2, 2, 2, > > MAP_FLAG_HAMMER_FIRST_PAGE | > > MAP_FLAG_LARGE_PAGE }, > > - { "either-side-partial-large-page-hammer", 4, 2, 1, 2, > > + { "either-side-partial-large-page-hammer", 6, 2, 2, 2, > > MAP_FLAG_HAMMER_FIRST_PAGE | > > MAP_FLAG_LARGE_PAGE | > > MAP_FLAG_LARGE_PAGE_NO_SPLIT }, > > @@ -1857,7 +1857,7 @@ igt_main > > { "front", 4, 2, 1, 3, 0 }, > > { "many-all", 4 * 8, 2 * 8, 0 * 8, 4 * 8, 0 }, > > { "many-either-side-partial", 4 * 8, 2 * 8, 1, 4 * 8 - 2, 0 }, > > - { "many-either-side-partial-hammer", 4 * 8, 2 * 8, 1, 4 * 8 - 2, > > + { "many-either-side-partial-hammer", 4 * 8, 2 * 8, 2, 4 * 8 - 4, > > MAP_FLAG_HAMMER_FIRST_PAGE }, > > { "many-either-side-full", 4 * 8, 4 * 8, 1 * 8, 2 * 8, 0 }, > > { "many-end", 4 * 8, 4, 0 * 8, 3 * 8 + 2, 0 }, > > @@ -1902,12 +1902,12 @@ igt_main > > { "one-partial", 4, 1, 1, 2, 0 }, > > { "either-side-partial", 4, 2, 1, 2, 0 }, > > { "either-side-full", 4, 4, 1, 2, 0 }, > > - { "either-side-partial-hammer", 4, 2, 1, 2, > > + { "either-side-partial-hammer", 6, 2, 2, 2, > > MAP_FLAG_HAMMER_FIRST_PAGE }, > > - { "either-side-partial-split-page-hammer", 4, 2, 1, 2, > > + { "either-side-partial-split-page-hammer", 6, 2, 2, 2, > > MAP_FLAG_HAMMER_FIRST_PAGE | > > MAP_FLAG_LARGE_PAGE }, > > - { "either-side-partial-large-page-hammer", 4, 2, 1, 2, > > + { "either-side-partial-large-page-hammer", 6, 2, 2, 2, > > MAP_FLAG_HAMMER_FIRST_PAGE | > > MAP_FLAG_LARGE_PAGE | > > MAP_FLAG_LARGE_PAGE_NO_SPLIT }, > > @@ -1915,7 +1915,7 @@ igt_main > > { "front", 4, 2, 1, 3, 0 }, > > { "many-all", 4 * 8, 2 * 8, 0 * 8, 4 * 8, 0 }, > > { "many-either-side-partial", 4 * 8, 2 * 8, 1, 4 * 8 - 2, 0 }, > > - { "many-either-side-partial-hammer", 4 * 8, 2 * 8, 1, 4 * 8 - 2, > > + { "many-either-side-partial-hammer", 4 * 8, 2 * 8, 2, 4 * 8 - 4, > > MAP_FLAG_HAMMER_FIRST_PAGE }, > > { "userptr-all", 4, 2, 0, 4, MAP_FLAG_USERPTR }, > > { "userptr-one-partial", 4, 1, 1, 2, MAP_FLAG_USERPTR }, ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2024-04-12 2:00 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2024-04-10 1:21 [PATCH v2] tests/intel/xe_vm: Always have at least 2 pages bound in hammer sections Matthew Brost 2024-04-10 1:59 ` ✓ CI.xeBAT: success for tests/intel/xe_vm: Always have at least 2 pages bound in hammer sections (rev2) Patchwork 2024-04-10 2:25 ` ✗ Fi.CI.BAT: failure " Patchwork 2024-04-10 8:42 ` [PATCH v2] tests/intel/xe_vm: Always have at least 2 pages bound in hammer sections Matthew Auld 2024-04-12 1:58 ` Matthew Brost
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