[PATCH] tests/intel/xe_exec_multi_queue: No engines in virtual test expected

[PATCH] tests/intel/xe_exec_multi_queue: No engines in virtual test expected

[Jonathan Cavitt]

In the xe_exec_multi_queue@virtual test, we currently assert that at
least one engine with a given class on a given GT ID exists.  However,
the way we generate these class and GT ID pairs is through brute-force
(I.E. list all engine classes that support multi queue, then list all GT
IDs, to generate all pairs).  This frequently results in invalid class
and GT pairs (E.G. attempting to find RCS on GT ID 1).

While a smart solution that only generates valid class and GT ID
pairings would be preferred here, doing so would probably be overkill,
so just remove the igt_assert case and exit silently if no engines are
found.

Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Cc: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
Cc: Priyanka Dandamudi <priyanka.dandamudi@intel.com>
Cc: Stuart Summers <stuart.summers@intel.com>
---
 tests/intel/xe_exec_multi_queue.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/tests/intel/xe_exec_multi_queue.c b/tests/intel/xe_exec_multi_queue.c
index 6bc6f9f63b..9a02744967 100644
--- a/tests/intel/xe_exec_multi_queue.c
+++ b/tests/intel/xe_exec_multi_queue.c
@@ -995,7 +995,9 @@ test_exec_virtual(int fd, int gt, int class)
 
 		eci[n++] = *hwe;
 	}
-	igt_assert(n);
+
+	if (!n)
+		return;
 
 	test_exec(fd, eci, n, n, n, 0);
 	test_exec(fd, eci, n, n, n, PREEMPT_MODE);
-- 
2.43.0

✓ Xe.CI.BAT: success for tests/intel/xe_exec_multi_queue: No engines in virtual test expected

[Patchwork]

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== Series Details ==

Series: tests/intel/xe_exec_multi_queue: No engines in virtual test expected
URL   : https://patchwork.freedesktop.org/series/160047/
State : success

== Summary ==

CI Bug Log - changes from XEIGT_8699_BAT -> XEIGTPW_14336_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (12 -> 12)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in XEIGTPW_14336_BAT that come from known issues:

### IGT changes ###

#### Possible fixes ####

  * igt@xe_waitfence@engine:
    - bat-dg2-oem2:       [FAIL][1] ([Intel XE#6519]) -> [PASS][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8699/bat-dg2-oem2/igt@xe_waitfence@engine.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14336/bat-dg2-oem2/igt@xe_waitfence@engine.html

  
  [Intel XE#6519]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6519


Build changes
-------------

  * IGT: IGT_8699 -> IGTPW_14336
  * Linux: xe-4373-7907558010710b0829258fc6a7bbcbb8783b8aa5 -> xe-4378-5ef09fd6fa463fe02033807ed0c9c78957cdb0a8

  IGTPW_14336: 14336
  IGT_8699: 0b67ab25f2eb58b296872c8c34474b79353727d5 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4373-7907558010710b0829258fc6a7bbcbb8783b8aa5: 7907558010710b0829258fc6a7bbcbb8783b8aa5
  xe-4378-5ef09fd6fa463fe02033807ed0c9c78957cdb0a8: 5ef09fd6fa463fe02033807ed0c9c78957cdb0a8

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14336/index.html

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✗ i915.CI.BAT: failure for tests/intel/xe_exec_multi_queue: No engines in virtual test expected

[Patchwork]

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== Series Details ==

Series: tests/intel/xe_exec_multi_queue: No engines in virtual test expected
URL   : https://patchwork.freedesktop.org/series/160047/
State : failure

== Summary ==

CI Bug Log - changes from IGT_8699 -> IGTPW_14336
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_14336 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_14336, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14336/index.html

Participating hosts (43 -> 41)
------------------------------

  Missing    (2): bat-dg2-13 fi-snb-2520m 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_14336:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live@gt_pm:
    - bat-mtlp-8:         [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8699/bat-mtlp-8/igt@i915_selftest@live@gt_pm.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14336/bat-mtlp-8/igt@i915_selftest@live@gt_pm.html

  
Known issues
------------

  Here are the changes found in IGTPW_14336 that come from known issues:

### IGT changes ###

#### Possible fixes ####

  * igt@i915_selftest@live:
    - bat-arlh-3:         [INCOMPLETE][3] ([i915#14837]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8699/bat-arlh-3/igt@i915_selftest@live.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14336/bat-arlh-3/igt@i915_selftest@live.html

  * igt@i915_selftest@live@coherency:
    - bat-arlh-3:         [INCOMPLETE][5] ([i915#15566]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8699/bat-arlh-3/igt@i915_selftest@live@coherency.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14336/bat-arlh-3/igt@i915_selftest@live@coherency.html

  * igt@i915_selftest@live@workarounds:
    - bat-arlh-3:         [DMESG-FAIL][7] ([i915#12061]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8699/bat-arlh-3/igt@i915_selftest@live@workarounds.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14336/bat-arlh-3/igt@i915_selftest@live@workarounds.html
    - bat-arls-5:         [DMESG-FAIL][9] ([i915#12061]) -> [PASS][10] +1 other test pass
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8699/bat-arls-5/igt@i915_selftest@live@workarounds.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14336/bat-arls-5/igt@i915_selftest@live@workarounds.html
    - bat-mtlp-8:         [DMESG-FAIL][11] ([i915#12061]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8699/bat-mtlp-8/igt@i915_selftest@live@workarounds.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14336/bat-mtlp-8/igt@i915_selftest@live@workarounds.html

  
#### Warnings ####

  * igt@i915_selftest@live:
    - bat-mtlp-8:         [DMESG-FAIL][13] ([i915#12061]) -> [INCOMPLETE][14] ([i915#15176])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8699/bat-mtlp-8/igt@i915_selftest@live.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14336/bat-mtlp-8/igt@i915_selftest@live.html

  
  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
  [i915#14837]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14837
  [i915#15176]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15176
  [i915#15566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15566


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_8699 -> IGTPW_14336
  * Linux: CI_DRM_17810 -> CI_DRM_17815

  CI-20190529: 20190529
  CI_DRM_17810: 7907558010710b0829258fc6a7bbcbb8783b8aa5 @ git://anongit.freedesktop.org/gfx-ci/linux
  CI_DRM_17815: 5ef09fd6fa463fe02033807ed0c9c78957cdb0a8 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_14336: 14336
  IGT_8699: 0b67ab25f2eb58b296872c8c34474b79353727d5 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14336/index.html

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✗ Xe.CI.Full: failure for tests/intel/xe_exec_multi_queue: No engines in virtual test expected

[Patchwork]

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== Series Details ==

Series: tests/intel/xe_exec_multi_queue: No engines in virtual test expected
URL   : https://patchwork.freedesktop.org/series/160047/
State : failure

== Summary ==

ERROR: The runconfig 'XEIGT_8699_FULL' does not exist in the database

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14336/index.html

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Re: [PATCH] tests/intel/xe_exec_multi_queue: No engines in virtual test expected

[Niranjana Vishwanathapura]

On Tue, Jan 13, 2026 at 09:15:59PM +0000, Jonathan Cavitt wrote:
>In the xe_exec_multi_queue@virtual test, we currently assert that at
>least one engine with a given class on a given GT ID exists.  However,
>the way we generate these class and GT ID pairs is through brute-force
>(I.E. list all engine classes that support multi queue, then list all GT
>IDs, to generate all pairs).  This frequently results in invalid class
>and GT pairs (E.G. attempting to find RCS on GT ID 1).
>

NIT...we can remove below example as RCS doesn't support multi-queue.
"(E.G. attempting to find RCS on GT ID 1)"
The rest of the commit text here is descriptive enough.

In anycase,
Reviewed-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>

>While a smart solution that only generates valid class and GT ID
>pairings would be preferred here, doing so would probably be overkill,
>so just remove the igt_assert case and exit silently if no engines are
>found.
>
>Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
>Cc: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
>Cc: Priyanka Dandamudi <priyanka.dandamudi@intel.com>
>Cc: Stuart Summers <stuart.summers@intel.com>
>---
> tests/intel/xe_exec_multi_queue.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
>diff --git a/tests/intel/xe_exec_multi_queue.c b/tests/intel/xe_exec_multi_queue.c
>index 6bc6f9f63b..9a02744967 100644
>--- a/tests/intel/xe_exec_multi_queue.c
>+++ b/tests/intel/xe_exec_multi_queue.c
>@@ -995,7 +995,9 @@ test_exec_virtual(int fd, int gt, int class)
>
> 		eci[n++] = *hwe;
> 	}
>-	igt_assert(n);
>+
>+	if (!n)
>+		return;
>
> 	test_exec(fd, eci, n, n, n, 0);
> 	test_exec(fd, eci, n, n, n, PREEMPT_MODE);
>-- 
>2.43.0
>

[PATCH] tests/intel/xe_exec_multi_queue: No engines in virtual test expected

[Jonathan Cavitt]

In the xe_exec_multi_queue@virtual test, we currently assert that at
least one engine with a given class on a given GT ID exists.  However,
the way we generate these class and GT ID pairs is through brute-force
(I.E. list all engine classes that support multi queue, then list all GT
IDs, to generate all pairs).  This frequently results in invalid class
and GT ID pairs.

While a smart solution that only generates valid class and GT ID
pairings would be preferred here, doing so would probably be overkill,
so just remove the igt_assert case and exit silently if no engines are
found.

Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Reviewed-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
Cc: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
Cc: Priyanka Dandamudi <priyanka.dandamudi@intel.com>
Cc: Stuart Summers <stuart.summers@intel.com>
---
 tests/intel/xe_exec_multi_queue.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/tests/intel/xe_exec_multi_queue.c b/tests/intel/xe_exec_multi_queue.c
index 6bc6f9f63b..9a02744967 100644
--- a/tests/intel/xe_exec_multi_queue.c
+++ b/tests/intel/xe_exec_multi_queue.c
@@ -995,7 +995,9 @@ test_exec_virtual(int fd, int gt, int class)
 
 		eci[n++] = *hwe;
 	}
-	igt_assert(n);
+
+	if (!n)
+		return;
 
 	test_exec(fd, eci, n, n, n, 0);
 	test_exec(fd, eci, n, n, n, PREEMPT_MODE);
-- 
2.43.0