Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Jani Nikula <jani.nikula@linux.intel.com>
To: Suraj Kandpal <suraj.kandpal@intel.com>,
	intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: ankit.k.nautiyal@intel.com, arun.r.murthy@intel.com,
	Suraj Kandpal <suraj.kandpal@intel.com>
Subject: Re: [PATCH 01/10] drm/i915/display: Add helper to compute link M/N ratio for reuse
Date: Fri, 11 Sep 2026 14:24:14 +0300	[thread overview]
Message-ID: <123bd5fd897e0c5d7d956d2cc94eb8cec6d7f91c@intel.com> (raw)
In-Reply-To: <20260911041449.3699400-2-suraj.kandpal@intel.com>

On Fri, 11 Sep 2026, Suraj Kandpal <suraj.kandpal@intel.com> wrote:
> From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>
> Introduce `intel_display_get_link_m_n()` to compute the link M/N ratio

Please drop the backticks. IMO it's just ugly fluff in commit messages.

> based on pixel clock and link clock. This logic was previously embedded
> within `intel_link_compute_m_n()`.
>
> The new helper allows reuse of link M/N computation in other contexts
> without requiring the full data M/N calculation.
>
> No functional changes intended.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 18 ++++++++++++++----
>  1 file changed, 14 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index fc30a455bed3..b5682c196646 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2633,13 +2633,24 @@ static void compute_m_n(u32 *ret_m, u32 *ret_n,
>  	intel_reduce_m_n_ratio(ret_m, ret_n);
>  }
>  
> +static
> +void intel_display_get_link_m_n(u32 *link_m, u32 *link_n,
> +				u32 pixel_clock,
> +				u32 link_clock)

Now we have two functions:

- intel_display_get_link_m_n()
- intel_link_compute_m_n()

in which one is a part of the other, but the names are quite different.

Why? Shouldn't the names be somewhat similar?

BR,
Jani.


> +{
> +	u32 link_symbol_clock = intel_dp_link_symbol_clock(link_clock);
> +
> +	compute_m_n(link_m, link_n,
> +		    pixel_clock, link_symbol_clock,
> +		    0x80000);
> +}
> +
>  void
>  intel_link_compute_m_n(u16 bits_per_pixel_x16, int nlanes,
>  		       int pixel_clock, int link_clock,
>  		       int bw_overhead,
>  		       struct intel_link_m_n *m_n)
>  {
> -	u32 link_symbol_clock = intel_dp_link_symbol_clock(link_clock);
>  	u32 data_m = intel_dp_effective_data_rate(pixel_clock, bits_per_pixel_x16,
>  						  bw_overhead);
>  	u32 data_n = drm_dp_max_dprx_data_rate(link_clock, nlanes);
> @@ -2656,9 +2667,8 @@ intel_link_compute_m_n(u16 bits_per_pixel_x16, int nlanes,
>  		    data_m, data_n,
>  		    0x8000000);
>  
> -	compute_m_n(&m_n->link_m, &m_n->link_n,
> -		    pixel_clock, link_symbol_clock,
> -		    0x80000);
> +	intel_display_get_link_m_n(&m_n->link_m, &m_n->link_n,
> +				   pixel_clock, link_clock);
>  }
>  
>  void intel_panel_sanitize_ssc(struct intel_display *display)

-- 
Jani Nikula, Intel

  reply	other threads:[~2026-09-11 11:24 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-11  4:14 [PATCH 00/10] Implement Wa_14021768792 to bypass m_n ratio limit Suraj Kandpal
2026-09-11  4:14 ` [PATCH 01/10] drm/i915/display: Add helper to compute link M/N ratio for reuse Suraj Kandpal
2026-09-11 11:24   ` Jani Nikula [this message]
2026-09-11 11:28     ` Jani Nikula
2026-09-11  4:14 ` [PATCH 02/10] drm/i915/dp: Limit M/N ratio for DP SST Suraj Kandpal
2026-09-11  4:14 ` [PATCH 03/10] drm/i915/dp_mst: Limit M/N ratio for MST Suraj Kandpal
2026-09-11  4:30   ` sashiko-bot
2026-09-11  4:14 ` [PATCH 04/10] drm/i915/dp: Add M/N ratio check with warning for DP link config Suraj Kandpal
2026-09-11  4:14 ` [PATCH 05/10] drm/i915/display: Add bits for link_n_extended for DISPLAY >= 14 Suraj Kandpal
2026-09-11  4:14 ` [PATCH 06/10] drm/i915/display_wa: Add support for Wa_14021768792 Suraj Kandpal
2026-09-11  4:14 ` [PATCH 07/10] drm/i915/display: Add bits for Wa_14021768792 for linkm/n ratio > 10 Suraj Kandpal
2026-09-11  4:29   ` sashiko-bot
2026-09-11  4:14 ` [PATCH 08/10] drm/i915/display: Implement Wa_14021768792 for BMG DP for link_m/n " Suraj Kandpal
2026-09-11  4:30   ` sashiko-bot
2026-09-11  4:14 ` [PATCH 09/10] drm/i915/dp: Extend intel_dp_can_support_m_n() for BMG M/N bypass Suraj Kandpal
2026-09-11  4:14 ` [PATCH 10/10] drm/i915/dp: Bump the max Link M/N ratio to 22 for DISPLAY_VER >= 35 Suraj Kandpal
2026-09-11  5:14 ` ✓ i915.CI.BAT: success for Implement Wa_14021768792 to bypass m_n ratio limit (rev6) Patchwork
2026-09-11 23:52 ` ✗ i915.CI.Full: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=123bd5fd897e0c5d7d956d2cc94eb8cec6d7f91c@intel.com \
    --to=jani.nikula@linux.intel.com \
    --cc=ankit.k.nautiyal@intel.com \
    --cc=arun.r.murthy@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=suraj.kandpal@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox