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From: Zhenyu Wang <zhenyuw@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: patches for occlusion query fix on sandybridge
Date: Tue, 14 Dec 2010 12:55:59 +0800	[thread overview]
Message-ID: <1292302562-5800-1-git-send-email-zhenyuw@linux.intel.com> (raw)

It appears Sandybridge PIPE_CONTROL write out buffer need
to be set as cached, currently LLC cached, in order to read
back correct counter. Otherwise I can always be possible to
get corrupted 64-bit PS_DEPTH_COUNT from PIPE_CONTROL write.

So below patches try to add new flag during bo create with
cacheable type, to be sure that GTT entry's cache bits would
be setup for that.

This fixes occlusion query piglit test and mesa demos on my
sandybridge. Note that below patches don't include necessary
component version check changes.

thanks.

             reply	other threads:[~2010-12-14  4:56 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-12-14  4:55 Zhenyu Wang [this message]
2010-12-14  4:56 ` [PATCH] drm/i915: Add cached bo create interface Zhenyu Wang
2010-12-14  4:56 ` [PATCH] intel: new interface for cached bo create Zhenyu Wang
2010-12-14  9:35   ` Chris Wilson
2010-12-14  4:56 ` [PATCH] i965: alloc cached bo for query object on Sandybridge Zhenyu Wang
2010-12-14 17:58 ` patches for occlusion query fix on sandybridge Eric Anholt
2010-12-14 20:59   ` david may
2010-12-14 21:47     ` Chris Wilson
2010-12-15  1:18       ` Zhenyu Wang
2010-12-14 18:13 ` Daniel Vetter
2010-12-15  1:29   ` Zhenyu Wang

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