From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 3/4] drm/i915: allow PCH PWM override on IVB
Date: Wed, 11 Apr 2012 09:23:35 -0700 [thread overview]
Message-ID: <1334161416-11775-3-git-send-email-jbarnes@virtuousgeek.org> (raw)
In-Reply-To: <1334161416-11775-1-git-send-email-jbarnes@virtuousgeek.org>
On IVB, there are two sets of panel backlight regs: one in the CPU and
one in the PCH. The CPU ones aren't generally used, so on IVB make sure
we allow the PCH regs to actually control the backlight.
v2: remove unused pwm variable (Daniel)
move to init_hw function so we override on resume too
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
drivers/gpu/drm/i915/intel_display.c | 16 ++++++++++++++++
1 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 58f4b02..33aaad3 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9530,6 +9530,19 @@ static void i915_disable_vga(struct drm_device *dev)
POSTING_READ(vga_reg);
}
+static void ivb_pch_pwm_override(struct drm_device *dev)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+
+ /*
+ * IVB has CPU eDP backlight regs too, set things up to let the
+ * PCH regs control the backlight
+ */
+ I915_WRITE(BLC_PWM_CPU_CTL2, PWM_ENABLE);
+ I915_WRITE(BLC_PWM_CPU_CTL, 0);
+ I915_WRITE(BLC_PWM_PCH_CTL1, PWM_ENABLE | (1<<30));
+}
+
void intel_modeset_init_hw(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
@@ -9545,6 +9558,9 @@ void intel_modeset_init_hw(struct drm_device *dev)
gen6_enable_rps(dev_priv);
gen6_update_ring_freq(dev_priv);
}
+
+ if (IS_IVYBRIDGE(dev))
+ ivb_pch_pwm_override(dev);
}
void intel_modeset_init(struct drm_device *dev)
--
1.7.4.1
next prev parent reply other threads:[~2012-04-11 16:23 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-04-11 16:23 [PATCH 1/4] drm/i915: disable turbo on ValleyView for now Jesse Barnes
2012-04-11 16:23 ` [PATCH 2/4] drm/i915: IBX+ doesn't have separate vsync/hsync controls on the VGA DAC Jesse Barnes
2012-04-11 18:36 ` Daniel Vetter
2012-04-17 22:06 ` Jesse Barnes
2012-04-17 22:18 ` Chris Wilson
2012-04-18 7:36 ` Daniel Vetter
2012-04-11 16:23 ` Jesse Barnes [this message]
2012-04-11 16:23 ` [PATCH 4/4] drm/i915: force CPU eDP onto pipe 3 on IVB Jesse Barnes
2012-04-11 16:53 ` Jesse Barnes
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