From: Paulo Zanoni <przanoni@gmail.com>
To: intel-gfx@lists.freedesktop.org
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: [PATCH 09/14] drm/i915: implement workaround for VTOTAL when using TRANSCODER_EDP
Date: Thu, 18 Oct 2012 18:21:39 -0300 [thread overview]
Message-ID: <1350595304-18237-10-git-send-email-przanoni@gmail.com> (raw)
In-Reply-To: <1350595304-18237-1-git-send-email-przanoni@gmail.com>
From: Paulo Zanoni <paulo.r.zanoni@intel.com>
See the documentation for the DDI_FUNC_CTL register, EDP Input Select
bits: when the EDP input selection is B, the VTOTAL_B must be
programmed with the VTOTAL_EDP value, same thing for selection C.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 9202cb6..cc859b3 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4376,6 +4376,17 @@ static void intel_set_pipe_timings(struct intel_crtc *intel_crtc,
(adjusted_mode->crtc_vsync_start - 1) |
((adjusted_mode->crtc_vsync_end - 1) << 16));
+ /* Workaround: when the EDP input selection is B, the VTOTAL_B must be
+ * programmed with the VTOTAL_EDP value. Same for VTOTAL_C. This is
+ * documented on the DDI_FUNC_CTL register description, EDP Input Select
+ * bits. */
+ if (IS_HASWELL(dev) && cpu_transcoder == TRANSCODER_EDP &&
+ (pipe == PIPE_B || pipe == PIPE_C)) {
+ I915_WRITE(VTOTAL(pipe),
+ (adjusted_mode->crtc_vdisplay - 1) |
+ ((adjusted_mode->crtc_vtotal - 1) << 16));
+ }
+
/* pipesrc controls the size that is scaled from, which should
* always be the user's requested size.
*/
--
1.7.11.4
next prev parent reply other threads:[~2012-10-18 21:22 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-18 21:21 [PATCH 00/14] Haswell eDP enablement Paulo Zanoni
2012-10-18 21:21 ` [PATCH 01/14] drm/i915: add TRANSCODER_EDP Paulo Zanoni
2012-10-18 22:00 ` Daniel Vetter
2012-10-18 21:21 ` [PATCH 02/14] drm/i915: convert PIPE_CLK_SEL to transcoder Paulo Zanoni
2012-10-18 21:21 ` [PATCH 03/14] drm/i915: convert DDI_FUNC_CTL " Paulo Zanoni
2012-10-18 21:21 ` [PATCH 04/14] drm/i915: check TRANSCODER_EDP on intel_modeset_setup_hw_state Paulo Zanoni
2012-10-18 22:02 ` Daniel Vetter
2012-10-19 19:30 ` Paulo Zanoni
2012-10-18 21:21 ` [PATCH 05/14] drm/i915: convert PIPECONF to use transcoder instead of pipe Paulo Zanoni
2012-10-18 22:23 ` Daniel Vetter
2012-10-19 18:36 ` Paulo Zanoni
2012-10-18 21:21 ` [PATCH 06/14] drm/i915: convert PIPE_MSA_MISC to transcoder Paulo Zanoni
2012-10-18 21:21 ` [PATCH 07/14] drm/i915: convert CPU M/N timings " Paulo Zanoni
2012-10-18 22:25 ` Daniel Vetter
2012-10-18 21:21 ` [PATCH 08/14] drm/i915: convert pipe timing definitions " Paulo Zanoni
2012-10-18 22:29 ` Daniel Vetter
2012-10-18 21:21 ` Paulo Zanoni [this message]
2012-10-18 21:21 ` [PATCH 10/14] drm/i915: select the correct pipe when using TRANSCODER_EDP Paulo Zanoni
2012-10-18 21:21 ` [PATCH 11/14] drm/i915: set the correct eDP aux channel clock divider on DDI Paulo Zanoni
2012-10-18 21:21 ` [PATCH 12/14] drm/i915: set/unset the DDI eDP backlight Paulo Zanoni
2012-10-18 21:21 ` [PATCH 13/14] drm/i915: turn the eDP DDI panel on/off Paulo Zanoni
2012-10-18 21:21 ` [PATCH 14/14] drm/i915: enable DDI eDP Paulo Zanoni
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