From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v2 3/7] drm/i915: use gtt_get_size() instead of open coding it
Date: Mon, 7 Jan 2013 21:47:35 +0200 [thread overview]
Message-ID: <1357588059-6631-4-git-send-email-imre.deak@intel.com> (raw)
In-Reply-To: <1357588059-6631-1-git-send-email-imre.deak@intel.com>
In-Reply-To: <1357317721-6313-1-git-send-email-imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_gem.c | 2 +-
drivers/gpu/drm/i915/i915_gem_tiling.c | 13 +------------
3 files changed, 4 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 154323a..3b73615 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1566,6 +1566,8 @@ void i915_gem_free_all_phys_object(struct drm_device *dev);
void i915_gem_release(struct drm_device *dev, struct drm_file *file);
uint32_t
+i915_gem_get_gtt_size(struct drm_device *dev, uint32_t size, int tiling_mode);
+uint32_t
i915_gem_get_gtt_alignment(struct drm_device *dev, uint32_t size,
int tiling_mode, bool fenced);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 5e00dc1..aa6653d 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1435,7 +1435,7 @@ i915_gem_release_mmap(struct drm_i915_gem_object *obj)
obj->fault_mappable = false;
}
-static uint32_t
+uint32_t
i915_gem_get_gtt_size(struct drm_device *dev, uint32_t size, int tiling_mode)
{
uint32_t gtt_size;
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index cb71ded..e76f0d8 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -272,18 +272,7 @@ i915_gem_object_fence_ok(struct drm_i915_gem_object *obj, int tiling_mode)
return false;
}
- /*
- * Previous chips need to be aligned to the size of the smallest
- * fence register that can contain the object.
- */
- if (INTEL_INFO(obj->base.dev)->gen == 3)
- size = 1024*1024;
- else
- size = 512*1024;
-
- while (size < obj->base.size)
- size <<= 1;
-
+ size = i915_gem_get_gtt_size(obj->base.dev, obj->base.size, tiling_mode);
if (obj->gtt_space->size != size)
return false;
--
1.7.10.4
next prev parent reply other threads:[~2013-01-07 19:47 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-01-04 16:41 [PATCH 0/5] drm/i915: fix gtt space allocated for tiled objects Imre Deak
2013-01-04 16:41 ` [PATCH 1/5] drm/i915: merge get_gtt_alignment/get_unfenced_gtt_alignment() Imre Deak
2013-01-04 16:41 ` [PATCH 2/5] drm/i915: merge {i965, sandybridge}_write_fence_reg() Imre Deak
2013-01-04 16:41 ` [PATCH 3/5] drm/i915: use gtt_get_size() instead of open coding it Imre Deak
2013-01-04 16:41 ` [PATCH 4/5] drm/i915: factor out i915_gem_get_tile_width() Imre Deak
2013-01-04 16:42 ` [PATCH 5/5] drm/i915: fix gtt space allocated for tiled objects Imre Deak
2013-01-04 17:07 ` Chris Wilson
2013-01-04 17:23 ` Imre Deak
2013-01-04 17:47 ` Chris Wilson
2013-01-04 19:18 ` Imre Deak
2013-01-04 20:32 ` Chris Wilson
2013-01-04 20:54 ` Imre Deak
2013-01-07 19:47 ` [PATCH v2 0/7] " Imre Deak
2013-01-07 19:47 ` [PATCH v2 1/7] drm/i915: merge get_gtt_alignment/get_unfenced_gtt_alignment() Imre Deak
2013-01-07 19:47 ` [PATCH v2 2/7] drm/i915: merge {i965, sandybridge}_write_fence_reg() Imre Deak
2013-01-07 19:47 ` Imre Deak [this message]
2013-01-14 16:14 ` [PATCH v2 3/7] drm/i915: use gtt_get_size() instead of open coding it Daniel Vetter
2013-01-14 16:28 ` Imre Deak
2013-01-07 19:47 ` [PATCH v2 4/7] drm/i915: factor out i915_gem_get_tile_width() Imre Deak
2013-01-07 19:47 ` [PATCH v2 5/7] drm/i915: reject tiling for objects smaller than their tile row size Imre Deak
2013-01-09 15:18 ` [PATCH v3 " Imre Deak
2013-01-07 19:47 ` [PATCH v2 6/7] drm/i915: check tile object alignment explicitly Imre Deak
2013-01-07 19:47 ` [PATCH v2 7/7] drm/i915: fix gtt space allocated for tiled objects Imre Deak
2013-01-08 9:59 ` Chris Wilson
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