From: "Xiang, Haihao" <haihao.xiang@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel gfx][i-g-t PATCH 3/4] rendercopy/bdw: A workaround for 3D pipeline
Date: Fri, 6 Dec 2013 16:54:46 +0800 [thread overview]
Message-ID: <1386320087-3017-3-git-send-email-haihao.xiang@intel.com> (raw)
In-Reply-To: <1386320087-3017-1-git-send-email-haihao.xiang@intel.com>
From: "Xiang, Haihao" <haihao.xiang@intel.com>
Emit PIPELINE_SELECT twice and make sure the commands in
the first batch buffer have been done.
However I don't know why this works !!!
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
---
lib/rendercopy_gen8.c | 19 +++++++++++++++++--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c
index 1a137dd..6eb1051 100644
--- a/lib/rendercopy_gen8.c
+++ b/lib/rendercopy_gen8.c
@@ -148,7 +148,8 @@ batch_copy(struct intel_batchbuffer *batch, const void *ptr, uint32_t size, uint
static void
gen6_render_flush(struct intel_batchbuffer *batch,
- drm_intel_context *context, uint32_t batch_end)
+ drm_intel_context *context, uint32_t batch_end,
+ int waiting)
{
int ret;
@@ -157,6 +158,11 @@ gen6_render_flush(struct intel_batchbuffer *batch,
ret = drm_intel_gem_bo_context_exec(batch->bo, context,
batch_end, 0);
assert(ret == 0);
+
+ if (waiting) {
+ dri_bo_map(batch->bo, 0);
+ dri_bo_unmap(batch->bo);
+ }
}
/* Mostly copy+paste from gen6, except height, width, pitch moved */
@@ -880,6 +886,15 @@ void gen8_render_copyfunc(struct intel_batchbuffer *batch,
intel_batchbuffer_flush_with_context(batch, context);
+ /* I don't know why it works !!! */
+ batch->ptr = batch->buffer;
+ OUT_BATCH(GEN6_PIPELINE_SELECT | PIPELINE_SELECT_3D);
+ OUT_BATCH(MI_BATCH_BUFFER_END);
+ batch_end = batch_align(batch, 8);
+ assert(batch_end < BATCH_STATE_SPLIT);
+ gen6_render_flush(batch, context, batch_end, 1);
+ intel_batchbuffer_reset(batch);
+
batch_align(batch, 8);
batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
@@ -968,6 +983,6 @@ void gen8_render_copyfunc(struct intel_batchbuffer *batch,
annotation_flush(&aub_annotations, batch);
- gen6_render_flush(batch, context, batch_end);
+ gen6_render_flush(batch, context, batch_end, 0);
intel_batchbuffer_reset(batch);
}
--
1.7.9.5
next prev parent reply other threads:[~2013-12-06 8:53 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-06 8:54 [Intel gfx][i-g-t PATCH 1/4] lib: Clean the batch buffer store after reset Xiang, Haihao
2013-12-06 8:54 ` [Intel gfx][i-g-t PATCH 2/4] rendercopy/bdw: Set Instruction Buffer size Modify Enable to 1 Xiang, Haihao
2013-12-06 10:15 ` Kenneth Graunke
2013-12-06 13:08 ` Damien Lespiau
2013-12-06 8:54 ` Xiang, Haihao [this message]
2013-12-06 13:30 ` [Intel gfx][i-g-t PATCH 3/4] rendercopy/bdw: A workaround for 3D pipeline Damien Lespiau
2013-12-09 4:47 ` Xiang, Haihao
2013-12-09 6:53 ` Daniel Vetter
2013-12-06 8:54 ` [Intel gfx][i-g-t PATCH 4/4] Revert "gen8 rendercpy: temporarily disable" Xiang, Haihao
2013-12-06 10:14 ` [Intel gfx][i-g-t PATCH 1/4] lib: Clean the batch buffer store after reset Kenneth Graunke
2013-12-06 13:03 ` Damien Lespiau
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