From: ville.syrjala@linux.intel.com
To: intel-gfx@lists.freedesktop.org
Cc: "Bruno Prémont" <bonbons@linux-vserver.org>
Subject: [PATCH 3/5] drm/i915: Increase gen2 vco frequency limit to 1512 MHz
Date: Mon, 9 Dec 2013 18:54:15 +0200 [thread overview]
Message-ID: <1386608057-20866-4-git-send-email-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <1386608057-20866-1-git-send-email-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Bruno Prémont has a 855 machine with a 1400x1050 LVDS screen.
The VBT mode is as follows:
0:"1400x1050" 0 108000 1400 1416 1528 1688 1050 1051 1054 1066 0x8 0xa
The BIOS uses the following DPLL settings:
DPLL = 0x90020000
FP0 = 0x2140e
FP1 = 0x21207
That puts the BIOS generated VCO frequency at 1512 MHz, which is
higher than the 1400 MHz limit we have currently.
Let's bump the VCO limit to 1512 MHz and see what happens.
Cc: Bruno Prémont <bonbons@linux-vserver.org>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index f1d3a8f..434cdde 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -90,7 +90,7 @@ intel_fdi_link_freq(struct drm_device *dev)
static const intel_limit_t intel_limits_i8xx_dac = {
.dot = { .min = 25000, .max = 350000 },
- .vco = { .min = 930000, .max = 1400000 },
+ .vco = { .min = 930000, .max = 1512000 },
.n = { .min = 2, .max = 16 },
.m = { .min = 96, .max = 140 },
.m1 = { .min = 18, .max = 26 },
@@ -103,7 +103,7 @@ static const intel_limit_t intel_limits_i8xx_dac = {
static const intel_limit_t intel_limits_i8xx_dvo = {
.dot = { .min = 25000, .max = 350000 },
- .vco = { .min = 930000, .max = 1400000 },
+ .vco = { .min = 930000, .max = 1512000 },
.n = { .min = 2, .max = 16 },
.m = { .min = 96, .max = 140 },
.m1 = { .min = 18, .max = 26 },
@@ -116,7 +116,7 @@ static const intel_limit_t intel_limits_i8xx_dvo = {
static const intel_limit_t intel_limits_i8xx_lvds = {
.dot = { .min = 25000, .max = 350000 },
- .vco = { .min = 930000, .max = 1400000 },
+ .vco = { .min = 930000, .max = 1512000 },
.n = { .min = 2, .max = 16 },
.m = { .min = 96, .max = 140 },
.m1 = { .min = 18, .max = 26 },
--
1.8.3.2
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next prev parent reply other threads:[~2013-12-09 16:55 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-09 16:54 [PATCH 0/5] drm/i915: Gen2 PLL fixes ville.syrjala
2013-12-09 16:54 ` [PATCH 1/5] drm/i915: Extract p2 divider correctly for gen2 LVDS dual channel ville.syrjala
2013-12-09 16:54 ` [PATCH 2/5] drm/i915: Change N divider minimum from 3 to 2 for gen2 ville.syrjala
2013-12-09 16:54 ` ville.syrjala [this message]
2013-12-09 16:54 ` [PATCH 4/5] drm/i915: Fix 66 MHz LVDS SSC freq " ville.syrjala
2013-12-09 16:54 ` [PATCH 5/5] drm/i915: Decrease gen2 vco frequency minimum to 908 MHz ville.syrjala
2013-12-10 11:52 ` [PATCH 0/5] drm/i915: Gen2 PLL fixes Bruno Prémont
2013-12-10 12:19 ` Ville Syrjälä
2013-12-10 12:33 ` Bruno Prémont
2013-12-10 12:47 ` Ville Syrjälä
2013-12-11 10:12 ` Daniel Vetter
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