From: "Gupta, Sourab" <sourab.gupta@intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: "Goel, Akash" <akash.goel@intel.com>,
Daniel Vetter <daniel.vetter@ffwll.ch>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 4/6] drm/i915/vlv: Remove the enabling of VS_TIMER_DISPATCH bit in MI MODE reg
Date: Mon, 24 Mar 2014 17:55:22 +0000 [thread overview]
Message-ID: <1395683760.19358.78.camel@sourabgu-desktop> (raw)
In-Reply-To: <20140324174721.GR4366@nuc-i3427.alporthouse.com>
On Mon, 2014-03-24 at 17:47 +0000, Chris Wilson wrote:
> On Mon, Mar 24, 2014 at 11:00:05PM +0530, sourab.gupta@intel.com wrote:
> > From: Akash Goel <akash.goel@intel.com>
> >
> > Removing the VS_TIMER_DISPATCH bit enable for MI MODE reg for
> > VLV platform as it is not required.
> >
> > Signed-off-by: Akash Goel <akash.goel@intel.com>
>
> I've been running with this on ivb and hsw, and have not yet seen a
> difference. So a tentative,
> Tested-by: Chris Wilson <chris@chris-wilson.co.uk> # ivb, hsw
> -Chris
>
Hi Chris,
Right now this patch applies to vlv. So, in that case, should this be
applicable to Gen7 per se?
I'll float a new version, if reqd.
Regards,
Sourab
next prev parent reply other threads:[~2014-03-24 17:57 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-03-24 17:30 [PATCH 0/6] Rendering Specific HW Workarounds for VLV sourab.gupta
2014-03-24 17:30 ` [PATCH v4 1/6] drm/i915/vlv: Added a rendering specific Hw WA 'WaTlbInvalidateStoreDataBefore' sourab.gupta
2014-03-24 17:30 ` [PATCH v4 2/6] drm/i915/vlv: Added a rendering specific Hw WA 'WaSendDummy3dPrimitveAfterSetContext' sourab.gupta
2014-04-08 4:41 ` Gupta, Sourab
2014-04-14 9:45 ` [PATCH v5 " sourab.gupta
2014-05-28 9:57 ` Gupta, Sourab
2014-06-05 5:44 ` Gupta, Sourab
2014-03-24 17:30 ` [PATCH v2 3/6] drm/i915: Enabling the TLB invalidate bit in GFX Mode register sourab.gupta
2014-04-01 5:01 ` Gupta, Sourab
2014-04-02 11:34 ` Ville Syrjälä
2014-04-02 11:55 ` Daniel Vetter
2014-03-24 17:30 ` [PATCH 4/6] drm/i915/vlv: Remove the enabling of VS_TIMER_DISPATCH bit in MI MODE reg sourab.gupta
2014-03-24 17:47 ` Chris Wilson
2014-03-24 17:55 ` Gupta, Sourab [this message]
2014-03-24 18:01 ` Chris Wilson
2014-03-24 18:28 ` [PATCH v2 " sourab.gupta
2014-03-25 11:33 ` Ville Syrjälä
2014-03-25 12:31 ` [PATCH v3 4/6] drm/i915: " sourab.gupta
2014-03-25 13:11 ` Ville Syrjälä
2014-03-25 15:41 ` Daniel Vetter
2014-03-24 17:30 ` [PATCH v2 5/6] drm/i915/vlv:Implement the WA 'WaDisable_RenderCache_OperationalFlush' sourab.gupta
2014-04-01 10:51 ` Ville Syrjälä
2014-04-03 4:42 ` [PATCH v3 " sourab.gupta
2014-04-04 11:17 ` Ville Syrjälä
2014-04-04 11:44 ` [PATCH v4 " sourab.gupta
2014-04-04 15:24 ` Chris Wilson
2014-04-04 15:35 ` Ville Syrjälä
2014-04-04 15:59 ` Chris Wilson
2014-04-04 15:59 ` Daniel Vetter
2014-03-24 17:30 ` [PATCH v2 6/6] drm/i915/vlv: Modifying WA 'WaDisableL3Bank2xClockGate for vlv sourab.gupta
2014-03-24 17:56 ` Damien Lespiau
2014-03-25 6:52 ` Gupta, Sourab
2014-04-01 5:22 ` Gupta, Sourab
2014-04-14 10:22 ` Gupta, Sourab
2014-05-26 10:33 ` Gupta, Sourab
2014-05-27 14:27 ` Damien Lespiau
2014-05-27 16:54 ` Daniel Vetter
-- strict thread matches above, loose matches on Subject: below --
2014-03-24 6:49 [PATCH 0/6] Rendering Specific HW Workarounds for VLV sourab.gupta
2014-03-24 6:49 ` [PATCH 4/6] drm/i915/vlv: Remove the enabling of VS_TIMER_DISPATCH bit in MI MODE reg sourab.gupta
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