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From: Paulo Zanoni <przanoni@gmail.com>
To: intel-gfx@lists.freedesktop.org
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: [PATCH 3/9] drm/i915: don't increment the FBC threshold at fbc_enable
Date: Tue, 23 Dec 2014 10:35:39 -0200	[thread overview]
Message-ID: <1419338145-1912-4-git-send-email-przanoni@gmail.com> (raw)
In-Reply-To: <1419338145-1912-1-git-send-email-przanoni@gmail.com>

From: Paulo Zanoni <paulo.r.zanoni@intel.com>

We first set the threshold value when we're allocating the CFB, and
then later at {ilk,gen7}_fbc_enable() we increment it in case we're
using 16bpp. While that is correct, it is dangerous: if we rework the
code a little bit in a way that allows us to call intel_fbc_enable()
without necessarily calling i915_gem_stolen_setup_compression() first,
we might end up incrementing threshold more than once. To prevent
that, increment a temporary variable instead.

We're going to need this patch for a later rework.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/intel_fbc.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
index 5270dc4..1b10b06 100644
--- a/drivers/gpu/drm/i915/intel_fbc.c
+++ b/drivers/gpu/drm/i915/intel_fbc.c
@@ -187,14 +187,15 @@ static void ilk_fbc_enable(struct drm_crtc *crtc)
 	struct drm_i915_gem_object *obj = intel_fb_obj(fb);
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	u32 dpfc_ctl;
+	int threshold = dev_priv->fbc.threshold;
 
 	dev_priv->fbc.enabled = true;
 
 	dpfc_ctl = DPFC_CTL_PLANE(intel_crtc->plane);
 	if (drm_format_plane_cpp(fb->pixel_format, 0) == 2)
-		dev_priv->fbc.threshold++;
+		threshold++;
 
-	switch (dev_priv->fbc.threshold) {
+	switch (threshold) {
 	case 4:
 	case 3:
 		dpfc_ctl |= DPFC_CTL_LIMIT_4X;
@@ -258,14 +259,15 @@ static void gen7_fbc_enable(struct drm_crtc *crtc)
 	struct drm_i915_gem_object *obj = intel_fb_obj(fb);
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	u32 dpfc_ctl;
+	int threshold = dev_priv->fbc.threshold;
 
 	dev_priv->fbc.enabled = true;
 
 	dpfc_ctl = IVB_DPFC_CTL_PLANE(intel_crtc->plane);
 	if (drm_format_plane_cpp(fb->pixel_format, 0) == 2)
-		dev_priv->fbc.threshold++;
+		threshold++;
 
-	switch (dev_priv->fbc.threshold) {
+	switch (threshold) {
 	case 4:
 	case 3:
 		dpfc_ctl |= DPFC_CTL_LIMIT_4X;
-- 
2.1.3

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  parent reply	other threads:[~2014-12-23 12:36 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-12-23 12:35 [PATCH 0/9] More simple FBC fixes Paulo Zanoni
2014-12-23 12:35 ` [PATCH 1/9] drm/i915: don't reallocate the compressed FB at every frame Paulo Zanoni
2014-12-23 12:35 ` [PATCH 2/9] drm/i915: fix the FBC CFB size tracking Paulo Zanoni
2014-12-25 10:16   ` Chris Wilson
2014-12-26 13:46     ` Paulo Zanoni
2014-12-26 13:53       ` Chris Wilson
2014-12-23 12:35 ` Paulo Zanoni [this message]
2014-12-23 12:35 ` [PATCH 4/9] drm/i915: don't free the CFB while FBC is enabled Paulo Zanoni
2014-12-25 10:20   ` Chris Wilson
2014-12-26 13:46     ` Paulo Zanoni
2014-12-26 13:55       ` Chris Wilson
2014-12-23 12:35 ` [PATCH 5/9] drm/i915: don't set the FBC plane select bits on HSW+ Paulo Zanoni
2015-01-05 15:40   ` Daniel Vetter
2014-12-23 12:35 ` [PATCH 6/9] drm/i915: add the FBC mutex Paulo Zanoni
2014-12-25 10:25   ` Chris Wilson
2014-12-26 13:46     ` Paulo Zanoni
2014-12-23 12:35 ` [PATCH 7/9] drm/i915: don't alloc/free fbc_work at every update Paulo Zanoni
2014-12-25 10:33   ` Chris Wilson
2014-12-26 13:49     ` Paulo Zanoni
2014-12-23 12:35 ` [PATCH 8/9] drm/i915: print FBC compression status on debugfs Paulo Zanoni
2014-12-23 12:35 ` [PATCH 9/9] drm/i915: FBC only supports 16bpp and 32bpp Paulo Zanoni

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