From: Daniel Vetter <daniel@ffwll.ch>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH 5/9] drm/i915: don't set the FBC plane select bits on HSW+
Date: Mon, 5 Jan 2015 16:40:40 +0100 [thread overview]
Message-ID: <20150105154040.GI2711@phenom.ffwll.local> (raw)
In-Reply-To: <1419338145-1912-6-git-send-email-przanoni@gmail.com>
On Tue, Dec 23, 2014 at 10:35:41AM -0200, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
>
> This commit is just to make the intentions explicit: on HSW+ these
> bits are MBZ, but since we only support plane A and the macro
> evaluates to zero when plane A is the parameter, we're not fixing any
> bug.
>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
> drivers/gpu/drm/i915/intel_fbc.c | 7 +++++--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
> index 83d3c8a..c6e688c 100644
> --- a/drivers/gpu/drm/i915/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/intel_fbc.c
> @@ -258,12 +258,15 @@ static void gen7_fbc_enable(struct drm_crtc *crtc)
> struct drm_framebuffer *fb = crtc->primary->fb;
> struct drm_i915_gem_object *obj = intel_fb_obj(fb);
> struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> - u32 dpfc_ctl;
> + u32 dpfc_ctl = 0;
> int threshold = dev_priv->fbc.threshold;
>
> dev_priv->fbc.enabled = true;
>
> - dpfc_ctl = IVB_DPFC_CTL_PLANE(intel_crtc->plane);
> +
> + if (IS_IVYBRIDGE(dev))
What about baytrail?
-Daniel
> + dpfc_ctl |= IVB_DPFC_CTL_PLANE(intel_crtc->plane);
> +
> if (drm_format_plane_cpp(fb->pixel_format, 0) == 2)
> threshold++;
>
> --
> 2.1.3
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
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next prev parent reply other threads:[~2015-01-05 15:40 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-23 12:35 [PATCH 0/9] More simple FBC fixes Paulo Zanoni
2014-12-23 12:35 ` [PATCH 1/9] drm/i915: don't reallocate the compressed FB at every frame Paulo Zanoni
2014-12-23 12:35 ` [PATCH 2/9] drm/i915: fix the FBC CFB size tracking Paulo Zanoni
2014-12-25 10:16 ` Chris Wilson
2014-12-26 13:46 ` Paulo Zanoni
2014-12-26 13:53 ` Chris Wilson
2014-12-23 12:35 ` [PATCH 3/9] drm/i915: don't increment the FBC threshold at fbc_enable Paulo Zanoni
2014-12-23 12:35 ` [PATCH 4/9] drm/i915: don't free the CFB while FBC is enabled Paulo Zanoni
2014-12-25 10:20 ` Chris Wilson
2014-12-26 13:46 ` Paulo Zanoni
2014-12-26 13:55 ` Chris Wilson
2014-12-23 12:35 ` [PATCH 5/9] drm/i915: don't set the FBC plane select bits on HSW+ Paulo Zanoni
2015-01-05 15:40 ` Daniel Vetter [this message]
2014-12-23 12:35 ` [PATCH 6/9] drm/i915: add the FBC mutex Paulo Zanoni
2014-12-25 10:25 ` Chris Wilson
2014-12-26 13:46 ` Paulo Zanoni
2014-12-23 12:35 ` [PATCH 7/9] drm/i915: don't alloc/free fbc_work at every update Paulo Zanoni
2014-12-25 10:33 ` Chris Wilson
2014-12-26 13:49 ` Paulo Zanoni
2014-12-23 12:35 ` [PATCH 8/9] drm/i915: print FBC compression status on debugfs Paulo Zanoni
2014-12-23 12:35 ` [PATCH 9/9] drm/i915: FBC only supports 16bpp and 32bpp Paulo Zanoni
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