* [PATCH i-g-t 2/5] assembler: fix spelling mistakes
2016-04-03 16:35 [PATCH i-g-t 1/5] README: fix spelling mistakes Eric Engestrom
@ 2016-04-03 16:35 ` Eric Engestrom
2016-04-03 16:35 ` [PATCH i-g-t 3/5] lib: " Eric Engestrom
` (2 subsequent siblings)
3 siblings, 0 replies; 6+ messages in thread
From: Eric Engestrom @ 2016-04-03 16:35 UTC (permalink / raw)
To: intel-gfx; +Cc: Eric Engestrom
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
---
assembler/brw_defines.h | 2 +-
assembler/brw_eu_compact.c | 2 +-
assembler/brw_eu_emit.c | 4 ++--
assembler/gen4asm.h | 4 ++--
4 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/assembler/brw_defines.h b/assembler/brw_defines.h
index 24e5e30..637b716 100644
--- a/assembler/brw_defines.h
+++ b/assembler/brw_defines.h
@@ -1239,7 +1239,7 @@ enum brw_message_target {
# define GEN6_CLIP_XY_TEST (1 << 28)
# define GEN6_CLIP_Z_TEST (1 << 27)
# define GEN6_CLIP_GB_TEST (1 << 26)
-/** 8-bit field of which user clip distances to clip aganist. */
+/** 8-bit field of which user clip distances to clip against. */
# define GEN6_USER_CLIP_CLIP_DISTANCES_SHIFT 16
# define GEN6_CLIP_MODE_NORMAL (0 << 13)
# define GEN6_CLIP_MODE_REJECT_ALL (3 << 13)
diff --git a/assembler/brw_eu_compact.c b/assembler/brw_eu_compact.c
index d362ed3..c747e0f 100644
--- a/assembler/brw_eu_compact.c
+++ b/assembler/brw_eu_compact.c
@@ -727,7 +727,7 @@ brw_compact_instructions(struct brw_compile *p)
dst = store + offset;
}
- /* If we didn't compact this intruction, we need to move it down into
+ /* If we didn't compact this instruction, we need to move it down into
* place.
*/
if (offset != src_offset) {
diff --git a/assembler/brw_eu_emit.c b/assembler/brw_eu_emit.c
index 23f0da5..1f51037 100644
--- a/assembler/brw_eu_emit.c
+++ b/assembler/brw_eu_emit.c
@@ -1164,7 +1164,7 @@ get_inner_do_insn(struct brw_compile *p)
*
* When the matching 'else' instruction is reached (presumably by
* countdown of the instruction count patched in by our ELSE/ENDIF
- * functions), the relevent flags are inverted.
+ * functions), the relevant flags are inverted.
*
* When the matching 'endif' instruction is reached, the flags are
* popped off. If the stack is now empty, normal execution resumes.
@@ -1431,7 +1431,7 @@ brw_ENDIF(struct brw_compile *p)
emit_endif = false;
/*
- * A single next_insn() may change the base adress of instruction store
+ * A single next_insn() may change the base address of instruction store
* memory(p->store), so call it first before referencing the instruction
* store pointer from an index
*/
diff --git a/assembler/gen4asm.h b/assembler/gen4asm.h
index 6b957e2..1e75126 100644
--- a/assembler/gen4asm.h
+++ b/assembler/gen4asm.h
@@ -173,9 +173,9 @@ static inline char *label_name(struct brw_program_instruction *i)
return i->insn.label.name;
}
-static inline bool is_relocatable(struct brw_program_instruction *intruction)
+static inline bool is_relocatable(struct brw_program_instruction *instruction)
{
- return intruction->type == GEN4ASM_INSTRUCTION_GEN_RELOCATABLE;
+ return instruction->type == GEN4ASM_INSTRUCTION_GEN_RELOCATABLE;
}
/**
--
2.8.0
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH i-g-t 3/5] lib: fix spelling mistakes
2016-04-03 16:35 [PATCH i-g-t 1/5] README: fix spelling mistakes Eric Engestrom
2016-04-03 16:35 ` [PATCH i-g-t 2/5] assembler: " Eric Engestrom
@ 2016-04-03 16:35 ` Eric Engestrom
2016-04-03 16:35 ` [PATCH i-g-t 4/5] tests: " Eric Engestrom
2016-04-03 16:35 ` [PATCH i-g-t 5/5] tools: " Eric Engestrom
3 siblings, 0 replies; 6+ messages in thread
From: Eric Engestrom @ 2016-04-03 16:35 UTC (permalink / raw)
To: intel-gfx; +Cc: Eric Engestrom
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
---
lib/gpgpu_fill.c | 4 ++--
lib/igt_aux.h | 2 +-
lib/igt_core.c | 6 +++---
lib/igt_core.h | 4 ++--
lib/intel_reg.h | 2 +-
lib/ioctl_wrappers.c | 2 +-
lib/media_fill_gen8.c | 2 +-
lib/media_fill_gen8lp.c | 2 +-
lib/media_fill_gen9.c | 2 +-
lib/media_spin.c | 4 ++--
lib/rendercopy_gen8.c | 2 +-
lib/rendercopy_gen9.c | 4 ++--
lib/tests/igt_segfault.c | 4 ++--
13 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/lib/gpgpu_fill.c b/lib/gpgpu_fill.c
index 4d98643..70d7ea3 100644
--- a/lib/gpgpu_fill.c
+++ b/lib/gpgpu_fill.c
@@ -398,7 +398,7 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
OUT_BATCH(1 << 12 | 1);
/* indirect object buffer size */
OUT_BATCH(0xfffff000 | 1);
- /* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
+ /* instruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
OUT_BATCH(1 << 12 | 1);
}
@@ -434,7 +434,7 @@ gen9_emit_state_base_address(struct intel_batchbuffer *batch)
OUT_BATCH(1 << 12 | 1);
/* indirect object buffer size */
OUT_BATCH(0xfffff000 | 1);
- /* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
+ /* instruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
OUT_BATCH(1 << 12 | 1);
/* Bindless surface state base address */
diff --git a/lib/igt_aux.h b/lib/igt_aux.h
index cdaed29..d4a4c74 100644
--- a/lib/igt_aux.h
+++ b/lib/igt_aux.h
@@ -71,7 +71,7 @@ void igt_cleanup_aperture_trashers(void);
void igt_system_suspend_autoresume(void);
void igt_system_hibernate_autoresume(void);
-/* dropping priviledges */
+/* dropping privileges */
void igt_drop_root(void);
void igt_debug_wait_for_keypress(const char *var);
diff --git a/lib/igt_core.c b/lib/igt_core.c
index 832361b..1123633 100644
--- a/lib/igt_core.c
+++ b/lib/igt_core.c
@@ -449,7 +449,7 @@ void __igt_fixture_end(void)
* running on Android they are sometimes killed by the Android low memory killer.
* This seems to be due to some incompatibility between the kswapd free memory
* targets and the way the lowmemorykiller assesses free memory.
- * The low memory killer really isn't usefull in this context and has no
+ * The low memory killer really isn't useful in this context and has no
* interaction with the gpu driver that we are testing, so the following
* function is used to disable it by modifying one of its module parameters.
* We still have the normal linux oom killer to protect the kernel.
@@ -490,7 +490,7 @@ static void low_mem_killer_disable(bool disable)
igt_assert(adj_scores_len > 0);
/* writing 9999 to this module parameter effectively diables the
- * low memory killer. This is not a real file, so we dont need to
+ * low memory killer. This is not a real file, so we don't need to
* seek to the start or truncate it */
igt_assert_eq(write(fd, no_lowmem_killer, sizeof(no_lowmem_killer)),
sizeof(no_lowmem_killer));
@@ -1645,7 +1645,7 @@ void igt_install_exit_handler(igt_exit_handler_t fn)
igt_assert_f(0, "failed to install the signal handler\n");
}
-/* simulation enviroment support */
+/* simulation environment support */
/**
* igt_run_in_simulation:
diff --git a/lib/igt_core.h b/lib/igt_core.h
index b3fa735..78dc74f 100644
--- a/lib/igt_core.h
+++ b/lib/igt_core.h
@@ -768,7 +768,7 @@ extern enum igt_log_level igt_log_level;
*/
#define igt_warn_on(condition) do {\
if (condition) \
- igt_warn("Warning on condition %s in fucntion %s, file %s:%i\n", \
+ igt_warn("Warning on condition %s in function %s, file %s:%i\n", \
#condition, __func__, __FILE__, __LINE__); \
} while (0)
@@ -790,7 +790,7 @@ extern enum igt_log_level igt_log_level;
*/
#define igt_warn_on_f(condition, f...) do {\
if (condition) {\
- igt_warn("Warning on condition %s in fucntion %s, file %s:%i\n", \
+ igt_warn("Warning on condition %s in function %s, file %s:%i\n", \
#condition, __func__, __FILE__, __LINE__); \
igt_warn(f); \
} \
diff --git a/lib/intel_reg.h b/lib/intel_reg.h
index 0ffa803..6104623 100644
--- a/lib/intel_reg.h
+++ b/lib/intel_reg.h
@@ -246,7 +246,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* not sure they refer to local (graphics) memory.
*
* These details are for the local memory control registers,
- * (pp301-310). The test machines are not equiped with local memory,
+ * (pp301-310). The test machines are not equipped with local memory,
* so nothing is tested. Only a single row seems to be supported.
*/
#define DRAM_ROW_TYPE 0x3000
diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
index 076bce8..5ac5701 100644
--- a/lib/ioctl_wrappers.c
+++ b/lib/ioctl_wrappers.c
@@ -385,7 +385,7 @@ void gem_set_domain(int fd, uint32_t handle,
* @handle: gem buffer object handle
* @timeout_ns: [in] time to wait, [out] remaining time (in nanoseconds)
*
- * This functions waits for outstanding rendering to complete, upto
+ * This functions waits for outstanding rendering to complete, up to
* the timeout_ns. If no timeout_ns is provided, the wait is indefinite and
* only returns upon an error or when the rendering is complete.
*/
diff --git a/lib/media_fill_gen8.c b/lib/media_fill_gen8.c
index 4a8fe5a..074dbe9 100644
--- a/lib/media_fill_gen8.c
+++ b/lib/media_fill_gen8.c
@@ -223,7 +223,7 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
OUT_BATCH(1 << 12 | 1);
/* indirect object buffer size */
OUT_BATCH(0xfffff000 | 1);
- /* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
+ /* instruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
OUT_BATCH(1 << 12 | 1);
}
diff --git a/lib/media_fill_gen8lp.c b/lib/media_fill_gen8lp.c
index 1f8a4ad..963f6aa 100644
--- a/lib/media_fill_gen8lp.c
+++ b/lib/media_fill_gen8lp.c
@@ -223,7 +223,7 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
OUT_BATCH(1 << 12 | 1);
/* indirect object buffer size */
OUT_BATCH(0xfffff000 | 1);
- /* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
+ /* instruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
OUT_BATCH(1 << 12 | 1);
}
diff --git a/lib/media_fill_gen9.c b/lib/media_fill_gen9.c
index 3fd2181..becb3b7 100644
--- a/lib/media_fill_gen9.c
+++ b/lib/media_fill_gen9.c
@@ -223,7 +223,7 @@ gen9_emit_state_base_address(struct intel_batchbuffer *batch)
OUT_BATCH(1 << 12 | 1);
/* indirect object buffer size */
OUT_BATCH(0xfffff000 | 1);
- /* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
+ /* instruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
OUT_BATCH(1 << 12 | 1);
/* Bindless surface state base address */
diff --git a/lib/media_spin.c b/lib/media_spin.c
index 580c109..81c71fd 100644
--- a/lib/media_spin.c
+++ b/lib/media_spin.c
@@ -249,7 +249,7 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
OUT_BATCH(1 << 12 | 1);
/* indirect object buffer size */
OUT_BATCH(0xfffff000 | 1);
- /* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
+ /* instruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
OUT_BATCH(1 << 12 | 1);
}
@@ -285,7 +285,7 @@ gen9_emit_state_base_address(struct intel_batchbuffer *batch)
OUT_BATCH(1 << 12 | 1);
/* indirect object buffer size */
OUT_BATCH(0xfffff000 | 1);
- /* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
+ /* instruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
OUT_BATCH(1 << 12 | 1);
/* Bindless surface state base address */
diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c
index a7fc2c4..a8ccddc 100644
--- a/lib/rendercopy_gen8.c
+++ b/lib/rendercopy_gen8.c
@@ -552,7 +552,7 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch) {
OUT_BATCH(1 << 12 | 1);
/* indirect object buffer size */
OUT_BATCH(0xfffff000 | 1);
- /* intruction buffer size */
+ /* instruction buffer size */
OUT_BATCH(1 << 12 | 1);
}
diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c
index 9537480..aa60494 100644
--- a/lib/rendercopy_gen9.c
+++ b/lib/rendercopy_gen9.c
@@ -513,7 +513,7 @@ static void
gen9_emit_state_base_address(struct intel_batchbuffer *batch) {
/* WaBindlessSurfaceStateModifyEnable:skl,bxt */
- /* The length has to be one less if we dont modify
+ /* The length has to be one less if we don't modify
bindless state */
OUT_BATCH(GEN6_STATE_BASE_ADDRESS | (19 - 1 - 2));
@@ -544,7 +544,7 @@ gen9_emit_state_base_address(struct intel_batchbuffer *batch) {
OUT_BATCH(1 << 12 | 1);
/* indirect object buffer size */
OUT_BATCH(0xfffff000 | 1);
- /* intruction buffer size */
+ /* instruction buffer size */
OUT_BATCH(1 << 12 | 1);
/* Bindless surface state base address */
diff --git a/lib/tests/igt_segfault.c b/lib/tests/igt_segfault.c
index d07677d..0fe02c3 100644
--- a/lib/tests/igt_segfault.c
+++ b/lib/tests/igt_segfault.c
@@ -31,7 +31,7 @@
* 1. Test a crashing simple test is reported.
* 2. Test a crashing subtest is reported.
* 3. Test a crashing subtest following a passing subtest is reported.
- * 4. Test a crashing subtest preceeding a passing subtest is reported.
+ * 4. Test a crashing subtest preceding a passing subtest is reported.
*/
#include <signal.h>
@@ -131,7 +131,7 @@ int main(int argc, char **argv)
fflush(stdout);
internal_assert(do_fork() == SIGSEGV + 128);
- /* Test crash in a subtest preceeding a pass is reported */
+ /* Test crash in a subtest preceding a pass is reported */
simple = false;
runa=false;
runc=true;
--
2.8.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH i-g-t 4/5] tests: fix spelling mistakes
2016-04-03 16:35 [PATCH i-g-t 1/5] README: fix spelling mistakes Eric Engestrom
2016-04-03 16:35 ` [PATCH i-g-t 2/5] assembler: " Eric Engestrom
2016-04-03 16:35 ` [PATCH i-g-t 3/5] lib: " Eric Engestrom
@ 2016-04-03 16:35 ` Eric Engestrom
2016-04-04 9:49 ` Dave Gordon
2016-04-03 16:35 ` [PATCH i-g-t 5/5] tools: " Eric Engestrom
3 siblings, 1 reply; 6+ messages in thread
From: Eric Engestrom @ 2016-04-03 16:35 UTC (permalink / raw)
To: intel-gfx; +Cc: Eric Engestrom
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
---
tests/gem_concurrent_all.c | 2 +-
tests/gem_cpu_reloc.c | 2 +-
tests/gem_flink_race.c | 2 +-
tests/gem_seqno_wrap.c | 2 +-
tests/gem_tiled_wb.c | 2 +-
tests/prime_nv_api.c | 2 +-
tests/prime_nv_pcopy.c | 2 +-
tests/prime_self_import.c | 4 ++--
8 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/tests/gem_concurrent_all.c b/tests/gem_concurrent_all.c
index 10e5357..688eecb 100644
--- a/tests/gem_concurrent_all.c
+++ b/tests/gem_concurrent_all.c
@@ -1530,7 +1530,7 @@ run_mode(const char *prefix,
p->copy, h->hang);
}
- /* and finally try to trick the kernel into loosing the pending write */
+ /* and finally try to trick the kernel into losing the pending write */
igt_subtest_f("%s-%s-%s-gpu-read-after-write%s%s", prefix, mode->name, p->prefix, suffix, h->suffix) {
buffers_create(&buffers);
run_wrap_func(&buffers,
diff --git a/tests/gem_cpu_reloc.c b/tests/gem_cpu_reloc.c
index 520030a..7324c4c 100644
--- a/tests/gem_cpu_reloc.c
+++ b/tests/gem_cpu_reloc.c
@@ -232,7 +232,7 @@ static void run_test(int fd, int count)
igt_progress("gem_cpu_reloc: ", 2*count+i, 3*count);
}
- igt_info("Subtest suceeded, cleanup up - this might take a while.\n");
+ igt_info("Subtest succeeded, cleanup up - this might take a while.\n");
for (i = 0; i < count; i++) {
gem_close(fd, handles[i]);
}
diff --git a/tests/gem_flink_race.c b/tests/gem_flink_race.c
index 30e33f6..5937bc0 100644
--- a/tests/gem_flink_race.c
+++ b/tests/gem_flink_race.c
@@ -143,7 +143,7 @@ static void test_flink_close(void)
void *status;
int fake;
- /* Allocate exit handler fds in here so that we dont screw
+ /* Allocate exit handler fds in here so that we don't screw
* up the counts */
fake = drm_open_driver(DRIVER_INTEL);
diff --git a/tests/gem_seqno_wrap.c b/tests/gem_seqno_wrap.c
index f6320f4..e4a6277 100644
--- a/tests/gem_seqno_wrap.c
+++ b/tests/gem_seqno_wrap.c
@@ -485,7 +485,7 @@ int main(int argc, char **argv)
" -t --timeout=sec set timeout to wait for testrun to sec seconds\n"
" -d --dontwrap don't wrap just run the test\n"
" -p --prewrap=n set seqno to WRAP - n for each testrun\n"
- " -r --norandom dont randomize prewrap space\n"
+ " -r --norandom don't randomize prewrap space\n"
" -i --buffers number of buffers to copy\n";
options.rounds = SLOW_QUICK(50, 2);
diff --git a/tests/gem_tiled_wb.c b/tests/gem_tiled_wb.c
index 67d54bd..2919736 100644
--- a/tests/gem_tiled_wb.c
+++ b/tests/gem_tiled_wb.c
@@ -68,7 +68,7 @@ create_bo(int fd)
handle = gem_create(fd, SIZE);
gem_set_tiling(fd, handle, I915_TILING_X, WIDTH * sizeof(uint32_t));
- /* Write throught the fence to tiled the data.
+ /* Write through the fence to tile the data.
* We then manually detile on reading back through the mmap(wc).
*/
data = gem_mmap__gtt(fd, handle, SIZE, PROT_READ | PROT_WRITE);
diff --git a/tests/prime_nv_api.c b/tests/prime_nv_api.c
index 054a1ec..6bf891a 100644
--- a/tests/prime_nv_api.c
+++ b/tests/prime_nv_api.c
@@ -1,4 +1,4 @@
-/* wierd use of API tests */
+/* weird use of API tests */
/* test1- export buffer from intel, import same fd twice into nouveau,
check handles match
diff --git a/tests/prime_nv_pcopy.c b/tests/prime_nv_pcopy.c
index b5ceabf..99eaeea 100644
--- a/tests/prime_nv_pcopy.c
+++ b/tests/prime_nv_pcopy.c
@@ -673,7 +673,7 @@ static void check3(const uint32_t *p, uint32_t pitch, uint32_t lines,
}
}
-/* copy from nvidia bo to intel bo and copy to a linear bo to check if tiling went succesful */
+/* copy from nvidia bo to intel bo and copy to a linear bo to check if tiling went successful */
static void test3_base(int tile_src, int tile_dst)
{
struct nouveau_bo *bo_intel = NULL, *bo_nvidia = NULL, *bo_linear = NULL;
diff --git a/tests/prime_self_import.c b/tests/prime_self_import.c
index 992334d..5ec0baa 100644
--- a/tests/prime_self_import.c
+++ b/tests/prime_self_import.c
@@ -239,7 +239,7 @@ static void test_reimport_close_race(void)
uint32_t handle;
int fake;
- /* Allocate exit handler fds in here so that we dont screw
+ /* Allocate exit handler fds in here so that we don't screw
* up the counts */
fake = drm_open_driver(DRIVER_INTEL);
@@ -329,7 +329,7 @@ static void test_export_close_race(void)
threads = calloc(num_threads, sizeof(pthread_t));
- /* Allocate exit handler fds in here so that we dont screw
+ /* Allocate exit handler fds in here so that we don't screw
* up the counts */
fake = drm_open_driver(DRIVER_INTEL);
--
2.8.0
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH i-g-t 4/5] tests: fix spelling mistakes
2016-04-03 16:35 ` [PATCH i-g-t 4/5] tests: " Eric Engestrom
@ 2016-04-04 9:49 ` Dave Gordon
0 siblings, 0 replies; 6+ messages in thread
From: Dave Gordon @ 2016-04-04 9:49 UTC (permalink / raw)
To: Eric Engestrom, intel-gfx
On 03/04/16 17:35, Eric Engestrom wrote:
> Signed-off-by: Eric Engestrom <eric@engestrom.ch>
> ---
> tests/gem_concurrent_all.c | 2 +-
> tests/gem_cpu_reloc.c | 2 +-
> tests/gem_flink_race.c | 2 +-
> tests/gem_seqno_wrap.c | 2 +-
> tests/gem_tiled_wb.c | 2 +-
> tests/prime_nv_api.c | 2 +-
> tests/prime_nv_pcopy.c | 2 +-
> tests/prime_self_import.c | 4 ++--
> 8 files changed, 9 insertions(+), 9 deletions(-)
[snip]
> diff --git a/tests/prime_nv_api.c b/tests/prime_nv_api.c
> index 054a1ec..6bf891a 100644
> --- a/tests/prime_nv_api.c
> +++ b/tests/prime_nv_api.c
> @@ -1,4 +1,4 @@
> -/* wierd use of API tests */
> +/* weird use of API tests */
>
> /* test1- export buffer from intel, import same fd twice into nouveau,
> check handles match
> diff --git a/tests/prime_nv_pcopy.c b/tests/prime_nv_pcopy.c
> index b5ceabf..99eaeea 100644
> --- a/tests/prime_nv_pcopy.c
> +++ b/tests/prime_nv_pcopy.c
> @@ -673,7 +673,7 @@ static void check3(const uint32_t *p, uint32_t pitch, uint32_t lines,
> }
> }
>
> -/* copy from nvidia bo to intel bo and copy to a linear bo to check if tiling went succesful */
> +/* copy from nvidia bo to intel bo and copy to a linear bo to check if tiling went successful */
Might as well correct the grammar here too - I'd suggest "was
successful", or else "went successfully", but the latter still seems
rather clumsy.
Apart from that, they all look good, so
Reviewed-by: Dave Gordon <david.s.gordon@intel.com>
IIRC there's a tool ("codespell"?) that can help find these typos;
perhaps it would be worth adding the most recurrent of them (e,g,
intruction->instruction) to the dictionary?
.Dave.
PS: Found the tool: https://github.com/lucasdemarchi/codespell
Dictionary is /usr/share/codespell/dictionary.txt
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* [PATCH i-g-t 5/5] tools: fix spelling mistakes
2016-04-03 16:35 [PATCH i-g-t 1/5] README: fix spelling mistakes Eric Engestrom
` (2 preceding siblings ...)
2016-04-03 16:35 ` [PATCH i-g-t 4/5] tests: " Eric Engestrom
@ 2016-04-03 16:35 ` Eric Engestrom
3 siblings, 0 replies; 6+ messages in thread
From: Eric Engestrom @ 2016-04-03 16:35 UTC (permalink / raw)
To: intel-gfx; +Cc: Eric Engestrom
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
---
tools/intel_audio_dump.c | 14 +++++++-------
tools/intel_bios.h | 6 +++---
tools/intel_display_poller.c | 2 +-
tools/intel_dump_decode.c | 2 +-
tools/intel_opregion_decode.c | 2 +-
tools/null_state_gen/intel_renderstate_gen7.c | 2 +-
tools/null_state_gen/intel_renderstate_gen8.c | 2 +-
tools/null_state_gen/intel_renderstate_gen9.c | 2 +-
8 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/tools/intel_audio_dump.c b/tools/intel_audio_dump.c
index 8c24230..be6a1ea 100644
--- a/tools/intel_audio_dump.c
+++ b/tools/intel_audio_dump.c
@@ -318,8 +318,8 @@ static const char * const dis_eld_valid_pulse_trans[] = {
};
static const char * const dis_pd_pulse_trans[] = {
- [0] = "Enable Presense Detect pulse transition when unsol is disabled",
- [1] = "Disable Presense Detect pulse transition when unsol is disabled",
+ [0] = "Enable Presence Detect pulse transition when unsol is disabled",
+ [1] = "Disable Presence Detect pulse transition when unsol is disabled",
};
static const char * const dis_ts_delta_err[] = {
@@ -2154,11 +2154,11 @@ static void dump_hsw_plus(void)
dump_reg(DISPLAY_HOTPLUG_CTL, "display hotplug control");
/* HSW DDI Buffer */
- dump_reg(DDI_BUF_CTL_A, "DDI Buffer Controler A");
- dump_reg(DDI_BUF_CTL_B, "DDI Buffer Controler B");
- dump_reg(DDI_BUF_CTL_C, "DDI Buffer Controler C");
- dump_reg(DDI_BUF_CTL_D, "DDI Buffer Controler D");
- dump_reg(DDI_BUF_CTL_E, "DDI Buffer Controler E");
+ dump_reg(DDI_BUF_CTL_A, "DDI Buffer Controller A");
+ dump_reg(DDI_BUF_CTL_B, "DDI Buffer Controller B");
+ dump_reg(DDI_BUF_CTL_C, "DDI Buffer Controller C");
+ dump_reg(DDI_BUF_CTL_D, "DDI Buffer Controller D");
+ dump_reg(DDI_BUF_CTL_E, "DDI Buffer Controller E");
/* HSW Pipe Function */
dump_reg(PIPE_CONF_A, "PIPE Configuration A");
diff --git a/tools/intel_bios.h b/tools/intel_bios.h
index b7ebd48..288cb56 100644
--- a/tools/intel_bios.h
+++ b/tools/intel_bios.h
@@ -796,16 +796,16 @@ enum mipi_seq_element {
* GR18 & SWF*.
*
* The VBIOS/firmware will signal to the gfx driver through the ASLE interrupt
- * (visible in the interupt regs at bit 0) when it wants something done.
+ * (visible in the interrupt regs at bit 0) when it wants something done.
*
* Pre-965:
* The gfx driver can make calls to the VBIOS/firmware through an SMI request,
* generated by writing to offset 0xe0 of the device's config space (see the
- * publically available 915 PRM for details).
+ * publicly available 915 PRM for details).
*
* 965 and above:
* IGD OpRegion requests to the VBIOS/firmware are made using SWSCI, which can
- * be triggered by writing to offset 0xe4 (see the publically available
+ * be triggered by writing to offset 0xe4 (see the publicly available
* 965 graphics PRM for details).
*/
diff --git a/tools/intel_display_poller.c b/tools/intel_display_poller.c
index eab17c5..9460358 100644
--- a/tools/intel_display_poller.c
+++ b/tools/intel_display_poller.c
@@ -1051,7 +1051,7 @@ int main(int argc, char *argv[])
/*
* check if the requires registers are
- * avilable on the current platform.
+ * available on the current platform.
*/
if (IS_GEN2(devid)) {
if (pipe > 1)
diff --git a/tools/intel_dump_decode.c b/tools/intel_dump_decode.c
index 0341aad..c20f5b6 100644
--- a/tools/intel_dump_decode.c
+++ b/tools/intel_dump_decode.c
@@ -185,7 +185,7 @@ main (int argc, char *argv[])
binary = 0;
break;
default:
- printf("unkown command options\n");
+ printf("unknown command options\n");
break;
}
}
diff --git a/tools/intel_opregion_decode.c b/tools/intel_opregion_decode.c
index c65828a..d228d30 100644
--- a/tools/intel_opregion_decode.c
+++ b/tools/intel_opregion_decode.c
@@ -404,7 +404,7 @@ int main(int argc, char *argv[])
filename = optarg;
break;
default:
- fprintf(stderr, "unkown command options\n");
+ fprintf(stderr, "unknown command options\n");
return 1;
}
}
diff --git a/tools/null_state_gen/intel_renderstate_gen7.c b/tools/null_state_gen/intel_renderstate_gen7.c
index df20bc2..6b2850f 100644
--- a/tools/null_state_gen/intel_renderstate_gen7.c
+++ b/tools/null_state_gen/intel_renderstate_gen7.c
@@ -131,7 +131,7 @@ static void
gen7_emit_drawing_rectangle(struct intel_batchbuffer *batch)
{
OUT_BATCH(GEN7_3DSTATE_DRAWING_RECTANGLE | (4 - 2));
- /* Purposedly set min > max for null rectangle */
+ /* Purposely set min > max for null rectangle */
OUT_BATCH(0xffffffff);
OUT_BATCH(0 | 0);
OUT_BATCH(0);
diff --git a/tools/null_state_gen/intel_renderstate_gen8.c b/tools/null_state_gen/intel_renderstate_gen8.c
index 6a309d4..b3a9be0 100644
--- a/tools/null_state_gen/intel_renderstate_gen8.c
+++ b/tools/null_state_gen/intel_renderstate_gen8.c
@@ -183,7 +183,7 @@ static void gen8_emit_state_base_address(struct intel_batchbuffer *batch) {
OUT_BATCH(GEN8_STATE_SIZE_PAGES(1) | BUFFER_SIZE_MODIFY);
/* indirect object buffer size */
OUT_BATCH(0 | BUFFER_SIZE_MODIFY);
- /* intruction buffer size */
+ /* instruction buffer size */
OUT_BATCH(GEN8_STATE_SIZE_PAGES(1) | BUFFER_SIZE_MODIFY);
}
diff --git a/tools/null_state_gen/intel_renderstate_gen9.c b/tools/null_state_gen/intel_renderstate_gen9.c
index a0b7d8a..2671876 100644
--- a/tools/null_state_gen/intel_renderstate_gen9.c
+++ b/tools/null_state_gen/intel_renderstate_gen9.c
@@ -328,7 +328,7 @@ static void gen9_emit_state_base_address(struct intel_batchbuffer *batch) {
OUT_BATCH(GEN8_STATE_SIZE_PAGES(1) | BUFFER_SIZE_MODIFY);
/* indirect object buffer size */
OUT_BATCH(0x0 | BUFFER_SIZE_MODIFY);
- /* intruction buffer size */
+ /* instruction buffer size */
OUT_BATCH(GEN8_STATE_SIZE_PAGES(1) | BUFFER_SIZE_MODIFY);
/* bindless surface state base address */
--
2.8.0
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