* [PATCH] drm/i915/gen9: implement WaEnableSamplerGPGPUPreemptionSupport
@ 2016-04-06 9:28 tim.gore
2016-04-06 10:28 ` ✗ Fi.CI.BAT: failure for " Patchwork
0 siblings, 1 reply; 6+ messages in thread
From: tim.gore @ 2016-04-06 9:28 UTC (permalink / raw)
To: intel-gfx
From: Tim Gore <tim.gore@intel.com>
WaEnableSamplerGPGPUPreemptionSupport fixes a problem
related to mid thread pre-emption.
Signed-off-by: Tim Gore <tim.gore@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_ringbuffer.c | 7 ++++---
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 30fea34..de83914 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7142,6 +7142,7 @@ enum skl_disp_power_wells {
#define GEN9_HALF_SLICE_CHICKEN7 _MMIO(0xe194)
#define GEN9_ENABLE_YV12_BUGFIX (1<<4)
+#define GEN9_ENABLE_GPGPU_PREEMPTION (1<<2)
/* Audio */
#define G4X_AUD_VID_DID _MMIO(dev_priv->info.display_mmio_offset + 0x62020)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 2e864b7..0b4f582 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -959,9 +959,10 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
}
/* WaEnableYV12BugFixInHalfSliceChicken7:skl,bxt */
- if (IS_SKL_REVID(dev, SKL_REVID_C0, REVID_FOREVER) || IS_BROXTON(dev))
- WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7,
- GEN9_ENABLE_YV12_BUGFIX);
+ /* WaEnableSamplerGPGPUPreemptionSupport:skl,bxt */
+ WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7,
+ GEN9_ENABLE_YV12_BUGFIX |
+ GEN9_ENABLE_GPGPU_PREEMPTION);
/* Wa4x4STCOptimizationDisable:skl,bxt */
/* WaDisablePartialResolveInVc:skl,bxt */
--
1.9.1
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^ permalink raw reply related [flat|nested] 6+ messages in thread
* ✗ Fi.CI.BAT: failure for drm/i915/gen9: implement WaEnableSamplerGPGPUPreemptionSupport
2016-04-06 9:28 [PATCH] drm/i915/gen9: implement WaEnableSamplerGPGPUPreemptionSupport tim.gore
@ 2016-04-06 10:28 ` Patchwork
0 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2016-04-06 10:28 UTC (permalink / raw)
To: tim.gore; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/gen9: implement WaEnableSamplerGPGPUPreemptionSupport
URL : https://patchwork.freedesktop.org/series/5367/
State : failure
== Summary ==
Series 5367v1 drm/i915/gen9: implement WaEnableSamplerGPGPUPreemptionSupport
http://patchwork.freedesktop.org/api/1.0/series/5367/revisions/1/mbox/
Test drv_hangman:
Subgroup error-state-basic:
pass -> DMESG-WARN (ilk-hp8440p)
Test gem_exec_store:
Subgroup basic-all:
pass -> FAIL (ilk-hp8440p)
Subgroup basic-default:
pass -> FAIL (ilk-hp8440p)
Test gem_exec_suspend:
Subgroup basic-s3:
pass -> SKIP (ilk-hp8440p)
Test gem_sync:
Subgroup basic-all:
dmesg-fail -> PASS (bsw-nuc-2)
Test kms_force_connector_basic:
Subgroup force-load-detect:
pass -> DMESG-WARN (ilk-hp8440p)
Subgroup prune-stale-modes:
skip -> PASS (ivb-t430s)
Test kms_frontbuffer_tracking:
Subgroup basic:
skip -> DMESG-FAIL (ilk-hp8440p)
Test kms_pipe_crc_basic:
Subgroup bad-nb-words-1:
pass -> DMESG-WARN (ilk-hp8440p)
Subgroup nonblocking-crc-pipe-a-frame-sequence:
pass -> DMESG-FAIL (ilk-hp8440p)
Subgroup nonblocking-crc-pipe-b-frame-sequence:
pass -> DMESG-FAIL (ilk-hp8440p)
Subgroup read-crc-pipe-b-frame-sequence:
pass -> DMESG-FAIL (ilk-hp8440p)
Subgroup suspend-read-crc-pipe-c:
dmesg-warn -> PASS (bsw-nuc-2)
Test pm_rpm:
Subgroup basic-rte:
pass -> DMESG-WARN (byt-nuc) UNSTABLE
bdw-nuci7 total:196 pass:184 dwarn:0 dfail:0 fail:0 skip:12
bdw-ultra total:196 pass:175 dwarn:0 dfail:0 fail:0 skip:21
bsw-nuc-2 total:196 pass:159 dwarn:0 dfail:0 fail:0 skip:37
byt-nuc total:196 pass:160 dwarn:1 dfail:0 fail:0 skip:35
hsw-brixbox total:196 pass:174 dwarn:0 dfail:0 fail:0 skip:22
hsw-gt2 total:196 pass:179 dwarn:0 dfail:0 fail:0 skip:17
ilk-hp8440p total:196 pass:122 dwarn:4 dfail:4 fail:2 skip:64
ivb-t430s total:196 pass:171 dwarn:0 dfail:0 fail:0 skip:25
skl-i7k-2 total:196 pass:173 dwarn:0 dfail:0 fail:0 skip:23
skl-nuci5 total:196 pass:185 dwarn:0 dfail:0 fail:0 skip:11
snb-dellxps total:196 pass:162 dwarn:0 dfail:0 fail:0 skip:34
snb-x220t total:196 pass:162 dwarn:0 dfail:0 fail:1 skip:33
Results at /archive/results/CI_IGT_test/Patchwork_1814/
12899f13b8ee9a4944f167a08e4db0526a3f3855 drm-intel-nightly: 2016y-04m-05d-19h-09m-25s UTC integration manifest
cdf6759e25b45b399c499b67d054ac48cb5d6774 drm/i915/gen9: implement WaEnableSamplerGPGPUPreemptionSupport
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH] drm/i915/gen9: implement WaEnableSamplerGPGPUPreemptionSupport
@ 2016-04-07 9:38 tim.gore
0 siblings, 0 replies; 6+ messages in thread
From: tim.gore @ 2016-04-07 9:38 UTC (permalink / raw)
To: intel-gfx
From: Tim Gore <tim.gore@intel.com>
WaEnableSamplerGPGPUPreemptionSupport fixes a problem
related to mid thread pre-emption.
Signed-off-by: Tim Gore <tim.gore@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_ringbuffer.c | 7 ++++---
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 30fea34..de83914 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7142,6 +7142,7 @@ enum skl_disp_power_wells {
#define GEN9_HALF_SLICE_CHICKEN7 _MMIO(0xe194)
#define GEN9_ENABLE_YV12_BUGFIX (1<<4)
+#define GEN9_ENABLE_GPGPU_PREEMPTION (1<<2)
/* Audio */
#define G4X_AUD_VID_DID _MMIO(dev_priv->info.display_mmio_offset + 0x62020)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 2e864b7..0b4f582 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -959,9 +959,10 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
}
/* WaEnableYV12BugFixInHalfSliceChicken7:skl,bxt */
- if (IS_SKL_REVID(dev, SKL_REVID_C0, REVID_FOREVER) || IS_BROXTON(dev))
- WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7,
- GEN9_ENABLE_YV12_BUGFIX);
+ /* WaEnableSamplerGPGPUPreemptionSupport:skl,bxt */
+ WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7,
+ GEN9_ENABLE_YV12_BUGFIX |
+ GEN9_ENABLE_GPGPU_PREEMPTION);
/* Wa4x4STCOptimizationDisable:skl,bxt */
/* WaDisablePartialResolveInVc:skl,bxt */
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH] drm/i915/gen9: implement WaEnableSamplerGPGPUPreemptionSupport
@ 2016-04-12 14:22 tim.gore
0 siblings, 0 replies; 6+ messages in thread
From: tim.gore @ 2016-04-12 14:22 UTC (permalink / raw)
To: intel-gfx
From: Tim Gore <tim.gore@intel.com>
WaEnableSamplerGPGPUPreemptionSupport fixes a problem
related to mid thread pre-emption.
Signed-off-by: Tim Gore <tim.gore@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_ringbuffer.c | 7 ++++---
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index cea5a39..ff83c64 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7161,6 +7161,7 @@ enum skl_disp_power_wells {
#define GEN9_HALF_SLICE_CHICKEN7 _MMIO(0xe194)
#define GEN9_ENABLE_YV12_BUGFIX (1<<4)
+#define GEN9_ENABLE_GPGPU_PREEMPTION (1<<2)
/* Audio */
#define G4X_AUD_VID_DID _MMIO(dev_priv->info.display_mmio_offset + 0x62020)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 41b604e..c2603f7 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -959,9 +959,10 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
}
/* WaEnableYV12BugFixInHalfSliceChicken7:skl,bxt */
- if (IS_SKL_REVID(dev, SKL_REVID_C0, REVID_FOREVER) || IS_BROXTON(dev))
- WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7,
- GEN9_ENABLE_YV12_BUGFIX);
+ /* WaEnableSamplerGPGPUPreemptionSupport:skl,bxt */
+ WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7,
+ GEN9_ENABLE_YV12_BUGFIX |
+ GEN9_ENABLE_GPGPU_PREEMPTION);
/* Wa4x4STCOptimizationDisable:skl,bxt */
/* WaDisablePartialResolveInVc:skl,bxt */
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH] drm/i915/gen9: implement WaEnableSamplerGPGPUPreemptionSupport
@ 2016-04-19 14:45 tim.gore
2016-04-19 16:17 ` Dave Gordon
0 siblings, 1 reply; 6+ messages in thread
From: tim.gore @ 2016-04-19 14:45 UTC (permalink / raw)
To: intel-gfx
From: Tim Gore <tim.gore@intel.com>
WaEnableSamplerGPGPUPreemptionSupport fixes a problem
related to mid thread pre-emption.
Signed-off-by: Tim Gore <tim.gore@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_ringbuffer.c | 7 ++++---
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 9464ba3..2982470b 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7162,6 +7162,7 @@ enum skl_disp_power_wells {
#define GEN9_HALF_SLICE_CHICKEN7 _MMIO(0xe194)
#define GEN9_ENABLE_YV12_BUGFIX (1<<4)
+#define GEN9_ENABLE_GPGPU_PREEMPTION (1<<2)
/* Audio */
#define G4X_AUD_VID_DID _MMIO(dev_priv->info.display_mmio_offset + 0x62020)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 0d24494..444d30a 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -959,9 +959,10 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
}
/* WaEnableYV12BugFixInHalfSliceChicken7:skl,bxt */
- if (IS_SKL_REVID(dev, SKL_REVID_C0, REVID_FOREVER) || IS_BROXTON(dev))
- WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7,
- GEN9_ENABLE_YV12_BUGFIX);
+ /* WaEnableSamplerGPGPUPreemptionSupport:skl,bxt */
+ WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7,
+ GEN9_ENABLE_YV12_BUGFIX |
+ GEN9_ENABLE_GPGPU_PREEMPTION);
/* Wa4x4STCOptimizationDisable:skl,bxt */
/* WaDisablePartialResolveInVc:skl,bxt */
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/gen9: implement WaEnableSamplerGPGPUPreemptionSupport
2016-04-19 14:45 tim.gore
@ 2016-04-19 16:17 ` Dave Gordon
0 siblings, 0 replies; 6+ messages in thread
From: Dave Gordon @ 2016-04-19 16:17 UTC (permalink / raw)
To: tim.gore, intel-gfx
On 19/04/16 15:45, tim.gore@intel.com wrote:
> From: Tim Gore <tim.gore@intel.com>
>
> WaEnableSamplerGPGPUPreemptionSupport fixes a problem
> related to mid thread pre-emption.
>
> Signed-off-by: Tim Gore <tim.gore@intel.com>
Reviewed-by: Dave Gordon <david.s.gordon@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> drivers/gpu/drm/i915/intel_ringbuffer.c | 7 ++++---
> 2 files changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 9464ba3..2982470b 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7162,6 +7162,7 @@ enum skl_disp_power_wells {
>
> #define GEN9_HALF_SLICE_CHICKEN7 _MMIO(0xe194)
> #define GEN9_ENABLE_YV12_BUGFIX (1<<4)
> +#define GEN9_ENABLE_GPGPU_PREEMPTION (1<<2)
>
> /* Audio */
> #define G4X_AUD_VID_DID _MMIO(dev_priv->info.display_mmio_offset + 0x62020)
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 0d24494..444d30a 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -959,9 +959,10 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
> }
>
> /* WaEnableYV12BugFixInHalfSliceChicken7:skl,bxt */
> - if (IS_SKL_REVID(dev, SKL_REVID_C0, REVID_FOREVER) || IS_BROXTON(dev))
> - WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7,
> - GEN9_ENABLE_YV12_BUGFIX);
> + /* WaEnableSamplerGPGPUPreemptionSupport:skl,bxt */
> + WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7,
> + GEN9_ENABLE_YV12_BUGFIX |
> + GEN9_ENABLE_GPGPU_PREEMPTION);
>
> /* Wa4x4STCOptimizationDisable:skl,bxt */
> /* WaDisablePartialResolveInVc:skl,bxt */
>
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2016-04-19 16:17 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
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2016-04-06 9:28 [PATCH] drm/i915/gen9: implement WaEnableSamplerGPGPUPreemptionSupport tim.gore
2016-04-06 10:28 ` ✗ Fi.CI.BAT: failure for " Patchwork
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2016-04-07 9:38 [PATCH] " tim.gore
2016-04-12 14:22 tim.gore
2016-04-19 14:45 tim.gore
2016-04-19 16:17 ` Dave Gordon
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