From: Mika Kahola <mika.kahola@intel.com>
To: Vidya Srinivas <vidya.srinivas@intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 03/15] drm/i915/skl+: add NV12 in skl_format_to_fourcc
Date: Wed, 17 Jan 2018 13:43:15 +0200 [thread overview]
Message-ID: <1516189395.12453.132.camel@intel.com> (raw)
In-Reply-To: <1516484713-5837-4-git-send-email-vidya.srinivas@intel.com>
On Sun, 2018-01-21 at 03:15 +0530, Vidya Srinivas wrote:
> From: Mahesh Kumar <mahesh1.kumar@intel.com>
>
> Add support of recognizing DRM_FORMAT_NV12 from plane_format
> register value.
>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
> Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 02bf31d..1345796 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2612,6 +2612,8 @@ static int skl_format_to_fourcc(int format,
> bool rgb_order, bool alpha)
> switch (format) {
> case PLANE_CTL_FORMAT_RGB_565:
> return DRM_FORMAT_RGB565;
> + case PLANE_CTL_FORMAT_NV12:
> + return DRM_FORMAT_NV12;
> default:
> case PLANE_CTL_FORMAT_XRGB_8888:
> if (rgb_order) {
--
Mika Kahola - Intel OTC
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next prev parent reply other threads:[~2018-01-17 11:40 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-15 3:18 [PATCH 00/15] Adding NV12 support Vidya Srinivas
2018-01-15 3:18 ` [PATCH 02/15] drm/i915/skl+: refactor WM calculation for NV12 Vidya Srinivas
2018-01-20 0:39 ` kbuild test robot
2018-01-15 3:18 ` [PATCH 03/15] drm/i915/skl+: add NV12 in skl_format_to_fourcc Vidya Srinivas
2018-01-17 11:43 ` Mika Kahola [this message]
2018-01-15 3:18 ` [PATCH 05/15] drm/i915/skl+: NV12 related changes for WM Vidya Srinivas
2018-01-15 3:18 ` [PATCH 01/15] drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values Vidya Srinivas
2018-01-15 3:18 ` [PATCH 07/15] drm/i915/skl+: make sure higher latency level has higher wm value Vidya Srinivas
2018-01-15 3:18 ` [PATCH 04/15] drm/i915/skl+: support verification of DDB HW state for NV12 Vidya Srinivas
2018-01-15 3:18 ` [PATCH 08/15] drm/i915/skl+: nv12 workaround disable WM level 1-7 Vidya Srinivas
2018-01-15 3:18 ` [PATCH 10/15] drm/i915: Set scaler mode for NV12 Vidya Srinivas
2018-01-15 3:18 ` [PATCH 09/15] drm/i915/skl: split skl_compute_ddb function Vidya Srinivas
2018-01-15 3:18 ` [PATCH 06/15] drm/i915/skl+: pass skl_wm_level struct to wm compute func Vidya Srinivas
2018-01-15 3:18 ` [PATCH 12/15] drm/i915: Upscale scaler max scale for NV12 Vidya Srinivas
2018-01-15 3:18 ` [PATCH 13/15] drm/i915: Add NV12 as supported format for primary plane Vidya Srinivas
2018-01-15 3:18 ` [PATCH 11/15] drm/i915: Update format_is_yuv() to include NV12 Vidya Srinivas
2018-01-15 3:18 ` [PATCH 14/15] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas
2018-01-15 3:18 ` [PATCH 15/15] drm/i915: Add NV12 support to intel_framebuffer_init Vidya Srinivas
2018-01-18 14:21 ` Maarten Lankhorst
2018-01-18 14:49 ` Maarten Lankhorst
2018-01-29 11:41 ` Maarten Lankhorst
2018-01-30 4:53 ` Srinivas, Vidya
2018-01-29 17:17 ` Maarten Lankhorst
2018-01-30 4:05 ` Srinivas, Vidya
2018-01-30 6:16 ` Kumar, Mahesh
2018-01-30 9:50 ` Maarten Lankhorst
2018-01-15 3:49 ` ✓ Fi.CI.BAT: success for Adding NV12 support (rev5) Patchwork
2018-01-15 4:55 ` ✓ Fi.CI.IGT: " Patchwork
2018-01-15 8:47 ` ✓ Fi.CI.BAT: " Patchwork
2018-01-15 10:39 ` Saarinen, Jani
2018-01-15 9:44 ` ✓ Fi.CI.IGT: " Patchwork
2018-01-15 12:35 ` ✗ Fi.CI.BAT: failure " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2018-01-04 10:44 [PATCH 00/15] Adding NV12 support Vidya Srinivas
2018-01-04 10:44 ` [PATCH 03/15] drm/i915/skl+: add NV12 in skl_format_to_fourcc Vidya Srinivas
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