From: Vidya Srinivas <vidya.srinivas@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 01/15] drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
Date: Mon, 15 Jan 2018 03:18:17 +0000 (UTC)
Date: Sun, 21 Jan 2018 03:14:59 +0530 [thread overview]
Message-ID: <1516484713-5837-2-git-send-email-vidya.srinivas@intel.com> (raw)
In-Reply-To: <1516484713-5837-1-git-send-email-vidya.srinivas@intel.com>
From: Mahesh Kumar <mahesh1.kumar@intel.com>
skl_wm_values struct contains values of pipe/plane DDB only.
so rename it for better readability of code. Similarly
skl_copy_wm_for_pipe copies DDB values.
s/skl_wm_values/skl_ddb_values
s/skl_copy_wm_for_pipe/skl_copy_ddb_for_pipe
Changes since V1:
- also change name of skl_copy_wm_for_pipe
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 4 ++--
drivers/gpu/drm/i915/intel_drv.h | 2 +-
drivers/gpu/drm/i915/intel_pm.c | 14 +++++++-------
3 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index a689396..8d9fde8 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1437,7 +1437,7 @@ struct skl_ddb_allocation {
struct skl_ddb_entry y_plane[I915_MAX_PIPES][I915_MAX_PLANES];
};
-struct skl_wm_values {
+struct skl_ddb_values {
unsigned dirty_pipes;
struct skl_ddb_allocation ddb;
};
@@ -2131,7 +2131,7 @@ struct drm_i915_private {
/* current hardware state */
union {
struct ilk_wm_values hw;
- struct skl_wm_values skl_hw;
+ struct skl_ddb_values skl_hw;
struct vlv_wm_values vlv;
struct g4x_wm_values g4x;
};
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 731dc36..275c489 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -476,7 +476,7 @@ struct intel_atomic_state {
bool skip_intermediate_wm;
/* Gen9+ only */
- struct skl_wm_values wm_results;
+ struct skl_ddb_values wm_results;
struct i915_sw_fence commit_ready;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 1db79a8..b4cb21d 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4997,8 +4997,8 @@ skl_compute_ddb(struct drm_atomic_state *state)
}
static void
-skl_copy_wm_for_pipe(struct skl_wm_values *dst,
- struct skl_wm_values *src,
+skl_copy_ddb_for_pipe(struct skl_ddb_values *dst,
+ struct skl_ddb_values *src,
enum pipe pipe)
{
memcpy(dst->ddb.y_plane[pipe], src->ddb.y_plane[pipe],
@@ -5050,7 +5050,7 @@ skl_compute_wm(struct drm_atomic_state *state)
struct drm_crtc *crtc;
struct drm_crtc_state *cstate;
struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
- struct skl_wm_values *results = &intel_state->wm_results;
+ struct skl_ddb_values *results = &intel_state->wm_results;
struct drm_device *dev = state->dev;
struct skl_pipe_wm *pipe_wm;
bool changed = false;
@@ -5152,8 +5152,8 @@ static void skl_initial_wm(struct intel_atomic_state *state,
struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);
struct drm_device *dev = intel_crtc->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
- struct skl_wm_values *results = &state->wm_results;
- struct skl_wm_values *hw_vals = &dev_priv->wm.skl_hw;
+ struct skl_ddb_values *results = &state->wm_results;
+ struct skl_ddb_values *hw_vals = &dev_priv->wm.skl_hw;
enum pipe pipe = intel_crtc->pipe;
if ((results->dirty_pipes & drm_crtc_mask(&intel_crtc->base)) == 0)
@@ -5164,7 +5164,7 @@ static void skl_initial_wm(struct intel_atomic_state *state,
if (cstate->base.active_changed)
skl_atomic_update_crtc_wm(state, cstate);
- skl_copy_wm_for_pipe(hw_vals, results, pipe);
+ skl_copy_ddb_for_pipe(hw_vals, results, pipe);
mutex_unlock(&dev_priv->wm.wm_mutex);
}
@@ -5296,7 +5296,7 @@ void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc,
void skl_wm_get_hw_state(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = to_i915(dev);
- struct skl_wm_values *hw = &dev_priv->wm.skl_hw;
+ struct skl_ddb_values *hw = &dev_priv->wm.skl_hw;
struct skl_ddb_allocation *ddb = &dev_priv->wm.skl_hw.ddb;
struct drm_crtc *crtc;
struct intel_crtc *intel_crtc;
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2018-01-15 3:20 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-15 3:18 [PATCH 00/15] Adding NV12 support Vidya Srinivas
2018-01-15 3:18 ` [PATCH 02/15] drm/i915/skl+: refactor WM calculation for NV12 Vidya Srinivas
2018-01-20 0:39 ` kbuild test robot
2018-01-15 3:18 ` [PATCH 05/15] drm/i915/skl+: NV12 related changes for WM Vidya Srinivas
2018-01-15 3:18 ` [PATCH 03/15] drm/i915/skl+: add NV12 in skl_format_to_fourcc Vidya Srinivas
2018-01-17 11:43 ` Mika Kahola
2018-01-15 3:18 ` [PATCH 04/15] drm/i915/skl+: support verification of DDB HW state for NV12 Vidya Srinivas
2018-01-15 3:18 ` [PATCH 07/15] drm/i915/skl+: make sure higher latency level has higher wm value Vidya Srinivas
2018-01-15 3:18 ` Vidya Srinivas [this message]
2018-01-15 3:18 ` [PATCH 08/15] drm/i915/skl+: nv12 workaround disable WM level 1-7 Vidya Srinivas
2018-01-15 3:18 ` [PATCH 09/15] drm/i915/skl: split skl_compute_ddb function Vidya Srinivas
2018-01-15 3:18 ` [PATCH 10/15] drm/i915: Set scaler mode for NV12 Vidya Srinivas
2018-01-15 3:18 ` [PATCH 06/15] drm/i915/skl+: pass skl_wm_level struct to wm compute func Vidya Srinivas
2018-01-15 3:18 ` [PATCH 12/15] drm/i915: Upscale scaler max scale for NV12 Vidya Srinivas
2018-01-15 3:18 ` [PATCH 13/15] drm/i915: Add NV12 as supported format for primary plane Vidya Srinivas
2018-01-15 3:18 ` [PATCH 11/15] drm/i915: Update format_is_yuv() to include NV12 Vidya Srinivas
2018-01-15 3:18 ` [PATCH 14/15] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas
2018-01-15 3:18 ` [PATCH 15/15] drm/i915: Add NV12 support to intel_framebuffer_init Vidya Srinivas
2018-01-18 14:21 ` Maarten Lankhorst
2018-01-18 14:49 ` Maarten Lankhorst
2018-01-29 11:41 ` Maarten Lankhorst
2018-01-30 4:53 ` Srinivas, Vidya
2018-01-29 17:17 ` Maarten Lankhorst
2018-01-30 4:05 ` Srinivas, Vidya
2018-01-30 6:16 ` Kumar, Mahesh
2018-01-30 9:50 ` Maarten Lankhorst
2018-01-15 3:49 ` ✓ Fi.CI.BAT: success for Adding NV12 support (rev5) Patchwork
2018-01-15 4:55 ` ✓ Fi.CI.IGT: " Patchwork
2018-01-15 8:47 ` ✓ Fi.CI.BAT: " Patchwork
2018-01-15 10:39 ` Saarinen, Jani
2018-01-15 9:44 ` ✓ Fi.CI.IGT: " Patchwork
2018-01-15 12:35 ` ✗ Fi.CI.BAT: failure " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2018-01-04 10:44 [PATCH 00/15] Adding NV12 support Vidya Srinivas
2018-01-04 10:44 ` [PATCH 01/15] drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values Vidya Srinivas
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1516484713-5837-2-git-send-email-vidya.srinivas@intel.com \
--to=vidya.srinivas@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox