From: "Pandiyan, Dhinakaran" <dhinakaran.pandiyan@intel.com>
To: "chris@chris-wilson.co.uk" <chris@chris-wilson.co.uk>
Cc: "intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>,
"Vivi, Rodrigo" <rodrigo.vivi@intel.com>
Subject: Re: [PATCH v2] drm/i915/psr: HW tracking for cursor moves to fix lags.
Date: Tue, 13 Feb 2018 22:10:48 +0000 [thread overview]
Message-ID: <1518561241.2572.86.camel@dk-H97M-D3H> (raw)
In-Reply-To: <151855885001.31524.3077465741450828603@mail.alporthouse.com>
On Tue, 2018-02-13 at 21:54 +0000, Chris Wilson wrote:
> Quoting Dhinakaran Pandiyan (2018-02-13 21:46:13)
> > DRM_IOCTL_MODE_CURSOR results in a frontbuffer flush before the cursor
> > plane MMIOs are written to. But this flush is not necessary for PSR as
> > hardware tracking takes care of exiting PSR when the MMIO's are written.
> >
> > Introduce a new fb_op_origin enum to differentiate flushes due to a BO
> > being pinned from those originating due to a dirty fbdev buffer. Now, this
> > enum can be ignored in psr_flush and psr_invalidate.
> >
> > v2: Update comment in i915_gem_object_pin_to_display_plane. (Chris)
> >
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_drv.h | 1 +
> > drivers/gpu/drm/i915/i915_gem.c | 11 +++++++++--
> > drivers/gpu/drm/i915/intel_psr.c | 6 ++++--
> > 3 files changed, 14 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 81886b74c750..3bf6c6ec0509 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -637,6 +637,7 @@ enum fb_op_origin {
> > ORIGIN_CS,
> > ORIGIN_FLIP,
> > ORIGIN_DIRTYFB,
> > + ORIGIN_PINNEDFB,
> > };
> >
> > struct intel_fbc {
> > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> > index fc68b35854df..405acf3562de 100644
> > --- a/drivers/gpu/drm/i915/i915_gem.c
> > +++ b/drivers/gpu/drm/i915/i915_gem.c
> > @@ -4139,9 +4139,16 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
> >
> > vma->display_alignment = max_t(u64, vma->display_alignment, alignment);
> >
> > - /* Treat this as an end-of-frame, like intel_user_framebuffer_dirty() */
> > + /* Treat this as an end-of-frame, like intel_user_framebuffer_dirty() to
> > + * flush the caches.
> > + */
> > __i915_gem_object_flush_for_display(obj);
> > - intel_fb_obj_flush(obj, ORIGIN_DIRTYFB);
> > +
> > + /* Features like PSR might want to rely on HW to do the frontbuffer
> > + * flush, pass origin as ORIGIN_PINNEDFB rather than ORIGIN_DIRTYFB
> > + * so that their flush implementations can handle it accordingly.
> > + */
>
> So why it is different? Why can't the dirtyfb ioctl benefit from HW, which the
> application is meant to call every frame to *all* dirty framebuffers
> (which include cursors in atomic)?
>
Because the hardware requires a write to one of the pipe registers. When
applications write to the buffer via fbdev, it doesn't lead to pipe MMIO
write and hence does not benefit from HW triggered PSR exit.
> > + intel_fb_obj_flush(obj, ORIGIN_PINNEDFB);
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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next prev parent reply other threads:[~2018-02-13 22:10 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-12 6:08 [PATCH 0/3] PSR lag fixes Dhinakaran Pandiyan
2018-02-12 6:08 ` [PATCH 1/3] drm/i915/psr: Use more PSR HW tracking Dhinakaran Pandiyan
2018-02-12 6:08 ` [PATCH 2/3] drm/i915/psr: HW tracking for cursor moves to fix lags Dhinakaran Pandiyan
2018-02-12 9:33 ` Chris Wilson
2018-02-13 21:46 ` [PATCH v2] " Dhinakaran Pandiyan
2018-02-13 21:54 ` Chris Wilson
2018-02-13 22:10 ` Pandiyan, Dhinakaran [this message]
2018-02-13 22:15 ` Chris Wilson
2018-02-13 22:45 ` Pandiyan, Dhinakaran
2018-02-13 22:59 ` Chris Wilson
2018-02-14 0:20 ` Pandiyan, Dhinakaran
2018-02-12 6:08 ` [PATCH 3/3] drm/i915/psr: Wait for PSR transition to complete before exiting Dhinakaran Pandiyan
2018-02-12 6:30 ` ✓ Fi.CI.BAT: success for PSR lag fixes Patchwork
2018-02-12 7:19 ` ✗ Fi.CI.IGT: warning " Patchwork
2018-02-12 8:45 ` [PATCH 0/3] " Hans de Goede
2018-02-12 17:42 ` Pandiyan, Dhinakaran
2018-02-14 8:25 ` Hans de Goede
2018-03-14 20:49 ` Pandiyan, Dhinakaran
2018-03-14 22:09 ` Hans de Goede
2018-03-14 23:35 ` Pandiyan, Dhinakaran
2018-03-16 0:16 ` Rodrigo Vivi
2018-03-18 19:17 ` Hans de Goede
2018-02-13 22:26 ` ✗ Fi.CI.BAT: failure for PSR lag fixes (rev2) Patchwork
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