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From: Vidya Srinivas <vidya.srinivas@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: ville.syrjala@intel.com, maarten.lankhorst@intel.com
Subject: [PATCH v14 03/17] drm/i915/skl+: add NV12 in skl_format_to_fourcc
Date: Thu, 15 Mar 2018 13:47:27 +0530	[thread overview]
Message-ID: <1521101861-26324-4-git-send-email-vidya.srinivas@intel.com> (raw)
In-Reply-To: <1521101861-26324-1-git-send-email-vidya.srinivas@intel.com>

From: Mahesh Kumar <mahesh1.kumar@intel.com>

Add support of recognizing DRM_FORMAT_NV12 from plane_format
register value.

v2: Added reviewed by tag from Mika Kahola

v3: Added reviewed by from Juha-Pekka Heikkila

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index e3ebb8f..0be0d5a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2662,6 +2662,8 @@ static int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
 	switch (format) {
 	case PLANE_CTL_FORMAT_RGB_565:
 		return DRM_FORMAT_RGB565;
+	case PLANE_CTL_FORMAT_NV12:
+		return DRM_FORMAT_NV12;
 	default:
 	case PLANE_CTL_FORMAT_XRGB_8888:
 		if (rgb_order) {
-- 
2.7.4

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  parent reply	other threads:[~2018-03-15  8:20 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-15  8:17 [PATCH v14 00/17] Add NV12 support Vidya Srinivas
2018-03-15  8:17 ` [PATCH v14 01/17] drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values Vidya Srinivas
2018-03-15  8:17 ` [PATCH v14 02/17] drm/i915/skl+: refactor WM calculation for NV12 Vidya Srinivas
2018-03-15  8:17 ` Vidya Srinivas [this message]
2018-03-15  8:17 ` [PATCH v14 04/17] drm/i915/skl+: support verification of DDB HW state " Vidya Srinivas
2018-03-15  8:17 ` [PATCH v14 05/17] drm/i915/skl+: NV12 related changes for WM Vidya Srinivas
2018-03-15  8:17 ` [PATCH v14 06/17] drm/i915/skl+: pass skl_wm_level struct to wm compute func Vidya Srinivas
2018-03-15  8:17 ` [PATCH v14 07/17] drm/i915/skl+: make sure higher latency level has higher wm value Vidya Srinivas
2018-03-15  8:17 ` [PATCH v14 08/17] drm/i915/skl+: nv12 workaround disable WM level 1-7 Vidya Srinivas
2018-03-15  8:17 ` [PATCH v14 09/17] drm/i915/skl: split skl_compute_ddb function Vidya Srinivas
2018-03-15  8:17 ` [PATCH v14 10/17] drm/i915: Set scaler mode for NV12 Vidya Srinivas
2018-03-15  8:17 ` [PATCH v14 11/17] drm/i915: Update format_is_yuv() to include NV12 Vidya Srinivas
2018-03-15  8:17 ` [PATCH v14 12/17] drm/i915: Upscale scaler max scale for NV12 Vidya Srinivas
2018-03-15  8:17 ` [PATCH v14 13/17] drm/i915: Add NV12 as supported format for primary plane Vidya Srinivas
2018-03-15  8:17 ` [PATCH v14 14/17] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas
2018-03-15  8:17 ` [PATCH v14 15/17] drm/i915: Add NV12 support to intel_framebuffer_init Vidya Srinivas
2018-03-15  8:17 ` [PATCH v14 16/17] drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg Vidya Srinivas
2018-03-15  8:17 ` [PATCH v14 17/17] drm/i915: Display WA 827 Vidya Srinivas
2018-03-15  8:45 ` ✗ Fi.CI.BAT: failure for Add NV12 support (rev2) Patchwork
2018-03-15 12:06 ` ✓ Fi.CI.BAT: success " Patchwork
2018-03-15 14:05 ` ✗ Fi.CI.IGT: failure " Patchwork
2018-03-16  8:45 ` ✓ Fi.CI.BAT: success " Patchwork
2018-03-16 10:07 ` ✗ Fi.CI.IGT: failure " Patchwork

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