From: Vidya Srinivas <vidya.srinivas@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: ville.syrjala@intel.com,
Vidya Srinivas <vidya.srinivas@intel.com>,
maarten.lankhorst@intel.com
Subject: [PATCH v14 06/17] drm/i915/skl+: pass skl_wm_level struct to wm compute func
Date: Thu, 15 Mar 2018 13:47:30 +0530 [thread overview]
Message-ID: <1521101861-26324-7-git-send-email-vidya.srinivas@intel.com> (raw)
In-Reply-To: <1521101861-26324-1-git-send-email-vidya.srinivas@intel.com>
From: Mahesh Kumar <mahesh1.kumar@intel.com>
This patch passes skl_wm_level structure itself to watermark
computation function skl_compute_plane_wm function (instead
of its internal parameters). It reduces number of arguments
required to be passed.
v2: Addressed review comments by Shashank Sharma
v3: Adding reviewed by tag from Shashank Sharma
v4: Added reviewed by from Juha-Pekka Heikkila
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 18 +++++++-----------
1 file changed, 7 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index faebea8..8eb3974 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4529,9 +4529,7 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
uint16_t ddb_allocation,
int level,
const struct skl_wm_params *wp,
- uint16_t *out_blocks, /* out */
- uint8_t *out_lines, /* out */
- bool *enabled /* out */)
+ struct skl_wm_level *result /* out */)
{
const struct drm_plane_state *pstate = &intel_pstate->base;
uint32_t latency = dev_priv->wm.skl_latency[level];
@@ -4545,7 +4543,7 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
if (latency == 0 ||
!intel_wm_plane_visible(cstate, intel_pstate)) {
- *enabled = false;
+ result->plane_en = false;
return 0;
}
@@ -4626,7 +4624,7 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
if ((level > 0 && res_lines > 31) ||
res_blocks >= ddb_allocation ||
min_disp_buf_needed >= ddb_allocation) {
- *enabled = false;
+ result->plane_en = false;
/*
* If there are no valid level 0 watermarks, then we can't
@@ -4646,9 +4644,9 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
}
/* The number of lines are ignored for the level 0 watermark. */
- *out_lines = level ? res_lines : 0;
- *out_blocks = res_blocks;
- *enabled = true;
+ result->plane_res_b = res_blocks;
+ result->plane_res_l = res_lines;
+ result->plane_en = true;
return 0;
}
@@ -4688,9 +4686,7 @@ skl_compute_wm_levels(const struct drm_i915_private *dev_priv,
ddb_blocks,
level,
wm_params,
- &result->plane_res_b,
- &result->plane_res_l,
- &result->plane_en);
+ result);
if (ret)
return ret;
}
--
2.7.4
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next prev parent reply other threads:[~2018-03-15 8:20 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-15 8:17 [PATCH v14 00/17] Add NV12 support Vidya Srinivas
2018-03-15 8:17 ` [PATCH v14 01/17] drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values Vidya Srinivas
2018-03-15 8:17 ` [PATCH v14 02/17] drm/i915/skl+: refactor WM calculation for NV12 Vidya Srinivas
2018-03-15 8:17 ` [PATCH v14 03/17] drm/i915/skl+: add NV12 in skl_format_to_fourcc Vidya Srinivas
2018-03-15 8:17 ` [PATCH v14 04/17] drm/i915/skl+: support verification of DDB HW state for NV12 Vidya Srinivas
2018-03-15 8:17 ` [PATCH v14 05/17] drm/i915/skl+: NV12 related changes for WM Vidya Srinivas
2018-03-15 8:17 ` Vidya Srinivas [this message]
2018-03-15 8:17 ` [PATCH v14 07/17] drm/i915/skl+: make sure higher latency level has higher wm value Vidya Srinivas
2018-03-15 8:17 ` [PATCH v14 08/17] drm/i915/skl+: nv12 workaround disable WM level 1-7 Vidya Srinivas
2018-03-15 8:17 ` [PATCH v14 09/17] drm/i915/skl: split skl_compute_ddb function Vidya Srinivas
2018-03-15 8:17 ` [PATCH v14 10/17] drm/i915: Set scaler mode for NV12 Vidya Srinivas
2018-03-15 8:17 ` [PATCH v14 11/17] drm/i915: Update format_is_yuv() to include NV12 Vidya Srinivas
2018-03-15 8:17 ` [PATCH v14 12/17] drm/i915: Upscale scaler max scale for NV12 Vidya Srinivas
2018-03-15 8:17 ` [PATCH v14 13/17] drm/i915: Add NV12 as supported format for primary plane Vidya Srinivas
2018-03-15 8:17 ` [PATCH v14 14/17] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas
2018-03-15 8:17 ` [PATCH v14 15/17] drm/i915: Add NV12 support to intel_framebuffer_init Vidya Srinivas
2018-03-15 8:17 ` [PATCH v14 16/17] drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg Vidya Srinivas
2018-03-15 8:17 ` [PATCH v14 17/17] drm/i915: Display WA 827 Vidya Srinivas
2018-03-15 8:45 ` ✗ Fi.CI.BAT: failure for Add NV12 support (rev2) Patchwork
2018-03-15 12:06 ` ✓ Fi.CI.BAT: success " Patchwork
2018-03-15 14:05 ` ✗ Fi.CI.IGT: failure " Patchwork
2018-03-16 8:45 ` ✓ Fi.CI.BAT: success " Patchwork
2018-03-16 10:07 ` ✗ Fi.CI.IGT: failure " Patchwork
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