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From: "Shankar, Uma" <uma.shankar@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 03/20] drm/i915: Include the LUT sizes in the state dump
Date: Thu, 17 Sep 2020 19:27:28 +0000	[thread overview]
Message-ID: <1688e3e0588d4964b6c655cc3cf96280@intel.com> (raw)
In-Reply-To: <20200717211345.26851-4-ville.syrjala@linux.intel.com>



> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Saturday, July 18, 2020 2:43 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 03/20] drm/i915: Include the LUT sizes in the state
> dump
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Dump the sizes of the software LUTs in the state dump. Makes it a bit easier to
> see which is is present without having to decode it from the gamma_mode and

Nitpick: Drop an extra "is"
With this,
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> other bits of state.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index c36379cf07fc..9279df7757fc 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -13131,6 +13131,12 @@ static void intel_dump_pipe_config(const struct
> intel_crtc_state *pipe_config,
>  			    pipe_config->csc_mode, pipe_config->gamma_mode,
>  			    pipe_config->gamma_enable, pipe_config-
> >csc_enable);
> 
> +	drm_dbg_kms(&dev_priv->drm, "degamma lut: %d entries, gamma lut:
> %d entries\n",
> +		    pipe_config->hw.degamma_lut ?
> +		    drm_color_lut_size(pipe_config->hw.degamma_lut) : 0,
> +		    pipe_config->hw.gamma_lut ?
> +		    drm_color_lut_size(pipe_config->hw.gamma_lut) : 0);
> +
>  dump_planes:
>  	if (!state)
>  		return;
> --
> 2.26.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2020-09-17 19:27 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20200717211345.26851-1-ville.syrjala@linux.intel.com>
     [not found] ` <20200717211345.26851-2-ville.syrjala@linux.intel.com>
2020-09-17 19:20   ` [Intel-gfx] [PATCH 01/20] drm/i915: Fix state checker hw.active/hw.enable readout Shankar, Uma
     [not found] ` <20200717211345.26851-3-ville.syrjala@linux.intel.com>
2020-09-17 19:24   ` [Intel-gfx] [PATCH 02/20] drm/i915: Move MST master transcoder dump earlier Shankar, Uma
     [not found] ` <20200717211345.26851-4-ville.syrjala@linux.intel.com>
2020-09-17 19:27   ` Shankar, Uma [this message]
     [not found] ` <20200717211345.26851-5-ville.syrjala@linux.intel.com>
2020-09-17 19:29   ` [Intel-gfx] [PATCH 04/20] drm/i915: s/glk_read_lut_10/bdw_read_lut_10/ Shankar, Uma
     [not found] ` <20200717211345.26851-6-ville.syrjala@linux.intel.com>
2020-09-17 19:39   ` [Intel-gfx] [PATCH 05/20] drm/i915: Reset glk degamma index after programming/readout Shankar, Uma
     [not found] ` <20200717211345.26851-7-ville.syrjala@linux.intel.com>
2020-09-17 19:42   ` [Intel-gfx] [PATCH 06/20] drm/i915: Shuffle chv_cgm_gamma_pack() around a bit Shankar, Uma
     [not found] ` <20200717211345.26851-8-ville.syrjala@linux.intel.com>
2020-09-17 19:46   ` [Intel-gfx] [PATCH 07/20] drm/i915: Relocate CHV CGM gamma masks Shankar, Uma
     [not found] ` <20200717211345.26851-9-ville.syrjala@linux.intel.com>
2020-09-17 19:58   ` [Intel-gfx] [PATCH 08/20] drm/i915: Add glk+ degamma readout Shankar, Uma
     [not found] ` <20200717211345.26851-10-ville.syrjala@linux.intel.com>
2020-09-17 20:06   ` [Intel-gfx] [PATCH 09/20] drm/i915: Read out CHV CGM degamma Shankar, Uma
     [not found] ` <20200717211345.26851-11-ville.syrjala@linux.intel.com>
2020-09-17 20:15   ` [Intel-gfx] [PATCH 10/20] drm/i915: Add gamma/degamma readout for bdw+ Shankar, Uma
     [not found] ` <20200717211345.26851-12-ville.syrjala@linux.intel.com>
2020-09-17 20:40   ` [Intel-gfx] [PATCH 11/20] drm/i915: Do degamma+gamma readout in bdw+ split gamma mode Shankar, Uma
     [not found] ` <20200717211345.26851-13-ville.syrjala@linux.intel.com>
2020-09-17 20:43   ` [Intel-gfx] [PATCH 12/20] drm/i915: Polish bdw_read_lut_10() a bit Shankar, Uma
     [not found] ` <20200717211345.26851-14-ville.syrjala@linux.intel.com>
2020-09-17 20:46   ` [Intel-gfx] [PATCH 13/20] drm/i915: Add gamma/degamm readout for ivb/hsw Shankar, Uma
     [not found] ` <20200717211345.26851-15-ville.syrjala@linux.intel.com>
2020-09-17 20:52   ` [Intel-gfx] [PATCH 14/20] drm/i915: Replace some gamma_mode ifs with switches Shankar, Uma
     [not found] ` <20200717211345.26851-16-ville.syrjala@linux.intel.com>
2020-09-17 20:56   ` [Intel-gfx] [PATCH 15/20] drm/i915: Make ilk_load_luts() deal with degamma Shankar, Uma
     [not found] ` <20200717211345.26851-17-ville.syrjala@linux.intel.com>
2020-09-17 20:58   ` [Intel-gfx] [PATCH 16/20] drm/i915: Make ilk_read_luts() capable of degamma readout Shankar, Uma
     [not found] ` <20200717211345.26851-18-ville.syrjala@linux.intel.com>
2020-09-17 21:00   ` [Intel-gfx] [PATCH 17/20] drm/i915: Make .read_luts() mandatory Shankar, Uma
     [not found] ` <20200717211345.26851-19-ville.syrjala@linux.intel.com>
2020-09-17 21:03   ` [Intel-gfx] [PATCH 18/20] drm/i915: Extract ilk_crtc_has_gamma() & co Shankar, Uma
     [not found] ` <20200717211345.26851-20-ville.syrjala@linux.intel.com>
2020-09-17 21:52   ` [Intel-gfx] [PATCH 19/20] drm/i915: Complete the gamma/degamma state checking Shankar, Uma
     [not found] ` <20200717211345.26851-21-ville.syrjala@linux.intel.com>
2020-09-21 19:40   ` [Intel-gfx] [PATCH 20/20] drm/i915: Add 10bit gamma mode for gen2/3 Shankar, Uma

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