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From: "Shankar, Uma" <uma.shankar@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 01/20] drm/i915: Fix state checker hw.active/hw.enable readout
Date: Thu, 17 Sep 2020 19:20:57 +0000	[thread overview]
Message-ID: <37d25f16d9334e68b661700f9c5eab40@intel.com> (raw)
In-Reply-To: <20200717211345.26851-2-ville.syrjala@linux.intel.com>



> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Saturday, July 18, 2020 2:43 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 01/20] drm/i915: Fix state checker
> hw.active/hw.enable readout
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Previously intel_dump_pipe_config() used to dump the full crtc state whether or
> not the crtc was logically enabled or not. As that meant occasionally dumping
> confusing stale garbage I changed it to check whether the crtc is logically enabled
> or not. However I did not realize that the state checker readout code does not
> populate crtc_state.hw.{active,enabled}. Hence the state checker dump would
> only give us a full dump of the sw state but not the hw state. Fix that by
> populating those bits of the hw state as well.

Looks good.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Fixes: 10d75f5428fd ("drm/i915: Fix plane state dumps")
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 15 +++++++++------
>  1 file changed, 9 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 729ec6e0d43a..ae0af452d776 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -14244,7 +14244,6 @@ verify_crtc_state(struct intel_crtc *crtc,
>  	struct intel_encoder *encoder;
>  	struct intel_crtc_state *pipe_config = old_crtc_state;
>  	struct drm_atomic_state *state = old_crtc_state->uapi.state;
> -	bool active;
> 
>  	__drm_atomic_helper_crtc_destroy_state(&old_crtc_state->uapi);
>  	intel_crtc_free_hw_state(old_crtc_state);
> @@ -14254,16 +14253,19 @@ verify_crtc_state(struct intel_crtc *crtc,
>  	drm_dbg_kms(&dev_priv->drm, "[CRTC:%d:%s]\n", crtc->base.base.id,
>  		    crtc->base.name);
> 
> -	active = dev_priv->display.get_pipe_config(crtc, pipe_config);
> +	pipe_config->hw.enable = new_crtc_state->hw.enable;
> +
> +	pipe_config->hw.active =
> +		dev_priv->display.get_pipe_config(crtc, pipe_config);
> 
>  	/* we keep both pipes enabled on 830 */
> -	if (IS_I830(dev_priv))
> -		active = new_crtc_state->hw.active;
> +	if (IS_I830(dev_priv) && pipe_config->hw.active)
> +		pipe_config->hw.active = new_crtc_state->hw.active;
> 
> -	I915_STATE_WARN(new_crtc_state->hw.active != active,
> +	I915_STATE_WARN(new_crtc_state->hw.active != pipe_config->hw.active,
>  			"crtc active state doesn't match with hw state "
>  			"(expected %i, found %i)\n",
> -			new_crtc_state->hw.active, active);
> +			new_crtc_state->hw.active, pipe_config->hw.active);
> 
>  	I915_STATE_WARN(crtc->active != new_crtc_state->hw.active,
>  			"transitional active state does not match atomic hw state
> "
> @@ -14272,6 +14274,7 @@ verify_crtc_state(struct intel_crtc *crtc,
> 
>  	for_each_encoder_on_crtc(dev, &crtc->base, encoder) {
>  		enum pipe pipe;
> +		bool active;
> 
>  		active = encoder->get_hw_state(encoder, &pipe);
>  		I915_STATE_WARN(active != new_crtc_state->hw.active,
> --
> 2.26.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
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       reply	other threads:[~2020-09-17 19:21 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20200717211345.26851-1-ville.syrjala@linux.intel.com>
     [not found] ` <20200717211345.26851-2-ville.syrjala@linux.intel.com>
2020-09-17 19:20   ` Shankar, Uma [this message]
     [not found] ` <20200717211345.26851-3-ville.syrjala@linux.intel.com>
2020-09-17 19:24   ` [Intel-gfx] [PATCH 02/20] drm/i915: Move MST master transcoder dump earlier Shankar, Uma
     [not found] ` <20200717211345.26851-4-ville.syrjala@linux.intel.com>
2020-09-17 19:27   ` [Intel-gfx] [PATCH 03/20] drm/i915: Include the LUT sizes in the state dump Shankar, Uma
     [not found] ` <20200717211345.26851-5-ville.syrjala@linux.intel.com>
2020-09-17 19:29   ` [Intel-gfx] [PATCH 04/20] drm/i915: s/glk_read_lut_10/bdw_read_lut_10/ Shankar, Uma
     [not found] ` <20200717211345.26851-6-ville.syrjala@linux.intel.com>
2020-09-17 19:39   ` [Intel-gfx] [PATCH 05/20] drm/i915: Reset glk degamma index after programming/readout Shankar, Uma
     [not found] ` <20200717211345.26851-7-ville.syrjala@linux.intel.com>
2020-09-17 19:42   ` [Intel-gfx] [PATCH 06/20] drm/i915: Shuffle chv_cgm_gamma_pack() around a bit Shankar, Uma
     [not found] ` <20200717211345.26851-8-ville.syrjala@linux.intel.com>
2020-09-17 19:46   ` [Intel-gfx] [PATCH 07/20] drm/i915: Relocate CHV CGM gamma masks Shankar, Uma
     [not found] ` <20200717211345.26851-9-ville.syrjala@linux.intel.com>
2020-09-17 19:58   ` [Intel-gfx] [PATCH 08/20] drm/i915: Add glk+ degamma readout Shankar, Uma
     [not found] ` <20200717211345.26851-10-ville.syrjala@linux.intel.com>
2020-09-17 20:06   ` [Intel-gfx] [PATCH 09/20] drm/i915: Read out CHV CGM degamma Shankar, Uma
     [not found] ` <20200717211345.26851-11-ville.syrjala@linux.intel.com>
2020-09-17 20:15   ` [Intel-gfx] [PATCH 10/20] drm/i915: Add gamma/degamma readout for bdw+ Shankar, Uma
     [not found] ` <20200717211345.26851-12-ville.syrjala@linux.intel.com>
2020-09-17 20:40   ` [Intel-gfx] [PATCH 11/20] drm/i915: Do degamma+gamma readout in bdw+ split gamma mode Shankar, Uma
     [not found] ` <20200717211345.26851-13-ville.syrjala@linux.intel.com>
2020-09-17 20:43   ` [Intel-gfx] [PATCH 12/20] drm/i915: Polish bdw_read_lut_10() a bit Shankar, Uma
     [not found] ` <20200717211345.26851-14-ville.syrjala@linux.intel.com>
2020-09-17 20:46   ` [Intel-gfx] [PATCH 13/20] drm/i915: Add gamma/degamm readout for ivb/hsw Shankar, Uma
     [not found] ` <20200717211345.26851-15-ville.syrjala@linux.intel.com>
2020-09-17 20:52   ` [Intel-gfx] [PATCH 14/20] drm/i915: Replace some gamma_mode ifs with switches Shankar, Uma
     [not found] ` <20200717211345.26851-16-ville.syrjala@linux.intel.com>
2020-09-17 20:56   ` [Intel-gfx] [PATCH 15/20] drm/i915: Make ilk_load_luts() deal with degamma Shankar, Uma
     [not found] ` <20200717211345.26851-17-ville.syrjala@linux.intel.com>
2020-09-17 20:58   ` [Intel-gfx] [PATCH 16/20] drm/i915: Make ilk_read_luts() capable of degamma readout Shankar, Uma
     [not found] ` <20200717211345.26851-18-ville.syrjala@linux.intel.com>
2020-09-17 21:00   ` [Intel-gfx] [PATCH 17/20] drm/i915: Make .read_luts() mandatory Shankar, Uma
     [not found] ` <20200717211345.26851-19-ville.syrjala@linux.intel.com>
2020-09-17 21:03   ` [Intel-gfx] [PATCH 18/20] drm/i915: Extract ilk_crtc_has_gamma() & co Shankar, Uma
     [not found] ` <20200717211345.26851-20-ville.syrjala@linux.intel.com>
2020-09-17 21:52   ` [Intel-gfx] [PATCH 19/20] drm/i915: Complete the gamma/degamma state checking Shankar, Uma
     [not found] ` <20200717211345.26851-21-ville.syrjala@linux.intel.com>
2020-09-21 19:40   ` [Intel-gfx] [PATCH 20/20] drm/i915: Add 10bit gamma mode for gen2/3 Shankar, Uma

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