From: Daniel Vetter <daniel@ffwll.ch>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/2] drm/i915: Correct the bit number for the MI_FLUSH_ENABLE.
Date: Wed, 25 Jan 2012 11:41:16 +0100 [thread overview]
Message-ID: <20120125104116.GE3896@phenom.ffwll.local> (raw)
In-Reply-To: <c55c5d$1p13hl@AZSMGA002.ch.intel.com>
On Wed, Jan 25, 2012 at 09:57:58AM +0000, Chris Wilson wrote:
> On Tue, 24 Jan 2012 18:55:53 -0800, Eric Anholt <eric@anholt.net> wrote:
> > On Sat, 21 Jan 2012 17:36:13 +0100, Daniel Vetter <daniel@ffwll.ch> wrote:
> > > On Thu, Jan 19, 2012 at 10:50:06AM -0800, Eric Anholt wrote:
> > > > Older specs claimed this was bit 11, but newer specs and the actual
> > > > simulator code say it was bit 12. Regardless, we don't use MI_FLUSH,
> > > > or try to enable it any more.
> > > >
> > > > Signed-off-by: Eric Anholt <eric@anholt.net>
> > >
> > > I'd like to amend this with the following (on this patch instead of the
> > > other, so that ppl actually can find it with git blame):
> > >
> > > "Furthermore actually setting bit12 results in gpu hangs both on snb and
> > > ivb. Ben Widawsky discovered a ppt that claims that both bit12 and bit11
> > > must be set, but that doesn't help either. And last but not least,
> > > MI_FLUSH seems to work regardless of the setting of these bits."
> >
> > I haven't seen bit12 hanging snb/ivb -- I only knew of it hanging ilk
> > (since it doesn't exist there). On my snb, running xvideo so that
> > MI_FLUSHes are generated by the userland (I think -- I haven't caught
> > them in cat i915_batchbuffers | intel_dump_decode -), with
> > intel_reg_read 0x209c saying 0x1240, things are going fine. Also with
> > 0x209c saying 0x240 (the result of this patch).
>
> The SNB Xv path, that is the code called by Gen6DisplayVideoTexture,
> never used MI_FLUSH.
Ok, I've quickly tested this with intel_reg_write and installing older
userspace. Doesn't seem to blow up.
-Daniel
--
Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48
next prev parent reply other threads:[~2012-01-25 10:41 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-01-19 18:50 [PATCH 1/2] drm/i915: Remove the MI_FLUSH_ENABLE setting Eric Anholt
2012-01-19 18:50 ` [PATCH 2/2] drm/i915: Correct the bit number for the MI_FLUSH_ENABLE Eric Anholt
2012-01-21 16:36 ` Daniel Vetter
2012-01-25 2:55 ` Eric Anholt
2012-01-25 4:22 ` Ben Widawsky
2012-01-25 8:37 ` Daniel Vetter
2012-01-25 9:57 ` Chris Wilson
2012-01-25 10:41 ` Daniel Vetter [this message]
2012-01-25 18:31 ` Eric Anholt
2012-01-19 18:53 ` [PATCH 1/2] drm/i915: Remove the MI_FLUSH_ENABLE setting Daniel Vetter
2012-01-19 18:54 ` Keith Packard
2012-01-19 18:59 ` Ben Widawsky
2012-01-19 19:36 ` Keith Packard
2012-01-20 19:16 ` Eric Anholt
2012-01-20 22:57 ` Ben Widawsky
2012-01-21 0:40 ` Eric Anholt
2012-01-21 4:47 ` Ben Widawsky
2012-01-21 10:57 ` Kenneth Graunke
2012-01-21 21:32 ` Ben Widawsky
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20120125104116.GE3896@phenom.ffwll.local \
--to=daniel@ffwll.ch \
--cc=chris@chris-wilson.co.uk \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox