From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: Ben Widawsky <ben@bwidawsk.net>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 03/25] drm/i915: re-order GT IIR bit definitions
Date: Thu, 22 Mar 2012 11:40:23 -0700 [thread overview]
Message-ID: <20120322114023.789b8fb9@jbarnes-desktop> (raw)
In-Reply-To: <20120321181036.162beca3@bwidawsk.net>
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On Wed, 21 Mar 2012 18:10:36 -0700
Ben Widawsky <ben@bwidawsk.net> wrote:
> On Wed, 21 Mar 2012 12:48:24 -0700
> Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
>
> > They were all over the place, order them by position and add a few.
> >
> > Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 20 ++++++++++++++------
> > 1 files changed, 14 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index 52a06be..af5cd25 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -3063,18 +3063,26 @@
> > #define DE_PIPEB_VBLANK_IVB (1<<5)
> > #define DE_PIPEA_VBLANK_IVB (1<<0)
> >
> > +#define MASTER_IER_VLV 0x4400c /* Gunit master IER */
> > +#define MASTER_INTERRUPT_ENABLE (1<<31)
> > +
>
> Seems VLV_MASTER_IER would follow the convention.
>
> > #define DEISR 0x44000
> > #define DEIMR 0x44004
> > #define DEIIR 0x44008
> > #define DEIER 0x4400c
> >
> > /* GT interrupt */
> > -#define GT_PIPE_NOTIFY (1 << 4)
> > -#define GT_SYNC_STATUS (1 << 2)
> > -#define GT_USER_INTERRUPT (1 << 0)
> > -#define GT_BSD_USER_INTERRUPT (1 << 5)
> > -#define GT_GEN6_BSD_USER_INTERRUPT (1 << 12)
> > -#define GT_BLT_USER_INTERRUPT (1 << 22)
> > +#define GT_BLT_FLUSHDW_NOTIFY_INTERRUPT (1 << 26)
> > +#define GT_BLT_CS_ERROR_INTERRUPT (1 << 25)
> > +#define GT_BLT_USER_INTERRUPT (1 << 22)
> > +#define GT_BSD_CS_ERROR_INTERRUPT (1 << 15)
> > +#define GT_GEN6_BSD_USER_INTERRUPT (1 << 12)
> > +#define GT_BSD_USER_INTERRUPT (1 << 5)
> > +#define GT_L3_PARITY_ERROR_INTERRUPT (1 << 5) /* IVB+ */
> > +#define GT_PIPE_NOTIFY (1 << 4)
> > +#define GT_RENDER_CS_ERROR_INTERRUPT (1 << 3)
> > +#define GT_SYNC_STATUS (1 << 2)
> > +#define GT_USER_INTERRUPT (1 << 0)
>
> What about GT_GEN7_L3_PARITY_ERROR_INTERRUPT?
Yeah it's gen7+ you're right.
> Similarly if GT_BLT_FLUSHDW_NOTIFY_INTERRUPT and
> GT_BLT_CS_ERROR_INTERRUPT only apply after a certain generation maybe
> add that info... I know this applies directly to your overall pitch to
> restructure things, but for now at least try to keep it consistent, and
> helpfully named (imho).
Docs aren't very helpful here; the ILK ones say they're the same but
I'm suspicious...
I'll gen6 the new ones though; we don't use them yet anyway.
--
Jesse Barnes, Intel Open Source Technology Center
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next prev parent reply other threads:[~2012-03-22 18:40 UTC|newest]
Thread overview: 69+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-03-21 19:48 [RFC] ValleyView support Jesse Barnes
2012-03-21 19:48 ` [PATCH 01/25] drm/i915: move NEEDS_FORCE_WAKE to i915_drv.c Jesse Barnes
2012-03-21 20:40 ` Eugeni Dodonov
2012-03-21 19:48 ` [PATCH 02/25] drm/i915: add debug message when EDID fetch fails Jesse Barnes
2012-03-21 20:44 ` Eugeni Dodonov
2012-03-21 20:53 ` Jesse Barnes
2012-03-22 1:02 ` Ben Widawsky
2012-03-21 19:48 ` [PATCH 03/25] drm/i915: re-order GT IIR bit definitions Jesse Barnes
2012-03-22 1:10 ` Ben Widawsky
2012-03-22 18:40 ` Jesse Barnes [this message]
2012-03-21 19:48 ` [PATCH 04/25] drm/i915: Add basic support for parsing of VBT OEM Custom Block Jesse Barnes
2012-03-22 1:30 ` Ben Widawsky
2012-03-22 15:45 ` Jesse Barnes
2012-03-22 16:11 ` Ben Widawsky
2012-03-22 17:00 ` Jesse Barnes
2012-03-26 18:52 ` Rodrigo Vivi
2012-03-21 19:48 ` [PATCH 05/25] drm/i915: add DPIO read/write functions for ValleyView Jesse Barnes
2012-03-22 1:39 ` Ben Widawsky
2012-03-21 19:48 ` [PATCH 06/25] drm/i915: add ValleyView registers, stub code, and watermark support Jesse Barnes
2012-03-21 20:52 ` Daniel Vetter
2012-03-21 19:48 ` [PATCH 07/25] drm/i915: split out DPLL update code from i9xx_crtc_mode_set Jesse Barnes
2012-03-21 20:55 ` Daniel Vetter
2012-03-21 21:29 ` Jesse Barnes
2012-03-21 19:48 ` [PATCH 08/25] drm/i915: ValleyView mode setting limits and PLL functions Jesse Barnes
2012-03-22 1:53 ` Ben Widawsky
2012-03-22 15:03 ` Purushothaman, Vijay A
2012-03-21 19:48 ` [PATCH 09/25] drm/915: program driain latency regs on ValleyView Jesse Barnes
2012-03-21 21:00 ` Daniel Vetter
2012-03-21 21:52 ` Adam Jackson
2012-03-21 19:48 ` [PATCH 10/25] drm/i915: Enable DP panel power sequencing for ValleyView Jesse Barnes
2012-03-22 18:31 ` Ben Widawsky
2012-03-21 19:48 ` [PATCH 11/25] drm/i915: Enable HDMI on ValleyView Jesse Barnes
2012-03-21 21:02 ` Daniel Vetter
2012-03-26 3:21 ` Shobhit Kumar
2012-03-21 19:48 ` [PATCH 12/25] agp/intel: map more registers for use by the GTT code Jesse Barnes
2012-03-21 21:04 ` Daniel Vetter
2012-03-21 19:48 ` [PATCH 13/25] agp/intel: add Valleyview specific PTE entry function Jesse Barnes
2012-03-21 21:07 ` Daniel Vetter
2012-03-21 19:48 ` [PATCH 14/25] agp/intel: always use uncached mappings on VLV Jesse Barnes
2012-03-21 21:09 ` Daniel Vetter
2012-03-21 21:23 ` Daniel Vetter
2012-03-21 19:48 ` [PATCH 15/25] drm/i915: add ValleyView specific CRT detect function Jesse Barnes
2012-03-21 19:48 ` [PATCH 16/25] drm/i915: add ValleyView specific force wake get/put functions Jesse Barnes
2012-03-21 21:11 ` Daniel Vetter
2012-03-21 21:32 ` Jesse Barnes
2012-03-21 21:55 ` Adam Jackson
2012-03-21 22:11 ` Jesse Barnes
2012-03-21 19:48 ` [PATCH 17/25] drm/i915: ValleyView cacheability is different Jesse Barnes
2012-03-21 21:19 ` Daniel Vetter
2012-03-21 21:35 ` Jesse Barnes
2012-03-21 19:48 ` [PATCH 18/25] drm/i915: ValleyView IRQ support Jesse Barnes
2012-03-21 19:48 ` [PATCH 19/25] drm/i915: display regs are at 0x180000 on ValleyView Jesse Barnes
2012-03-21 21:33 ` Daniel Vetter
2012-03-21 21:36 ` Jesse Barnes
2012-03-22 21:13 ` Jesse Barnes
2012-03-21 19:48 ` [PATCH 20/25] drm/i915: check for disabled interrupts " Jesse Barnes
2012-03-21 19:48 ` [PATCH 21/25] drm/i915: add HDMI and DP port enumeration " Jesse Barnes
2012-03-21 19:48 ` [PATCH 22/25] drm/i915: remove some unneeded debug messages Jesse Barnes
2012-03-21 21:36 ` Daniel Vetter
2012-03-21 21:39 ` Daniel Vetter
2012-03-21 21:55 ` Jesse Barnes
2012-03-21 19:48 ` [PATCH 23/25] drm/i915: add ValleyView clock gating init Jesse Barnes
2012-03-21 21:40 ` Daniel Vetter
2012-03-21 19:48 ` [PATCH 24/25] drm/i915: add has_turbo bit to driver info struct Jesse Barnes
2012-03-21 21:43 ` Daniel Vetter
2012-03-21 19:48 ` [PATCH 25/25] drm/i915: don't write ring regs until they're set up Jesse Barnes
2012-03-21 21:46 ` Daniel Vetter
2012-03-21 21:56 ` Jesse Barnes
2012-03-21 21:54 ` [RFC] ValleyView support Daniel Vetter
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