From: Daniel Vetter <daniel@ffwll.ch>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>,
Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 2/2] drm/i915: add an explict mmio base for gpio/gmbus io
Date: Sat, 24 Mar 2012 15:57:11 +0100 [thread overview]
Message-ID: <20120324145711.GA7563@phenom.ffwll.local> (raw)
In-Reply-To: <f80fcd$3udp18@fmsmga001.fm.intel.com>
On Fri, Mar 23, 2012 at 11:01:31PM +0000, Chris Wilson wrote:
> On Fri, 23 Mar 2012 23:43:36 +0100, Daniel Vetter <daniel.vetter@ffwll.ch> wrote:
> > Again, Valleyview modes these around, so make the mmio base more
> > explicit to consolidate the base address computations to one
> > HAS_PCH_SPLIT check.
> >
> > Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
>
> Consolidating the offset computation is nice. Everytime I look at this I
> question whether we should be using GMBUS0 or a plain 0 for the actual
> registers. I think GMBUS0 wins for being greppable.
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
I've applied these two to next, thanks for reviewing them.
-Daniel
--
Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48
next prev parent reply other threads:[~2012-03-24 14:56 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-03-23 22:43 [PATCH 1/2] drm/i915/sdov: switch IS_SDVOB to a flag Daniel Vetter
2012-03-23 22:43 ` [PATCH 2/2] drm/i915: add an explict mmio base for gpio/gmbus io Daniel Vetter
2012-03-23 23:01 ` Chris Wilson
2012-03-24 14:57 ` Daniel Vetter [this message]
2012-03-25 20:37 ` Daniel Vetter
2012-03-23 22:59 ` [PATCH 1/2] drm/i915/sdov: switch IS_SDVOB to a flag Chris Wilson
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