From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 6/6] drm/i915: Remove gen3 irq code from gen4 irq routine
Date: Tue, 24 Apr 2012 12:51:24 -0700 [thread overview]
Message-ID: <20120424125124.24407459@jbarnes-desktop> (raw)
In-Reply-To: <1335288691-21819-6-git-send-email-chris@chris-wilson.co.uk>
On Tue, 24 Apr 2012 18:31:31 +0100
Chris Wilson <chris@chris-wilson.co.uk> wrote:
> ---
> drivers/gpu/drm/i915/i915_irq.c | 27 ++++++++++-----------------
> 1 file changed, 10 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 47a540a..2ff431b 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -2625,23 +2625,17 @@ static irqreturn_t i965_irq_handler(DRM_IRQ_ARGS)
> struct drm_i915_master_private *master_priv;
> u32 iir, new_iir;
> u32 pipe_stats[I915_MAX_PIPES];
> - u32 vblank_status;
> - int vblank = 0;
> unsigned long irqflags;
> int irq_received;
> int ret = IRQ_NONE, pipe;
> - bool blc_event = false;
>
> atomic_inc(&dev_priv->irq_received);
>
> iir = I915_READ(IIR);
>
> - if (INTEL_INFO(dev)->gen >= 4)
> - vblank_status = PIPE_START_VBLANK_INTERRUPT_STATUS;
> - else
> - vblank_status = PIPE_VBLANK_INTERRUPT_STATUS;
> -
> for (;;) {
> + bool blc_event = false;
> +
> irq_received = iir != 0;
>
> /* Can't rely on pipestat interrupt bit in iir as it might
> @@ -2693,13 +2687,6 @@ static irqreturn_t i965_irq_handler(DRM_IRQ_ARGS)
> I915_WRITE(IIR, iir);
> new_iir = I915_READ(IIR); /* Flush posted writes */
>
> - if (dev->primary->master) {
> - master_priv = dev->primary->master->driver_priv;
> - if (master_priv->sarea_priv)
> - master_priv->sarea_priv->last_dispatch =
> - READ_BREADCRUMB(dev_priv);
> - }
> -
> if (iir & I915_USER_INTERRUPT)
> notify_ring(dev, &dev_priv->ring[RCS]);
> if (iir & I915_BSD_USER_INTERRUPT)
> @@ -2712,9 +2699,8 @@ static irqreturn_t i965_irq_handler(DRM_IRQ_ARGS)
> intel_prepare_page_flip(dev, 1);
>
> for_each_pipe(pipe) {
> - if (pipe_stats[pipe] & vblank_status &&
> + if (pipe_stats[pipe] & PIPE_START_VBLANK_INTERRUPT_STATUS &&
> drm_handle_vblank(dev, pipe)) {
> - vblank++;
> i915_pageflip_stall_check(dev, pipe);
> intel_finish_page_flip(dev, pipe);
> }
> @@ -2745,6 +2731,13 @@ static irqreturn_t i965_irq_handler(DRM_IRQ_ARGS)
> iir = new_iir;
> }
>
> + if (dev->primary->master) {
> + master_priv = dev->primary->master->driver_priv;
> + if (master_priv->sarea_priv)
> + master_priv->sarea_priv->last_dispatch =
> + READ_BREADCRUMB(dev_priv);
> + }
> +
> return ret;
> }
>
Looks good.
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
--
Jesse Barnes, Intel Open Source Technology Center
next prev parent reply other threads:[~2012-04-24 19:51 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-04-24 17:31 [PATCH 1/6] drm/i915: Unconditionally initialise the interrupt workers Chris Wilson
2012-04-24 17:31 ` [PATCH 2/6] drm/i915: Remove redundant initialisation of per-ring IRQ waitqueues Chris Wilson
2012-04-24 19:14 ` Jesse Barnes
2012-04-24 17:31 ` [PATCH 3/6] drm/i915: pending_flip_is_done is gen3, name it so Chris Wilson
2012-04-24 19:15 ` Jesse Barnes
2012-04-24 17:31 ` [PATCH 4/6] drm/i915: Duplicate and split the gen3/4 irq handler Chris Wilson
2012-04-24 17:31 ` [PATCH 5/6] drm/i915: Handle PendingFlip on gen3 robustly Chris Wilson
2012-04-24 19:50 ` Jesse Barnes
2012-04-24 19:58 ` Daniel Vetter
2012-04-24 20:39 ` Chris Wilson
2012-04-24 17:31 ` [PATCH 6/6] drm/i915: Remove gen3 irq code from gen4 irq routine Chris Wilson
2012-04-24 19:51 ` Jesse Barnes [this message]
2012-04-24 19:12 ` [PATCH 1/6] drm/i915: Unconditionally initialise the interrupt workers Jesse Barnes
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