* [PATCH] drm/i915: Report amount of usable graphics memory in MiB
@ 2012-11-11 9:34 Chris Wilson
2012-11-11 17:34 ` Ben Widawsky
0 siblings, 1 reply; 4+ messages in thread
From: Chris Wilson @ 2012-11-11 9:34 UTC (permalink / raw)
To: intel-gfx
...rather than kilo-PTE.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index e7515e8..938710a 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -708,7 +708,7 @@ int i915_gem_gtt_init(struct drm_device *dev)
}
/* GMADR is the PCI aperture used by SW to access tiled GFX surfaces in a linear fashion. */
- DRM_INFO("Memory Usable by graphics device = %dK\n", dev_priv->mm.gtt->gtt_total_entries >> 10);
+ DRM_INFO("Memory Usable by graphics device = %dM\n", dev_priv->mm.gtt->gtt_total_entries >> 8);
DRM_DEBUG_DRIVER("GMADR size = %dM\n", dev_priv->mm.gtt->gtt_mappable_entries >> 8);
DRM_DEBUG_DRIVER("GTT stolen size = %dM\n", dev_priv->mm.gtt->stolen_size >> 20);
--
1.7.10.4
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/i915: Report amount of usable graphics memory in MiB
2012-11-11 9:34 [PATCH] drm/i915: Report amount of usable graphics memory in MiB Chris Wilson
@ 2012-11-11 17:34 ` Ben Widawsky
2012-11-11 17:48 ` Daniel Vetter
0 siblings, 1 reply; 4+ messages in thread
From: Ben Widawsky @ 2012-11-11 17:34 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
On Sun, 11 Nov 2012 09:34:45 +0000
Chris Wilson <chris@chris-wilson.co.uk> wrote:
> ...rather than kilo-PTE.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index e7515e8..938710a 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -708,7 +708,7 @@ int i915_gem_gtt_init(struct drm_device *dev)
> }
>
> /* GMADR is the PCI aperture used by SW to access tiled GFX surfaces in a linear fashion. */
> - DRM_INFO("Memory Usable by graphics device = %dK\n", dev_priv->mm.gtt->gtt_total_entries >> 10);
> + DRM_INFO("Memory Usable by graphics device = %dM\n", dev_priv->mm.gtt->gtt_total_entries >> 8);
> DRM_DEBUG_DRIVER("GMADR size = %dM\n", dev_priv->mm.gtt->gtt_mappable_entries >> 8);
> DRM_DEBUG_DRIVER("GTT stolen size = %dM\n", dev_priv->mm.gtt->stolen_size >> 20);
>
Shouldn't it be >> 18 though, not >> 8?
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/i915: Report amount of usable graphics memory in MiB
2012-11-11 17:34 ` Ben Widawsky
@ 2012-11-11 17:48 ` Daniel Vetter
2012-11-11 18:34 ` Ben Widawsky
0 siblings, 1 reply; 4+ messages in thread
From: Daniel Vetter @ 2012-11-11 17:48 UTC (permalink / raw)
To: Ben Widawsky; +Cc: intel-gfx
On Sun, Nov 11, 2012 at 09:34:06AM -0800, Ben Widawsky wrote:
> On Sun, 11 Nov 2012 09:34:45 +0000
> Chris Wilson <chris@chris-wilson.co.uk> wrote:
>
> > ...rather than kilo-PTE.
> >
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > ---
> > drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > index e7515e8..938710a 100644
> > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > @@ -708,7 +708,7 @@ int i915_gem_gtt_init(struct drm_device *dev)
> > }
> >
> > /* GMADR is the PCI aperture used by SW to access tiled GFX surfaces in a linear fashion. */
> > - DRM_INFO("Memory Usable by graphics device = %dK\n", dev_priv->mm.gtt->gtt_total_entries >> 10);
> > + DRM_INFO("Memory Usable by graphics device = %dM\n", dev_priv->mm.gtt->gtt_total_entries >> 8);
> > DRM_DEBUG_DRIVER("GMADR size = %dM\n", dev_priv->mm.gtt->gtt_mappable_entries >> 8);
> > DRM_DEBUG_DRIVER("GTT stolen size = %dM\n", dev_priv->mm.gtt->stolen_size >> 20);
> >
>
> Shouldn't it be >> 18 though, not >> 8?
Each pte entry stands for a 4k page, so entries is already size >> 12, so
we only need to shift by 8 to get M. Patch merged to dinq.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/i915: Report amount of usable graphics memory in MiB
2012-11-11 17:48 ` Daniel Vetter
@ 2012-11-11 18:34 ` Ben Widawsky
0 siblings, 0 replies; 4+ messages in thread
From: Ben Widawsky @ 2012-11-11 18:34 UTC (permalink / raw)
To: Daniel Vetter; +Cc: intel-gfx
On Sun, 11 Nov 2012 18:48:55 +0100
Daniel Vetter <daniel@ffwll.ch> wrote:
> On Sun, Nov 11, 2012 at 09:34:06AM -0800, Ben Widawsky wrote:
> > On Sun, 11 Nov 2012 09:34:45 +0000
> > Chris Wilson <chris@chris-wilson.co.uk> wrote:
> >
> > > ...rather than kilo-PTE.
> > >
> > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > > ---
> > > drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > > index e7515e8..938710a 100644
> > > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> > > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > > @@ -708,7 +708,7 @@ int i915_gem_gtt_init(struct drm_device *dev)
> > > }
> > >
> > > /* GMADR is the PCI aperture used by SW to access tiled GFX surfaces in a linear fashion. */
> > > - DRM_INFO("Memory Usable by graphics device = %dK\n", dev_priv->mm.gtt->gtt_total_entries >> 10);
> > > + DRM_INFO("Memory Usable by graphics device = %dM\n", dev_priv->mm.gtt->gtt_total_entries >> 8);
> > > DRM_DEBUG_DRIVER("GMADR size = %dM\n", dev_priv->mm.gtt->gtt_mappable_entries >> 8);
> > > DRM_DEBUG_DRIVER("GTT stolen size = %dM\n", dev_priv->mm.gtt->stolen_size >> 20);
> > >
> >
> > Shouldn't it be >> 18 though, not >> 8?
>
> Each pte entry stands for a 4k page, so entries is already size >> 12, so
> we only need to shift by 8 to get M. Patch merged to dinq.
> -Daniel
Looking through the code it didn't seem to match what you're saying,
but I do agree, it's ((total entries << 12)) >> 20) which is total
entries >> 8. I've verified it too on my machine. I'll blame it on a
lack of caffeine.
Please make "usable" lower case while you're at it.
^ permalink raw reply [flat|nested] 4+ messages in thread
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2012-11-11 9:34 [PATCH] drm/i915: Report amount of usable graphics memory in MiB Chris Wilson
2012-11-11 17:34 ` Ben Widawsky
2012-11-11 17:48 ` Daniel Vetter
2012-11-11 18:34 ` Ben Widawsky
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