[PATCH] drm/i915: Use I915_MAX_PIPES instead of hardcoded value

[PATCH] drm/i915: Use I915_MAX_PIPES instead of hardcoded value

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The pipestat array size should have space for every pipe in the system.
Use the define we have for it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e95337c..9fe78f7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -905,7 +905,7 @@ typedef struct drm_i915_private {
 	struct mutex dpio_lock;
 
 	/** Cached value of IMR to avoid reads in updating the bitfield */
-	u32 pipestat[2];
+	u32 pipestat[I915_MAX_PIPES];
 	u32 irq_mask;
 	u32 gt_irq_mask;
 
-- 
1.7.12.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915: Use I915_MAX_PIPES instead of hardcoded value

[Chris Wilson]

On Wed, Feb 20, 2013 at 04:47:16PM +0200, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> The pipestat array size should have space for every pipe in the system.
> Use the define we have for it.

Tbh, I think that cache should die. I think the hitrate is near zero,
and offers no benefit over just writing the register directly.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre

Re: [PATCH] drm/i915: Use I915_MAX_PIPES instead of hardcoded value

[Jesse Barnes]

On Wed, 20 Feb 2013 15:07:10 +0000
Chris Wilson <chris@chris-wilson.co.uk> wrote:

> On Wed, Feb 20, 2013 at 04:47:16PM +0200, ville.syrjala@linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > The pipestat array size should have space for every pipe in the system.
> > Use the define we have for it.
> 
> Tbh, I think that cache should die. I think the hitrate is near zero,
> and offers no benefit over just writing the register directly.
> -Chris
> 

Seconded.

-- 
Jesse Barnes, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx