* [PATCH] drm/i915: Fix pipe enabled mask for pipe C in WM calculations
@ 2013-03-20 19:51 ville.syrjala
2013-03-20 22:05 ` [Intel-gfx] " Daniel Vetter
0 siblings, 1 reply; 5+ messages in thread
From: ville.syrjala @ 2013-03-20 19:51 UTC (permalink / raw)
To: intel-gfx; +Cc: stable
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 8a3d89e..89a2d6f 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -1943,7 +1943,7 @@ static void ivybridge_update_wm(struct drm_device *dev)
DRM_DEBUG_KMS("FIFO watermarks For pipe C -"
" plane %d, cursor: %d\n",
plane_wm, cursor_wm);
- enabled |= 3;
+ enabled |= 4;
}
/*
--
1.8.1.5
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [Intel-gfx] [PATCH] drm/i915: Fix pipe enabled mask for pipe C in WM calculations
2013-03-20 19:51 [PATCH] drm/i915: Fix pipe enabled mask for pipe C in WM calculations ville.syrjala
@ 2013-03-20 22:05 ` Daniel Vetter
2013-03-20 22:39 ` Chris Wilson
0 siblings, 1 reply; 5+ messages in thread
From: Daniel Vetter @ 2013-03-20 22:05 UTC (permalink / raw)
To: ville.syrjala; +Cc: intel-gfx, stable
On Wed, Mar 20, 2013 at 09:51:05PM +0200, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Cc: stable@vger.kernel.org
One of the stable rules is that patches should fix real issues. So can you
please hunt through bugzillas quickly and feed this to relevant bug
reports?
-Daniel
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 8a3d89e..89a2d6f 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -1943,7 +1943,7 @@ static void ivybridge_update_wm(struct drm_device *dev)
> DRM_DEBUG_KMS("FIFO watermarks For pipe C -"
> " plane %d, cursor: %d\n",
> plane_wm, cursor_wm);
> - enabled |= 3;
> + enabled |= 4;
> }
>
> /*
> --
> 1.8.1.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [Intel-gfx] [PATCH] drm/i915: Fix pipe enabled mask for pipe C in WM calculations
2013-03-20 22:05 ` [Intel-gfx] " Daniel Vetter
@ 2013-03-20 22:39 ` Chris Wilson
2013-03-20 22:49 ` Daniel Vetter
2013-03-20 22:50 ` Jesse Barnes
0 siblings, 2 replies; 5+ messages in thread
From: Chris Wilson @ 2013-03-20 22:39 UTC (permalink / raw)
To: Daniel Vetter; +Cc: ville.syrjala, intel-gfx, stable
On Wed, Mar 20, 2013 at 11:05:37PM +0100, Daniel Vetter wrote:
> On Wed, Mar 20, 2013 at 09:51:05PM +0200, ville.syrjala@linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Cc: stable@vger.kernel.org
>
> One of the stable rules is that patches should fix real issues. So can you
> please hunt through bugzillas quickly and feed this to relevant bug
> reports?
It would take an astute user to notice that his machine was not using a
lower power self-refresh FIFO mode. And the number of machines that only
set up the third pipe is going to be small, so the impact minor. It
will not fix any of the three pipe issues we have open, for example.
The patch is correct, though had I used enabled |= 1 << PIPE_[ABC] it
would have probably prevented this bug.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915: Fix pipe enabled mask for pipe C in WM calculations
2013-03-20 22:39 ` Chris Wilson
@ 2013-03-20 22:49 ` Daniel Vetter
2013-03-20 22:50 ` Jesse Barnes
1 sibling, 0 replies; 5+ messages in thread
From: Daniel Vetter @ 2013-03-20 22:49 UTC (permalink / raw)
To: Chris Wilson, Daniel Vetter, ville.syrjala, intel-gfx, stable
On Wed, Mar 20, 2013 at 11:39 PM, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> On Wed, Mar 20, 2013 at 11:05:37PM +0100, Daniel Vetter wrote:
>> On Wed, Mar 20, 2013 at 09:51:05PM +0200, ville.syrjala@linux.intel.com wrote:
>> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> >
>> > Cc: stable@vger.kernel.org
>>
>> One of the stable rules is that patches should fix real issues. So can you
>> please hunt through bugzillas quickly and feed this to relevant bug
>> reports?
>
> It would take an astute user to notice that his machine was not using a
> lower power self-refresh FIFO mode. And the number of machines that only
> set up the third pipe is going to be small, so the impact minor. It
> will not fix any of the three pipe issues we have open, for example.
Ah, lazy me didn't read the docs. Low power fifo mode is indeed hard
to report in a bug ;-)
> The patch is correct, though had I used enabled |= 1 << PIPE_[ABC] it
> would have probably prevented this bug.
This would be quite a bit less magic I think. Can I have it, please?
-Daniel
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: Fix pipe enabled mask for pipe C in WM calculations
2013-03-20 22:39 ` Chris Wilson
2013-03-20 22:49 ` Daniel Vetter
@ 2013-03-20 22:50 ` Jesse Barnes
1 sibling, 0 replies; 5+ messages in thread
From: Jesse Barnes @ 2013-03-20 22:50 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
On Wed, 20 Mar 2013 22:39:33 +0000
Chris Wilson <chris@chris-wilson.co.uk> wrote:
> On Wed, Mar 20, 2013 at 11:05:37PM +0100, Daniel Vetter wrote:
> > On Wed, Mar 20, 2013 at 09:51:05PM +0200, ville.syrjala@linux.intel.com wrote:
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > >
> > > Cc: stable@vger.kernel.org
> >
> > One of the stable rules is that patches should fix real issues. So can you
> > please hunt through bugzillas quickly and feed this to relevant bug
> > reports?
>
> It would take an astute user to notice that his machine was not using a
> lower power self-refresh FIFO mode. And the number of machines that only
> set up the third pipe is going to be small, so the impact minor. It
> will not fix any of the three pipe issues we have open, for example.
>
> The patch is correct, though had I used enabled |= 1 << PIPE_[ABC] it
> would have probably prevented this bug.
>
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
My fault; I had to merge the initial 3 pipe code after Chris changed
this and added the enabled bitfield. I remember complaining about it
at the time, I must have been feeling passive-aggressive and snuck the
bug in. :)
--
Jesse Barnes, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
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2013-03-20 19:51 [PATCH] drm/i915: Fix pipe enabled mask for pipe C in WM calculations ville.syrjala
2013-03-20 22:05 ` [Intel-gfx] " Daniel Vetter
2013-03-20 22:39 ` Chris Wilson
2013-03-20 22:49 ` Daniel Vetter
2013-03-20 22:50 ` Jesse Barnes
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