From: Daniel Vetter <daniel@ffwll.ch>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>,
Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 1/5] drm/i915: s/TRANSCONF/PCH_TRANSCONF/
Date: Fri, 3 May 2013 11:19:23 +0200 [thread overview]
Message-ID: <20130503091923.GK5763@phenom.ffwll.local> (raw)
In-Reply-To: <CA+gsUGQ9AagV27EN7Hsv4ocuQ0+XjJrdt+wms-L9vwZAoO9fWg@mail.gmail.com>
On Thu, May 02, 2013 at 03:12:07PM -0300, Paulo Zanoni wrote:
> Hi
>
> 2013/5/1 Daniel Vetter <daniel.vetter@ffwll.ch>:
> > Every time I read hsw code I get completely confused about this. So
> > call it what it is more explicitly.
> >
> > Also, add an LPT_TRANSCONF for the pch transcoder A and use it in
> > lpt-only code, to really unconfuse me.
> >
> > Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 7 ++++---
> > drivers/gpu/drm/i915/i915_ums.c | 8 ++++----
> > drivers/gpu/drm/i915/intel_display.c | 30 +++++++++++++++---------------
> > 3 files changed, 23 insertions(+), 22 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index 95ae5cf..d06a571 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -4058,9 +4058,10 @@
> > #define TRANSDPLINK_M2(pipe) _PIPE(pipe, _TRANSA_DP_LINK_M2, _TRANSB_DP_LINK_M2)
> > #define TRANSDPLINK_N2(pipe) _PIPE(pipe, _TRANSA_DP_LINK_N2, _TRANSB_DP_LINK_N2)
> >
> > -#define _TRANSACONF 0xf0008
> > -#define _TRANSBCONF 0xf1008
> > -#define TRANSCONF(plane) _PIPE(plane, _TRANSACONF, _TRANSBCONF)
> > +#define _PCH_TRANSACONF 0xf0008
> > +#define _PCH_TRANSBCONF 0xf1008
> > +#define PCH_TRANSCONF(plane) _PIPE(plane, _PCH_TRANSACONF, _PCH_TRANSBCONF)
> > +#define LPT_TRANSCONF _PCH_TRANSACONF /* lpt has only one transcoder */
>
> Since we're already touching the macros, I need to point that we call
> the argument "plane" but use the _PIPE macro, when it's actually a
> transcoder :)
Yeah, plane is wrong ;-) But I've opted for PIPE instead, since the
disdinction between transcoder and pipe is only relevant on hsw cpu stuff,
and I very much don't expect the pch to grow an eDP transcoder.
Imo that helps quite a bit since the crtc->pipe mapping is fixed, but the
transcoder stuff depends upon the configuration. Hence why I prefer pipe
if possible.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
next prev parent reply other threads:[~2013-05-03 9:16 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-01 16:03 [PATCH 1/5] drm/i915: s/TRANSCONF/PCH_TRANSCONF/ Daniel Vetter
2013-05-01 16:03 ` [PATCH 2/5] drm/i915: PCH_ prefix for transcoder timings Daniel Vetter
2013-05-02 18:39 ` Paulo Zanoni
2013-05-01 16:03 ` [PATCH 3/5] drm/i915: make set_m_n functions static Daniel Vetter
2013-05-02 18:45 ` Paulo Zanoni
2013-05-01 16:03 ` [PATCH 4/5] drm/i915: Apply OCD to data/link m/n register #defines Daniel Vetter
2013-05-02 20:36 ` Paulo Zanoni
2013-05-03 9:15 ` Daniel Vetter
2013-05-01 16:03 ` [PATCH 5/5] drm/i915: make intel_cpt_verify_modeset static Daniel Vetter
2013-05-02 20:40 ` Paulo Zanoni
2013-05-02 18:12 ` [PATCH 1/5] drm/i915: s/TRANSCONF/PCH_TRANSCONF/ Paulo Zanoni
2013-05-03 9:19 ` Daniel Vetter [this message]
2013-05-03 9:49 ` [PATCH 1/6] " Daniel Vetter
2013-05-03 9:49 ` [PATCH 2/6] drm/i915: PCH_ prefix for transcoder timings Daniel Vetter
2013-05-03 14:16 ` Paulo Zanoni
2013-05-06 9:29 ` Daniel Vetter
2013-05-03 9:49 ` [PATCH 3/6] drm/i915: make set_m_n functions static Daniel Vetter
2013-05-03 9:49 ` [PATCH 4/6] drm/i915: Apply OCD to data/link m/n register #defines Daniel Vetter
2013-05-03 9:49 ` [PATCH 5/6] drm/i915: make intel_cpt_verify_modeset static Daniel Vetter
2013-05-03 9:49 ` [PATCH 6/6] drm/i915: fix up adjusted_mode tracking for interlaced modes Daniel Vetter
2013-05-03 11:24 ` Daniel Vetter
2013-05-03 14:31 ` Paulo Zanoni
2013-05-06 9:24 ` Daniel Vetter
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