Re: [PATCH 6/9] drm/i915: make intel_ddi_get_cdclk_freq return values in KHz

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Fri, May 03, 2013 at 05:23:42PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> 
> With this, that 338 can finally become the correct 337500.
> 
> Due to the change we need to adjust the intel_dp_aux_ch function to
> set the correct value, so adjust the division and also use
> DIV_ROUND_CLOSEST instead of the old "round down" behavior because the
> spec says the value "should be programmed to get as close as possible
> to the ideal rate of 2MHz".
> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_ddi.c |   10 +++++-----
>  drivers/gpu/drm/i915/intel_dp.c  |    3 ++-
>  2 files changed, 7 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 21fb852..e5b1b63 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -1335,14 +1335,14 @@ static void intel_disable_ddi(struct intel_encoder *intel_encoder)
>  int intel_ddi_get_cdclk_freq(struct drm_i915_private *dev_priv)
>  {
>  	if (I915_READ(HSW_FUSE_STRAP) & HSW_CDCLK_LIMIT)
> -		return 450;
> +		return 450000;
>  	else if ((I915_READ(LCPLL_CTL) & LCPLL_CLK_FREQ_MASK) ==
>  		 LCPLL_CLK_FREQ_450)
> -		return 450;
> +		return 450000;
>  	else if (IS_ULT(dev_priv->dev))
> -		return 338;
> +		return 337500;
>  	else
> -		return 540;
> +		return 540000;
>  }
>  
>  void intel_ddi_pll_init(struct drm_device *dev)
> @@ -1355,7 +1355,7 @@ void intel_ddi_pll_init(struct drm_device *dev)
>  	 * Don't even try to turn it on.
>  	 */
>  
> -	DRM_DEBUG_KMS("CDCLK running at %dMHz\n",
> +	DRM_DEBUG_KMS("CDCLK running at %dKHz\n",
>  		      intel_ddi_get_cdclk_freq(dev_priv));
>  
>  	if (val & LCPLL_CD_SOURCE_FCLK)
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index a293523..3df1383 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -346,7 +346,8 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
>  	 */
>  	if (is_cpu_edp(intel_dp)) {
>  		if (HAS_DDI(dev))
> -			aux_clock_divider = intel_ddi_get_cdclk_freq(dev_priv) >> 1;
> +			aux_clock_divider = DIV_ROUND_CLOSEST(
> +				intel_ddi_get_cdclk_freq(dev_priv), 2000);
>  		else if (IS_VALLEYVIEW(dev))
>  			aux_clock_divider = 100;
>  		else if (IS_GEN6(dev) || IS_GEN7(dev))
> -- 
> 1.7.10.4
> 
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-- 
Ville Syrjälä
Intel OTC