* [PATCH] drm/i915: Preserve the DDI_A_4_LANES bit from the bios
@ 2013-07-12 20:54 Stéphane Marchesin
2013-07-12 22:19 ` Paulo Zanoni
0 siblings, 1 reply; 7+ messages in thread
From: Stéphane Marchesin @ 2013-07-12 20:54 UTC (permalink / raw)
To: intel-gfx
Otherwise the DDI_A_4_LANES bit gets lost and we can't use > 2 lanes
on eDP. This fixes eDP on hsw with > 2 lanes.
Also s/port_reversal/saved_port_bits/ since the current name is
confusing.
Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
---
drivers/gpu/drm/i915/intel_ddi.c | 10 ++++++----
drivers/gpu/drm/i915/intel_drv.h | 2 +-
2 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 324211a..b042ee5 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -301,7 +301,7 @@ static void intel_ddi_mode_set(struct drm_encoder *encoder,
struct intel_digital_port *intel_dig_port =
enc_to_dig_port(encoder);
- intel_dp->DP = intel_dig_port->port_reversal |
+ intel_dp->DP = intel_dig_port->saved_port_bits |
DDI_BUF_CTL_ENABLE | DDI_BUF_EMP_400MV_0DB_HSW;
intel_dp->DP |= DDI_PORT_WIDTH(intel_dp->lane_count);
@@ -1109,7 +1109,8 @@ static void intel_enable_ddi(struct intel_encoder *intel_encoder)
* enabling the port.
*/
I915_WRITE(DDI_BUF_CTL(port),
- intel_dig_port->port_reversal | DDI_BUF_CTL_ENABLE);
+ intel_dig_port->saved_port_bits |
+ DDI_BUF_CTL_ENABLE);
} else if (type == INTEL_OUTPUT_EDP) {
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
@@ -1347,8 +1348,9 @@ void intel_ddi_init(struct drm_device *dev, enum port port)
intel_encoder->get_config = intel_ddi_get_config;
intel_dig_port->port = port;
- intel_dig_port->port_reversal = I915_READ(DDI_BUF_CTL(port)) &
- DDI_BUF_PORT_REVERSAL;
+ intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
+ (DDI_BUF_PORT_REVERSAL |
+ DDI_A_4_LANES);
intel_dig_port->dp.output_reg = DDI_BUF_CTL(port);
intel_encoder->type = INTEL_OUTPUT_UNKNOWN;
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index c8c9b6f..b7d6e09 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -504,7 +504,7 @@ struct intel_dp {
struct intel_digital_port {
struct intel_encoder base;
enum port port;
- u32 port_reversal;
+ u32 saved_port_bits;
struct intel_dp dp;
struct intel_hdmi hdmi;
};
--
1.8.3
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH] drm/i915: Preserve the DDI_A_4_LANES bit from the bios
2013-07-12 20:54 [PATCH] drm/i915: Preserve the DDI_A_4_LANES bit from the bios Stéphane Marchesin
@ 2013-07-12 22:19 ` Paulo Zanoni
2013-07-12 22:50 ` Paulo Zanoni
0 siblings, 1 reply; 7+ messages in thread
From: Paulo Zanoni @ 2013-07-12 22:19 UTC (permalink / raw)
To: Stéphane Marchesin; +Cc: intel-gfx
2013/7/12 Stéphane Marchesin <marcheu@chromium.org>:
> Otherwise the DDI_A_4_LANES bit gets lost and we can't use > 2 lanes
> on eDP. This fixes eDP on hsw with > 2 lanes.
>
> Also s/port_reversal/saved_port_bits/ since the current name is
> confusing.
>
> Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Should we also Cc: stable@kernel.org ?
> ---
> drivers/gpu/drm/i915/intel_ddi.c | 10 ++++++----
> drivers/gpu/drm/i915/intel_drv.h | 2 +-
> 2 files changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 324211a..b042ee5 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -301,7 +301,7 @@ static void intel_ddi_mode_set(struct drm_encoder *encoder,
> struct intel_digital_port *intel_dig_port =
> enc_to_dig_port(encoder);
>
> - intel_dp->DP = intel_dig_port->port_reversal |
> + intel_dp->DP = intel_dig_port->saved_port_bits |
> DDI_BUF_CTL_ENABLE | DDI_BUF_EMP_400MV_0DB_HSW;
> intel_dp->DP |= DDI_PORT_WIDTH(intel_dp->lane_count);
>
> @@ -1109,7 +1109,8 @@ static void intel_enable_ddi(struct intel_encoder *intel_encoder)
> * enabling the port.
> */
> I915_WRITE(DDI_BUF_CTL(port),
> - intel_dig_port->port_reversal | DDI_BUF_CTL_ENABLE);
> + intel_dig_port->saved_port_bits |
> + DDI_BUF_CTL_ENABLE);
> } else if (type == INTEL_OUTPUT_EDP) {
> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>
> @@ -1347,8 +1348,9 @@ void intel_ddi_init(struct drm_device *dev, enum port port)
> intel_encoder->get_config = intel_ddi_get_config;
>
> intel_dig_port->port = port;
> - intel_dig_port->port_reversal = I915_READ(DDI_BUF_CTL(port)) &
> - DDI_BUF_PORT_REVERSAL;
> + intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
> + (DDI_BUF_PORT_REVERSAL |
> + DDI_A_4_LANES);
> intel_dig_port->dp.output_reg = DDI_BUF_CTL(port);
>
> intel_encoder->type = INTEL_OUTPUT_UNKNOWN;
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index c8c9b6f..b7d6e09 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -504,7 +504,7 @@ struct intel_dp {
> struct intel_digital_port {
> struct intel_encoder base;
> enum port port;
> - u32 port_reversal;
> + u32 saved_port_bits;
> struct intel_dp dp;
> struct intel_hdmi hdmi;
> };
> --
> 1.8.3
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Paulo Zanoni
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH] drm/i915: Preserve the DDI_A_4_LANES bit from the bios
2013-07-12 22:19 ` Paulo Zanoni
@ 2013-07-12 22:50 ` Paulo Zanoni
2013-07-13 8:47 ` Daniel Vetter
0 siblings, 1 reply; 7+ messages in thread
From: Paulo Zanoni @ 2013-07-12 22:50 UTC (permalink / raw)
To: Stéphane Marchesin; +Cc: intel-gfx
2013/7/12 Paulo Zanoni <przanoni@gmail.com>:
> 2013/7/12 Stéphane Marchesin <marcheu@chromium.org>:
>> Otherwise the DDI_A_4_LANES bit gets lost and we can't use > 2 lanes
>> on eDP. This fixes eDP on hsw with > 2 lanes.
>>
>> Also s/port_reversal/saved_port_bits/ since the current name is
>> confusing.
>>
>> Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
>
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
>
> Should we also Cc: stable@kernel.org ?
And I forgot to mention: as discussed on IRC, we need 2 additional
patches on top of that:
- Don't intel_init_crt if DDI A has 4 lanes
- We should do our own wrapper around drm_dp_max_lane_count and return
minimum of drm_dp_max_lane_count and the value set on DDI_BUF_CTL_A
>
>> ---
>> drivers/gpu/drm/i915/intel_ddi.c | 10 ++++++----
>> drivers/gpu/drm/i915/intel_drv.h | 2 +-
>> 2 files changed, 7 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
>> index 324211a..b042ee5 100644
>> --- a/drivers/gpu/drm/i915/intel_ddi.c
>> +++ b/drivers/gpu/drm/i915/intel_ddi.c
>> @@ -301,7 +301,7 @@ static void intel_ddi_mode_set(struct drm_encoder *encoder,
>> struct intel_digital_port *intel_dig_port =
>> enc_to_dig_port(encoder);
>>
>> - intel_dp->DP = intel_dig_port->port_reversal |
>> + intel_dp->DP = intel_dig_port->saved_port_bits |
>> DDI_BUF_CTL_ENABLE | DDI_BUF_EMP_400MV_0DB_HSW;
>> intel_dp->DP |= DDI_PORT_WIDTH(intel_dp->lane_count);
>>
>> @@ -1109,7 +1109,8 @@ static void intel_enable_ddi(struct intel_encoder *intel_encoder)
>> * enabling the port.
>> */
>> I915_WRITE(DDI_BUF_CTL(port),
>> - intel_dig_port->port_reversal | DDI_BUF_CTL_ENABLE);
>> + intel_dig_port->saved_port_bits |
>> + DDI_BUF_CTL_ENABLE);
>> } else if (type == INTEL_OUTPUT_EDP) {
>> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>>
>> @@ -1347,8 +1348,9 @@ void intel_ddi_init(struct drm_device *dev, enum port port)
>> intel_encoder->get_config = intel_ddi_get_config;
>>
>> intel_dig_port->port = port;
>> - intel_dig_port->port_reversal = I915_READ(DDI_BUF_CTL(port)) &
>> - DDI_BUF_PORT_REVERSAL;
>> + intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
>> + (DDI_BUF_PORT_REVERSAL |
>> + DDI_A_4_LANES);
>> intel_dig_port->dp.output_reg = DDI_BUF_CTL(port);
>>
>> intel_encoder->type = INTEL_OUTPUT_UNKNOWN;
>> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
>> index c8c9b6f..b7d6e09 100644
>> --- a/drivers/gpu/drm/i915/intel_drv.h
>> +++ b/drivers/gpu/drm/i915/intel_drv.h
>> @@ -504,7 +504,7 @@ struct intel_dp {
>> struct intel_digital_port {
>> struct intel_encoder base;
>> enum port port;
>> - u32 port_reversal;
>> + u32 saved_port_bits;
>> struct intel_dp dp;
>> struct intel_hdmi hdmi;
>> };
>> --
>> 1.8.3
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
>
>
> --
> Paulo Zanoni
--
Paulo Zanoni
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH] drm/i915: Preserve the DDI_A_4_LANES bit from the bios
2013-07-12 22:50 ` Paulo Zanoni
@ 2013-07-13 8:47 ` Daniel Vetter
0 siblings, 0 replies; 7+ messages in thread
From: Daniel Vetter @ 2013-07-13 8:47 UTC (permalink / raw)
To: Paulo Zanoni; +Cc: intel-gfx
On Fri, Jul 12, 2013 at 07:50:31PM -0300, Paulo Zanoni wrote:
> 2013/7/12 Paulo Zanoni <przanoni@gmail.com>:
> > 2013/7/12 Stéphane Marchesin <marcheu@chromium.org>:
> >> Otherwise the DDI_A_4_LANES bit gets lost and we can't use > 2 lanes
> >> on eDP. This fixes eDP on hsw with > 2 lanes.
> >>
> >> Also s/port_reversal/saved_port_bits/ since the current name is
> >> confusing.
> >>
> >> Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Picked up for -fixes, thanks for the patch.
> >
> > Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> >
> > Should we also Cc: stable@kernel.org ?
Done.
>
> And I forgot to mention: as discussed on IRC, we need 2 additional
> patches on top of that:
> - Don't intel_init_crt if DDI A has 4 lanes
> - We should do our own wrapper around drm_dp_max_lane_count and return
> minimum of drm_dp_max_lane_count and the value set on DDI_BUF_CTL_A
Yeah. We have a similar issue with dp link speeds past 2.7 Ghz (and maybe
also the in-between special link clocks for eDP) where we need to apply
platform/port specific limits on top of the sink limits. I'd say we should
add those parameters to our dp structure so that the init code can fill it
out.
-Daniel
>
> >
> >> ---
> >> drivers/gpu/drm/i915/intel_ddi.c | 10 ++++++----
> >> drivers/gpu/drm/i915/intel_drv.h | 2 +-
> >> 2 files changed, 7 insertions(+), 5 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> >> index 324211a..b042ee5 100644
> >> --- a/drivers/gpu/drm/i915/intel_ddi.c
> >> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> >> @@ -301,7 +301,7 @@ static void intel_ddi_mode_set(struct drm_encoder *encoder,
> >> struct intel_digital_port *intel_dig_port =
> >> enc_to_dig_port(encoder);
> >>
> >> - intel_dp->DP = intel_dig_port->port_reversal |
> >> + intel_dp->DP = intel_dig_port->saved_port_bits |
> >> DDI_BUF_CTL_ENABLE | DDI_BUF_EMP_400MV_0DB_HSW;
> >> intel_dp->DP |= DDI_PORT_WIDTH(intel_dp->lane_count);
> >>
> >> @@ -1109,7 +1109,8 @@ static void intel_enable_ddi(struct intel_encoder *intel_encoder)
> >> * enabling the port.
> >> */
> >> I915_WRITE(DDI_BUF_CTL(port),
> >> - intel_dig_port->port_reversal | DDI_BUF_CTL_ENABLE);
> >> + intel_dig_port->saved_port_bits |
> >> + DDI_BUF_CTL_ENABLE);
> >> } else if (type == INTEL_OUTPUT_EDP) {
> >> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> >>
> >> @@ -1347,8 +1348,9 @@ void intel_ddi_init(struct drm_device *dev, enum port port)
> >> intel_encoder->get_config = intel_ddi_get_config;
> >>
> >> intel_dig_port->port = port;
> >> - intel_dig_port->port_reversal = I915_READ(DDI_BUF_CTL(port)) &
> >> - DDI_BUF_PORT_REVERSAL;
> >> + intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
> >> + (DDI_BUF_PORT_REVERSAL |
> >> + DDI_A_4_LANES);
> >> intel_dig_port->dp.output_reg = DDI_BUF_CTL(port);
> >>
> >> intel_encoder->type = INTEL_OUTPUT_UNKNOWN;
> >> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> >> index c8c9b6f..b7d6e09 100644
> >> --- a/drivers/gpu/drm/i915/intel_drv.h
> >> +++ b/drivers/gpu/drm/i915/intel_drv.h
> >> @@ -504,7 +504,7 @@ struct intel_dp {
> >> struct intel_digital_port {
> >> struct intel_encoder base;
> >> enum port port;
> >> - u32 port_reversal;
> >> + u32 saved_port_bits;
> >> struct intel_dp dp;
> >> struct intel_hdmi hdmi;
> >> };
> >> --
> >> 1.8.3
> >>
> >> _______________________________________________
> >> Intel-gfx mailing list
> >> Intel-gfx@lists.freedesktop.org
> >> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> >
> >
> >
> > --
> > Paulo Zanoni
>
>
>
> --
> Paulo Zanoni
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH] drm/i915: Preserve the DDI_A_4_LANES bit from the bios
@ 2013-07-12 20:03 Stéphane Marchesin
2013-07-12 20:07 ` Jesse Barnes
2013-07-12 20:08 ` Daniel Vetter
0 siblings, 2 replies; 7+ messages in thread
From: Stéphane Marchesin @ 2013-07-12 20:03 UTC (permalink / raw)
To: intel-gfx
Otherwise the DDI_A_4_LANES bit gets lost and we can't use > 2 lanes
on eDP. This fixes eDP on hsw with > 2 lanes.
Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
---
drivers/gpu/drm/i915/intel_ddi.c | 2 +-
drivers/gpu/drm/i915/intel_dp.c | 5 +++--
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 324211a..5e3f97b 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1348,7 +1348,7 @@ void intel_ddi_init(struct drm_device *dev, enum port port)
intel_dig_port->port = port;
intel_dig_port->port_reversal = I915_READ(DDI_BUF_CTL(port)) &
- DDI_BUF_PORT_REVERSAL;
+ (DDI_BUF_PORT_REVERSAL | DDI_A_4_LANES);
intel_dig_port->dp.output_reg = DDI_BUF_CTL(port);
intel_encoder->type = INTEL_OUTPUT_UNKNOWN;
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index b739712..a1d838c 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -834,10 +834,11 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
* configuration happens (oddly) in ironlake_pch_enable
*/
- /* Preserve the BIOS-computed detected bit. This is
+ /* Preserve the BIOS-computed detected and 4 lanes bits. This is
* supposed to be read-only.
*/
- intel_dp->DP = I915_READ(intel_dp->output_reg) & DP_DETECTED;
+ intel_dp->DP = I915_READ(intel_dp->output_reg) &
+ (DP_DETECTED | DDI_A_4_LANES);
/* Handle DP bits in common between all three register formats */
intel_dp->DP |= DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0;
--
1.8.3
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915: Preserve the DDI_A_4_LANES bit from the bios
2013-07-12 20:03 Stéphane Marchesin
@ 2013-07-12 20:07 ` Jesse Barnes
2013-07-12 20:08 ` Daniel Vetter
1 sibling, 0 replies; 7+ messages in thread
From: Jesse Barnes @ 2013-07-12 20:07 UTC (permalink / raw)
To: Stéphane Marchesin; +Cc: intel-gfx
On Fri, 12 Jul 2013 13:03:46 -0700
Stéphane Marchesin <marcheu@chromium.org> wrote:
> Otherwise the DDI_A_4_LANES bit gets lost and we can't use > 2 lanes
> on eDP. This fixes eDP on hsw with > 2 lanes.
>
> Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
> ---
> drivers/gpu/drm/i915/intel_ddi.c | 2 +-
> drivers/gpu/drm/i915/intel_dp.c | 5 +++--
> 2 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 324211a..5e3f97b 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -1348,7 +1348,7 @@ void intel_ddi_init(struct drm_device *dev, enum port port)
>
> intel_dig_port->port = port;
> intel_dig_port->port_reversal = I915_READ(DDI_BUF_CTL(port)) &
> - DDI_BUF_PORT_REVERSAL;
> + (DDI_BUF_PORT_REVERSAL | DDI_A_4_LANES);
> intel_dig_port->dp.output_reg = DDI_BUF_CTL(port);
>
> intel_encoder->type = INTEL_OUTPUT_UNKNOWN;
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index b739712..a1d838c 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -834,10 +834,11 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
> * configuration happens (oddly) in ironlake_pch_enable
> */
>
> - /* Preserve the BIOS-computed detected bit. This is
> + /* Preserve the BIOS-computed detected and 4 lanes bits. This is
> * supposed to be read-only.
> */
> - intel_dp->DP = I915_READ(intel_dp->output_reg) & DP_DETECTED;
> + intel_dp->DP = I915_READ(intel_dp->output_reg) &
> + (DP_DETECTED | DDI_A_4_LANES);
>
> /* Handle DP bits in common between all three register formats */
> intel_dp->DP |= DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0;
Thanks. Wonder if we're clobbering any other "BIOS must set this bit
and no one should touch it again" bits elsewhere...
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
--
Jesse Barnes, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915: Preserve the DDI_A_4_LANES bit from the bios
2013-07-12 20:03 Stéphane Marchesin
2013-07-12 20:07 ` Jesse Barnes
@ 2013-07-12 20:08 ` Daniel Vetter
1 sibling, 0 replies; 7+ messages in thread
From: Daniel Vetter @ 2013-07-12 20:08 UTC (permalink / raw)
To: Stéphane Marchesin; +Cc: intel-gfx
On Fri, Jul 12, 2013 at 10:03 PM, Stéphane Marchesin
<marcheu@chromium.org> wrote:
> Otherwise the DDI_A_4_LANES bit gets lost and we can't use > 2 lanes
> on eDP. This fixes eDP on hsw with > 2 lanes.
>
> Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
> ---
> drivers/gpu/drm/i915/intel_ddi.c | 2 +-
> drivers/gpu/drm/i915/intel_dp.c | 5 +++--
> 2 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 324211a..5e3f97b 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -1348,7 +1348,7 @@ void intel_ddi_init(struct drm_device *dev, enum port port)
>
> intel_dig_port->port = port;
> intel_dig_port->port_reversal = I915_READ(DDI_BUF_CTL(port)) &
> - DDI_BUF_PORT_REVERSAL;
> + (DDI_BUF_PORT_REVERSAL | DDI_A_4_LANES);
I think we should do a s/port_reversal/saved_port_bits/ since the
current name is confusing.
> intel_dig_port->dp.output_reg = DDI_BUF_CTL(port);
>
> intel_encoder->type = INTEL_OUTPUT_UNKNOWN;
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index b739712..a1d838c 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -834,10 +834,11 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
> * configuration happens (oddly) in ironlake_pch_enable
> */
>
> - /* Preserve the BIOS-computed detected bit. This is
> + /* Preserve the BIOS-computed detected and 4 lanes bits. This is
> * supposed to be read-only.
> */
> - intel_dp->DP = I915_READ(intel_dp->output_reg) & DP_DETECTED;
> + intel_dp->DP = I915_READ(intel_dp->output_reg) &
> + (DP_DETECTED | DDI_A_4_LANES);
Why is this hunk here required? It seems to not be needed for the port
reversal stuff, and this code here is run on all platforms ... If
possible I'd like to just ditch it.
-Daniel
>
> /* Handle DP bits in common between all three register formats */
> intel_dp->DP |= DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0;
> --
> 1.8.3
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2013-07-13 8:47 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-07-12 20:54 [PATCH] drm/i915: Preserve the DDI_A_4_LANES bit from the bios Stéphane Marchesin
2013-07-12 22:19 ` Paulo Zanoni
2013-07-12 22:50 ` Paulo Zanoni
2013-07-13 8:47 ` Daniel Vetter
-- strict thread matches above, loose matches on Subject: below --
2013-07-12 20:03 Stéphane Marchesin
2013-07-12 20:07 ` Jesse Barnes
2013-07-12 20:08 ` Daniel Vetter
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