* [PATCH 1/2] drm: dp helper: Add DP test sink CRC definition.
@ 2014-01-14 18:21 Rodrigo Vivi
2014-01-14 18:21 ` [PATCH 2/2] drm/i915: debugs: Add support for probing DP sink CRC Rodrigo Vivi
2014-01-25 20:20 ` [Intel-gfx] [PATCH 1/2] drm: dp helper: Add DP test sink CRC definition Daniel Vetter
0 siblings, 2 replies; 12+ messages in thread
From: Rodrigo Vivi @ 2014-01-14 18:21 UTC (permalink / raw)
To: intel-gfx; +Cc: dri-devel
This address will be used to verify panel CRC for test and
validation purposes.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
---
include/drm/drm_dp_helper.h | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 1d09050..ba0b90d 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -279,11 +279,21 @@
#define DP_TEST_PATTERN 0x221
+#define DP_TEST_CRC_R_CR 0x240
+#define DP_TEST_CRC_G_Y 0x242
+#define DP_TEST_CRC_B_CB 0x244
+
+#define DP_TEST_SINK_MISC 0x246
+#define DP_TEST_CRC_SUPPORTED (1 << 5)
+
#define DP_TEST_RESPONSE 0x260
# define DP_TEST_ACK (1 << 0)
# define DP_TEST_NAK (1 << 1)
# define DP_TEST_EDID_CHECKSUM_WRITE (1 << 2)
+#define DP_TEST_SINK 0x270
+#define DP_TEST_SINK_START (1 << 0)
+
#define DP_SOURCE_OUI 0x300
#define DP_SINK_OUI 0x400
#define DP_BRANCH_OUI 0x500
--
1.8.3.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 2/2] drm/i915: debugs: Add support for probing DP sink CRC.
2014-01-14 18:21 [PATCH 1/2] drm: dp helper: Add DP test sink CRC definition Rodrigo Vivi
@ 2014-01-14 18:21 ` Rodrigo Vivi
2014-01-16 17:55 ` [Intel-gfx] " Damien Lespiau
2014-01-25 20:20 ` [Intel-gfx] [PATCH 1/2] drm: dp helper: Add DP test sink CRC definition Daniel Vetter
1 sibling, 1 reply; 12+ messages in thread
From: Rodrigo Vivi @ 2014-01-14 18:21 UTC (permalink / raw)
To: intel-gfx; +Cc: dri-devel, Daniel Vetter
This debugfs interface will allow intel-gpu-tools test case
to verify if screen has been updated properly on cases like PSR.
v2: Accepted all Daniel's suggestions:
* grab modeset lock
* loop over connector and check DPMS on
* return errors
* use _eDP1 suffix for easy future extension
* don't cache crc_supported neither latest crc
* return crc as a full array and read it at once with aux.
* use 0 to turn TEST_SINK off.
* split the drm_helpers definitions in another patch.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
---
drivers/gpu/drm/i915/i915_debugfs.c | 40 +++++++++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_dp.c | 30 ++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_drv.h | 1 +
3 files changed, 71 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 75a489e..36424ca 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1876,6 +1876,45 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
return 0;
}
+static int i915_sink_crc(struct seq_file *m, void *data)
+{
+ struct drm_info_node *node = m->private;
+ struct drm_device *dev = node->minor->dev;
+ struct intel_encoder *encoder;
+ struct intel_connector *connector;
+ struct intel_dp *intel_dp = NULL;
+ int ret;
+ u8 crc[6];
+
+ drm_modeset_lock_all(dev);
+ list_for_each_entry(connector, &dev->mode_config.connector_list,
+ base.head) {
+
+ if (connector->base.dpms != DRM_MODE_DPMS_ON)
+ continue;
+
+ encoder = to_intel_encoder(connector->base.encoder);
+ if (encoder->type != INTEL_OUTPUT_EDP)
+ continue;
+
+ intel_dp = enc_to_intel_dp(&encoder->base);
+
+ ret = intel_dp_sink_crc(intel_dp, crc);
+ if (ret) {
+ drm_modeset_unlock_all(dev);
+ return ret;
+ }
+
+ seq_printf(m, "%02hx%02hx%02hx%02hx%02hx%02hx\n",
+ crc[0], crc[1], crc[2],
+ crc[3], crc[4], crc[5]);
+ drm_modeset_unlock_all(dev);
+ return 0;
+ }
+ drm_modeset_unlock_all(dev);
+ return -EAGAIN;
+}
+
static int i915_energy_uJ(struct seq_file *m, void *data)
{
struct drm_info_node *node = m->private;
@@ -3232,6 +3271,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
{"i915_dpio", i915_dpio_info, 0},
{"i915_llc", i915_llc, 0},
{"i915_edp_psr_status", i915_edp_psr_status, 0},
+ {"i915_sink_crc_eDP1", i915_sink_crc, 0},
{"i915_energy_uJ", i915_energy_uJ, 0},
{"i915_pc8_status", i915_pc8_status, 0},
{"i915_power_domain_info", i915_power_domain_info, 0},
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 7df5085..deedcf2 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2846,6 +2846,36 @@ intel_dp_probe_oui(struct intel_dp *intel_dp)
ironlake_edp_panel_vdd_off(intel_dp, false);
}
+int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc)
+{
+ struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
+ struct drm_device *dev = intel_dig_port->base.base.dev;
+ struct intel_crtc *intel_crtc =
+ to_intel_crtc(intel_dig_port->base.base.crtc);
+ u8 buf[1];
+
+ if (!intel_dp_aux_native_read_retry(intel_dp, DP_TEST_SINK_MISC, buf,
+ 1))
+ return -EAGAIN;
+
+ if (!buf[0] & DP_TEST_CRC_SUPPORTED)
+ return -ENOTTY;
+
+ if (!intel_dp_aux_native_write_1(intel_dp, DP_TEST_SINK,
+ DP_TEST_SINK_START))
+ return -EAGAIN;
+
+ /* Wait 2 vblanks to be sure we will have the correct CRC value */
+ intel_wait_for_vblank(dev, intel_crtc->pipe);
+ intel_wait_for_vblank(dev, intel_crtc->pipe);
+
+ if (!intel_dp_aux_native_read_retry(intel_dp, DP_TEST_CRC_R_CR, crc, 6))
+ return -EAGAIN;
+
+ intel_dp_aux_native_write_1(intel_dp, DP_TEST_SINK, 0);
+ return 0;
+}
+
static bool
intel_dp_get_sink_irq(struct intel_dp *intel_dp, u8 *sink_irq_vector)
{
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 46aea6c..fe7afe7 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -719,6 +719,7 @@ void intel_dp_stop_link_train(struct intel_dp *intel_dp);
void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode);
void intel_dp_encoder_destroy(struct drm_encoder *encoder);
void intel_dp_check_link_status(struct intel_dp *intel_dp);
+int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc);
bool intel_dp_compute_config(struct intel_encoder *encoder,
struct intel_crtc_config *pipe_config);
bool intel_dp_is_edp(struct drm_device *dev, enum port port);
--
1.8.3.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915: debugs: Add support for probing DP sink CRC.
2014-01-14 18:21 ` [PATCH 2/2] drm/i915: debugs: Add support for probing DP sink CRC Rodrigo Vivi
@ 2014-01-16 17:55 ` Damien Lespiau
2014-01-16 18:09 ` Damien Lespiau
2014-01-23 18:15 ` [PATCH] drm/i915: debugfs: " Rodrigo Vivi
0 siblings, 2 replies; 12+ messages in thread
From: Damien Lespiau @ 2014-01-16 17:55 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: Daniel Vetter, intel-gfx, dri-devel
On Tue, Jan 14, 2014 at 04:21:50PM -0200, Rodrigo Vivi wrote:
> This debugfs interface will allow intel-gpu-tools test case
> to verify if screen has been updated properly on cases like PSR.
>
> v2: Accepted all Daniel's suggestions:
> * grab modeset lock
> * loop over connector and check DPMS on
> * return errors
> * use _eDP1 suffix for easy future extension
> * don't cache crc_supported neither latest crc
> * return crc as a full array and read it at once with aux.
> * use 0 to turn TEST_SINK off.
> * split the drm_helpers definitions in another patch.
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 40 +++++++++++++++++++++++++++++++++++++
> drivers/gpu/drm/i915/intel_dp.c | 30 ++++++++++++++++++++++++++++
> drivers/gpu/drm/i915/intel_drv.h | 1 +
> 3 files changed, 71 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 75a489e..36424ca 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1876,6 +1876,45 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
> return 0;
> }
>
> +static int i915_sink_crc(struct seq_file *m, void *data)
> +{
> + struct drm_info_node *node = m->private;
> + struct drm_device *dev = node->minor->dev;
> + struct intel_encoder *encoder;
> + struct intel_connector *connector;
> + struct intel_dp *intel_dp = NULL;
> + int ret;
> + u8 crc[6];
> +
> + drm_modeset_lock_all(dev);
> + list_for_each_entry(connector, &dev->mode_config.connector_list,
> + base.head) {
> +
> + if (connector->base.dpms != DRM_MODE_DPMS_ON)
> + continue;
> +
> + encoder = to_intel_encoder(connector->base.encoder);
> + if (encoder->type != INTEL_OUTPUT_EDP)
> + continue;
> +
> + intel_dp = enc_to_intel_dp(&encoder->base);
> +
> + ret = intel_dp_sink_crc(intel_dp, crc);
> + if (ret) {
> + drm_modeset_unlock_all(dev);
> + return ret;
> + }
> +
> + seq_printf(m, "%02hx%02hx%02hx%02hx%02hx%02hx\n",
> + crc[0], crc[1], crc[2],
> + crc[3], crc[4], crc[5]);
Isn't the h modifiers for shorts? also the h or hh modifiers are not
really useful, shorts and chars are promoted to ints in varargs
functions anyway.
> + drm_modeset_unlock_all(dev);
> + return 0;
> + }
> + drm_modeset_unlock_all(dev);
> + return -EAGAIN;
EAGAIN has the meaning of "no data available yet, try again later".
Maybe an -ENODEV would be more appropriate in that case (no eDP device).
> +}
> +
> static int i915_energy_uJ(struct seq_file *m, void *data)
> {
> struct drm_info_node *node = m->private;
> @@ -3232,6 +3271,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
> {"i915_dpio", i915_dpio_info, 0},
> {"i915_llc", i915_llc, 0},
> {"i915_edp_psr_status", i915_edp_psr_status, 0},
> + {"i915_sink_crc_eDP1", i915_sink_crc, 0},
> {"i915_energy_uJ", i915_energy_uJ, 0},
> {"i915_pc8_status", i915_pc8_status, 0},
> {"i915_power_domain_info", i915_power_domain_info, 0},
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 7df5085..deedcf2 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -2846,6 +2846,36 @@ intel_dp_probe_oui(struct intel_dp *intel_dp)
> ironlake_edp_panel_vdd_off(intel_dp, false);
> }
>
> +int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc)
> +{
> + struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> + struct drm_device *dev = intel_dig_port->base.base.dev;
> + struct intel_crtc *intel_crtc =
> + to_intel_crtc(intel_dig_port->base.base.crtc);
> + u8 buf[1];
> +
> + if (!intel_dp_aux_native_read_retry(intel_dp, DP_TEST_SINK_MISC, buf,
> + 1))
> + return -EAGAIN;
> +
> + if (!buf[0] & DP_TEST_CRC_SUPPORTED)
> + return -ENOTTY;
> +
> + if (!intel_dp_aux_native_write_1(intel_dp, DP_TEST_SINK,
> + DP_TEST_SINK_START))
> + return -EAGAIN;
> +
> + /* Wait 2 vblanks to be sure we will have the correct CRC value */
> + intel_wait_for_vblank(dev, intel_crtc->pipe);
> + intel_wait_for_vblank(dev, intel_crtc->pipe);
I think there's a better way to do this. There's a TEST_CRC_COUNT in
TEST_SINK_MISC that is incremented everytime the CRCs are updated. You
could:
* start by grabbing TEST_CRC_COUNT
* have a loop that waits for a vblank, check if the TEST_CRC_COUNT has
changed
* return the new CRC if the update has occured
* or give up after a number of waits (say 10)
> +
> + if (!intel_dp_aux_native_read_retry(intel_dp, DP_TEST_CRC_R_CR, crc, 6))
> + return -EAGAIN;
> +
> + intel_dp_aux_native_write_1(intel_dp, DP_TEST_SINK, 0);
> + return 0;
> +}
> +
> static bool
> intel_dp_get_sink_irq(struct intel_dp *intel_dp, u8 *sink_irq_vector)
> {
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 46aea6c..fe7afe7 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -719,6 +719,7 @@ void intel_dp_stop_link_train(struct intel_dp *intel_dp);
> void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode);
> void intel_dp_encoder_destroy(struct drm_encoder *encoder);
> void intel_dp_check_link_status(struct intel_dp *intel_dp);
> +int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc);
> bool intel_dp_compute_config(struct intel_encoder *encoder,
> struct intel_crtc_config *pipe_config);
> bool intel_dp_is_edp(struct drm_device *dev, enum port port);
> --
> 1.8.3.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915: debugs: Add support for probing DP sink CRC.
2014-01-16 17:55 ` [Intel-gfx] " Damien Lespiau
@ 2014-01-16 18:09 ` Damien Lespiau
2014-01-23 18:15 ` [PATCH] drm/i915: debugfs: " Rodrigo Vivi
1 sibling, 0 replies; 12+ messages in thread
From: Damien Lespiau @ 2014-01-16 18:09 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: Daniel Vetter, intel-gfx, dri-devel
On Thu, Jan 16, 2014 at 05:55:06PM +0000, Damien Lespiau wrote:
> > + /* Wait 2 vblanks to be sure we will have the correct CRC value */
> > + intel_wait_for_vblank(dev, intel_crtc->pipe);
> > + intel_wait_for_vblank(dev, intel_crtc->pipe);
>
> I think there's a better way to do this. There's a TEST_CRC_COUNT in
> TEST_SINK_MISC that is incremented everytime the CRCs are updated. You
> could:
> * start by grabbing TEST_CRC_COUNT
> * have a loop that waits for a vblank, check if the TEST_CRC_COUNT has
> changed
> * return the new CRC if the update has occured
> * or give up after a number of waits (say 10)
There seem to be support for an interrupt to come from the device to
signal the CRCs are ready (AUTOMATED_TEST_REQUEST of
DEVICE_SERVICE_IRQ_VECTOR), but that's pushing it :)
--
Damien
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH] drm/i915: debugfs: Add support for probing DP sink CRC.
2014-01-16 17:55 ` [Intel-gfx] " Damien Lespiau
2014-01-16 18:09 ` Damien Lespiau
@ 2014-01-23 18:15 ` Rodrigo Vivi
2014-01-24 10:10 ` Jani Nikula
1 sibling, 1 reply; 12+ messages in thread
From: Rodrigo Vivi @ 2014-01-23 18:15 UTC (permalink / raw)
To: intel-gfx; +Cc: Daniel Vetter
This debugfs interface will allow intel-gpu-tools test case
to verify if screen has been updated properly on cases like PSR.
v2: Accepted all Daniel's suggestions:
* grab modeset lock
* loop over connector and check DPMS on
* return errors
* use _eDP1 suffix for easy future extension
* don't cache crc_supported neither latest crc
* return crc as a full array and read it at once with aux.
* use 0 to turn TEST_SINK off.
* split the drm_helpers definitions in another patch.
v3: Accepted 2 Damien's suggestion: remove h from printf hexa
and return ENODEV when eDP not present instead of EAGAIN.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
---
drivers/gpu/drm/i915/i915_debugfs.c | 40 +++++++++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_dp.c | 30 ++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_drv.h | 1 +
3 files changed, 71 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 74866bf..a1d29d1 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1922,6 +1922,45 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
return 0;
}
+static int i915_sink_crc(struct seq_file *m, void *data)
+{
+ struct drm_info_node *node = m->private;
+ struct drm_device *dev = node->minor->dev;
+ struct intel_encoder *encoder;
+ struct intel_connector *connector;
+ struct intel_dp *intel_dp = NULL;
+ int ret;
+ u8 crc[6];
+
+ drm_modeset_lock_all(dev);
+ list_for_each_entry(connector, &dev->mode_config.connector_list,
+ base.head) {
+
+ if (connector->base.dpms != DRM_MODE_DPMS_ON)
+ continue;
+
+ encoder = to_intel_encoder(connector->base.encoder);
+ if (encoder->type != INTEL_OUTPUT_EDP)
+ continue;
+
+ intel_dp = enc_to_intel_dp(&encoder->base);
+
+ ret = intel_dp_sink_crc(intel_dp, crc);
+ if (ret) {
+ drm_modeset_unlock_all(dev);
+ return ret;
+ }
+
+ seq_printf(m, "%02x%02x%02x%02x%02x%02x\n",
+ crc[0], crc[1], crc[2],
+ crc[3], crc[4], crc[5]);
+ drm_modeset_unlock_all(dev);
+ return 0;
+ }
+ drm_modeset_unlock_all(dev);
+ return -ENODEV;
+}
+
static int i915_energy_uJ(struct seq_file *m, void *data)
{
struct drm_info_node *node = m->private;
@@ -3278,6 +3317,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
{"i915_dpio", i915_dpio_info, 0},
{"i915_llc", i915_llc, 0},
{"i915_edp_psr_status", i915_edp_psr_status, 0},
+ {"i915_sink_crc_eDP1", i915_sink_crc, 0},
{"i915_energy_uJ", i915_energy_uJ, 0},
{"i915_pc8_status", i915_pc8_status, 0},
{"i915_power_domain_info", i915_power_domain_info, 0},
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 7df5085..dc646ac 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2846,6 +2846,36 @@ intel_dp_probe_oui(struct intel_dp *intel_dp)
ironlake_edp_panel_vdd_off(intel_dp, false);
}
+int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc)
+{
+ struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
+ struct drm_device *dev = intel_dig_port->base.base.dev;
+ struct intel_crtc *intel_crtc =
+ to_intel_crtc(intel_dig_port->base.base.crtc);
+ u8 buf[1];
+
+ if (!intel_dp_aux_native_read_retry(intel_dp, DP_TEST_SINK_MISC, buf,
+ 1))
+ return -EAGAIN;
+
+ if (!(buf[0] & DP_TEST_CRC_SUPPORTED))
+ return -ENOTTY;
+
+ if (!intel_dp_aux_native_write_1(intel_dp, DP_TEST_SINK,
+ DP_TEST_SINK_START))
+ return -EAGAIN;
+
+ /* Wait 2 vblanks to be sure we will have the correct CRC value */
+ intel_wait_for_vblank(dev, intel_crtc->pipe);
+ intel_wait_for_vblank(dev, intel_crtc->pipe);
+
+ if (!intel_dp_aux_native_read_retry(intel_dp, DP_TEST_CRC_R_CR, crc, 6))
+ return -EAGAIN;
+
+ intel_dp_aux_native_write_1(intel_dp, DP_TEST_SINK, 0);
+ return 0;
+}
+
static bool
intel_dp_get_sink_irq(struct intel_dp *intel_dp, u8 *sink_irq_vector)
{
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 9841f78..b19a43d 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -723,6 +723,7 @@ void intel_dp_stop_link_train(struct intel_dp *intel_dp);
void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode);
void intel_dp_encoder_destroy(struct drm_encoder *encoder);
void intel_dp_check_link_status(struct intel_dp *intel_dp);
+int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc);
bool intel_dp_compute_config(struct intel_encoder *encoder,
struct intel_crtc_config *pipe_config);
bool intel_dp_is_edp(struct drm_device *dev, enum port port);
--
1.8.1.2
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH] drm/i915: debugfs: Add support for probing DP sink CRC.
2014-01-23 18:15 ` [PATCH] drm/i915: debugfs: " Rodrigo Vivi
@ 2014-01-24 10:10 ` Jani Nikula
2014-01-24 12:05 ` Rodrigo Vivi
0 siblings, 1 reply; 12+ messages in thread
From: Jani Nikula @ 2014-01-24 10:10 UTC (permalink / raw)
To: Rodrigo Vivi, intel-gfx; +Cc: Daniel Vetter
On Thu, 23 Jan 2014, Rodrigo Vivi <rodrigo.vivi@gmail.com> wrote:
> This debugfs interface will allow intel-gpu-tools test case
> to verify if screen has been updated properly on cases like PSR.
>
> v2: Accepted all Daniel's suggestions:
> * grab modeset lock
> * loop over connector and check DPMS on
> * return errors
> * use _eDP1 suffix for easy future extension
> * don't cache crc_supported neither latest crc
> * return crc as a full array and read it at once with aux.
> * use 0 to turn TEST_SINK off.
> * split the drm_helpers definitions in another patch.
>
> v3: Accepted 2 Damien's suggestion: remove h from printf hexa
> and return ENODEV when eDP not present instead of EAGAIN.
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 40 +++++++++++++++++++++++++++++++++++++
> drivers/gpu/drm/i915/intel_dp.c | 30 ++++++++++++++++++++++++++++
> drivers/gpu/drm/i915/intel_drv.h | 1 +
> 3 files changed, 71 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 74866bf..a1d29d1 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1922,6 +1922,45 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
> return 0;
> }
>
> +static int i915_sink_crc(struct seq_file *m, void *data)
> +{
> + struct drm_info_node *node = m->private;
> + struct drm_device *dev = node->minor->dev;
> + struct intel_encoder *encoder;
> + struct intel_connector *connector;
> + struct intel_dp *intel_dp = NULL;
> + int ret;
> + u8 crc[6];
> +
> + drm_modeset_lock_all(dev);
> + list_for_each_entry(connector, &dev->mode_config.connector_list,
> + base.head) {
> +
> + if (connector->base.dpms != DRM_MODE_DPMS_ON)
> + continue;
> +
> + encoder = to_intel_encoder(connector->base.encoder);
> + if (encoder->type != INTEL_OUTPUT_EDP)
> + continue;
> +
> + intel_dp = enc_to_intel_dp(&encoder->base);
> +
> + ret = intel_dp_sink_crc(intel_dp, crc);
> + if (ret) {
> + drm_modeset_unlock_all(dev);
> + return ret;
> + }
> +
> + seq_printf(m, "%02x%02x%02x%02x%02x%02x\n",
> + crc[0], crc[1], crc[2],
> + crc[3], crc[4], crc[5]);
> + drm_modeset_unlock_all(dev);
> + return 0;
> + }
> + drm_modeset_unlock_all(dev);
> + return -ENODEV;
Hi Rodrigo, I really don't like sprinkling the drm_modeset_unlock_all()
on all paths. Please have one return path with the unlock and return
ret.
> +}
> +
> static int i915_energy_uJ(struct seq_file *m, void *data)
> {
> struct drm_info_node *node = m->private;
> @@ -3278,6 +3317,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
> {"i915_dpio", i915_dpio_info, 0},
> {"i915_llc", i915_llc, 0},
> {"i915_edp_psr_status", i915_edp_psr_status, 0},
> + {"i915_sink_crc_eDP1", i915_sink_crc, 0},
> {"i915_energy_uJ", i915_energy_uJ, 0},
> {"i915_pc8_status", i915_pc8_status, 0},
> {"i915_power_domain_info", i915_power_domain_info, 0},
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 7df5085..dc646ac 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -2846,6 +2846,36 @@ intel_dp_probe_oui(struct intel_dp *intel_dp)
> ironlake_edp_panel_vdd_off(intel_dp, false);
> }
>
> +int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc)
> +{
> + struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> + struct drm_device *dev = intel_dig_port->base.base.dev;
> + struct intel_crtc *intel_crtc =
> + to_intel_crtc(intel_dig_port->base.base.crtc);
> + u8 buf[1];
> +
> + if (!intel_dp_aux_native_read_retry(intel_dp, DP_TEST_SINK_MISC, buf,
> + 1))
The _retry variant is for when the sink might be in sleep. Is that the
case here?
> + return -EAGAIN;
> +
> + if (!(buf[0] & DP_TEST_CRC_SUPPORTED))
> + return -ENOTTY;
> +
> + if (!intel_dp_aux_native_write_1(intel_dp, DP_TEST_SINK,
> + DP_TEST_SINK_START))
> + return -EAGAIN;
> +
> + /* Wait 2 vblanks to be sure we will have the correct CRC value */
> + intel_wait_for_vblank(dev, intel_crtc->pipe);
> + intel_wait_for_vblank(dev, intel_crtc->pipe);
> +
> + if (!intel_dp_aux_native_read_retry(intel_dp, DP_TEST_CRC_R_CR, crc, 6))
> + return -EAGAIN;
_retry variant is definitely not needed here.
I wonder whether we should try to end test mode in the failure path.
BR,
Jani.
> +
> + intel_dp_aux_native_write_1(intel_dp, DP_TEST_SINK, 0);
> + return 0;
> +}
> +
> static bool
> intel_dp_get_sink_irq(struct intel_dp *intel_dp, u8 *sink_irq_vector)
> {
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 9841f78..b19a43d 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -723,6 +723,7 @@ void intel_dp_stop_link_train(struct intel_dp *intel_dp);
> void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode);
> void intel_dp_encoder_destroy(struct drm_encoder *encoder);
> void intel_dp_check_link_status(struct intel_dp *intel_dp);
> +int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc);
> bool intel_dp_compute_config(struct intel_encoder *encoder,
> struct intel_crtc_config *pipe_config);
> bool intel_dp_is_edp(struct drm_device *dev, enum port port);
> --
> 1.8.1.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH] drm/i915: debugfs: Add support for probing DP sink CRC.
2014-01-24 10:10 ` Jani Nikula
@ 2014-01-24 12:05 ` Rodrigo Vivi
2014-01-24 12:40 ` Damien Lespiau
0 siblings, 1 reply; 12+ messages in thread
From: Rodrigo Vivi @ 2014-01-24 12:05 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula, Daniel Vetter
This debugfs interface will allow intel-gpu-tools test case
to verify if screen has been updated properly on cases like PSR.
v2: Accepted all Daniel's suggestions:
* grab modeset lock
* loop over connector and check DPMS on
* return errors
* use _eDP1 suffix for easy future extension
* don't cache crc_supported neither latest crc
* return crc as a full array and read it at once with aux.
* use 0 to turn TEST_SINK off.
* split the drm_helpers definitions in another patch.
v3: Accepted 2 Damien's suggestion: remove h from printf hexa
and return ENODEV when eDP not present instead of EAGAIN.
v4: Accepted 2 Jani' s suggestion: 1 path for unlock and remove
_retry from aux read.
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 39 +++++++++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_dp.c | 29 +++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_drv.h | 1 +
3 files changed, 69 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 74866bf..5f9dba9 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1922,6 +1922,44 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
return 0;
}
+static int i915_sink_crc(struct seq_file *m, void *data)
+{
+ struct drm_info_node *node = m->private;
+ struct drm_device *dev = node->minor->dev;
+ struct intel_encoder *encoder;
+ struct intel_connector *connector;
+ struct intel_dp *intel_dp = NULL;
+ int ret;
+ u8 crc[6];
+
+ drm_modeset_lock_all(dev);
+ list_for_each_entry(connector, &dev->mode_config.connector_list,
+ base.head) {
+
+ if (connector->base.dpms != DRM_MODE_DPMS_ON)
+ continue;
+
+ encoder = to_intel_encoder(connector->base.encoder);
+ if (encoder->type != INTEL_OUTPUT_EDP)
+ continue;
+
+ intel_dp = enc_to_intel_dp(&encoder->base);
+
+ ret = intel_dp_sink_crc(intel_dp, crc);
+ if (ret)
+ goto out;
+
+ seq_printf(m, "%02x%02x%02x%02x%02x%02x\n",
+ crc[0], crc[1], crc[2],
+ crc[3], crc[4], crc[5]);
+ goto out;
+ }
+ ret = -ENODEV;
+out:
+ drm_modeset_unlock_all(dev);
+ return ret;
+}
+
static int i915_energy_uJ(struct seq_file *m, void *data)
{
struct drm_info_node *node = m->private;
@@ -3278,6 +3316,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
{"i915_dpio", i915_dpio_info, 0},
{"i915_llc", i915_llc, 0},
{"i915_edp_psr_status", i915_edp_psr_status, 0},
+ {"i915_sink_crc_eDP1", i915_sink_crc, 0},
{"i915_energy_uJ", i915_energy_uJ, 0},
{"i915_pc8_status", i915_pc8_status, 0},
{"i915_power_domain_info", i915_power_domain_info, 0},
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 7df5085..a77a623 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2846,6 +2846,35 @@ intel_dp_probe_oui(struct intel_dp *intel_dp)
ironlake_edp_panel_vdd_off(intel_dp, false);
}
+int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc)
+{
+ struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
+ struct drm_device *dev = intel_dig_port->base.base.dev;
+ struct intel_crtc *intel_crtc =
+ to_intel_crtc(intel_dig_port->base.base.crtc);
+ u8 buf[1];
+
+ if (!intel_dp_aux_native_read(intel_dp, DP_TEST_SINK_MISC, buf, 1))
+ return -EAGAIN;
+
+ if (!(buf[0] & DP_TEST_CRC_SUPPORTED))
+ return -ENOTTY;
+
+ if (!intel_dp_aux_native_write_1(intel_dp, DP_TEST_SINK,
+ DP_TEST_SINK_START))
+ return -EAGAIN;
+
+ /* Wait 2 vblanks to be sure we will have the correct CRC value */
+ intel_wait_for_vblank(dev, intel_crtc->pipe);
+ intel_wait_for_vblank(dev, intel_crtc->pipe);
+
+ if (!intel_dp_aux_native_read_retry(intel_dp, DP_TEST_CRC_R_CR, crc, 6))
+ return -EAGAIN;
+
+ intel_dp_aux_native_write_1(intel_dp, DP_TEST_SINK, 0);
+ return 0;
+}
+
static bool
intel_dp_get_sink_irq(struct intel_dp *intel_dp, u8 *sink_irq_vector)
{
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 9841f78..b19a43d 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -723,6 +723,7 @@ void intel_dp_stop_link_train(struct intel_dp *intel_dp);
void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode);
void intel_dp_encoder_destroy(struct drm_encoder *encoder);
void intel_dp_check_link_status(struct intel_dp *intel_dp);
+int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc);
bool intel_dp_compute_config(struct intel_encoder *encoder,
struct intel_crtc_config *pipe_config);
bool intel_dp_is_edp(struct drm_device *dev, enum port port);
--
1.8.1.2
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH] drm/i915: debugfs: Add support for probing DP sink CRC.
2014-01-24 12:05 ` Rodrigo Vivi
@ 2014-01-24 12:40 ` Damien Lespiau
2014-01-24 15:36 ` Rodrigo Vivi
0 siblings, 1 reply; 12+ messages in thread
From: Damien Lespiau @ 2014-01-24 12:40 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: Jani Nikula, Daniel Vetter, intel-gfx
On Fri, Jan 24, 2014 at 10:05:32AM -0200, Rodrigo Vivi wrote:
> +int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc)
> +{
> + struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> + struct drm_device *dev = intel_dig_port->base.base.dev;
> + struct intel_crtc *intel_crtc =
> + to_intel_crtc(intel_dig_port->base.base.crtc);
> + u8 buf[1];
> +
> + if (!intel_dp_aux_native_read(intel_dp, DP_TEST_SINK_MISC, buf, 1))
> + return -EAGAIN;
> +
> + if (!(buf[0] & DP_TEST_CRC_SUPPORTED))
> + return -ENOTTY;
> +
> + if (!intel_dp_aux_native_write_1(intel_dp, DP_TEST_SINK,
> + DP_TEST_SINK_START))
> + return -EAGAIN;
> +
> + /* Wait 2 vblanks to be sure we will have the correct CRC value */
> + intel_wait_for_vblank(dev, intel_crtc->pipe);
> + intel_wait_for_vblank(dev, intel_crtc->pipe);
> +
> + if (!intel_dp_aux_native_read_retry(intel_dp, DP_TEST_CRC_R_CR, crc, 6))
> + return -EAGAIN;
There's still one retry hidden here.
--
Damien
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH] drm/i915: debugfs: Add support for probing DP sink CRC.
2014-01-24 12:40 ` Damien Lespiau
@ 2014-01-24 15:36 ` Rodrigo Vivi
2014-01-24 15:43 ` Damien Lespiau
0 siblings, 1 reply; 12+ messages in thread
From: Rodrigo Vivi @ 2014-01-24 15:36 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula, Daniel Vetter
This debugfs interface will allow intel-gpu-tools test case
to verify if screen has been updated properly on cases like PSR.
v2: Accepted all Daniel's suggestions:
* grab modeset lock
* loop over connector and check DPMS on
* return errors
* use _eDP1 suffix for easy future extension
* don't cache crc_supported neither latest crc
* return crc as a full array and read it at once with aux.
* use 0 to turn TEST_SINK off.
* split the drm_helpers definitions in another patch.
v3: Accepted 2 Damien's suggestion: remove h from printf hexa
and return ENODEV when eDP not present instead of EAGAIN.
v4: Accepted 2 Jani' s suggestion: 1 path for unlock and remove
_retry from aux read.
v5: removing last missing useless _retry (by Damien)
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 39 +++++++++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_dp.c | 29 +++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_drv.h | 1 +
3 files changed, 69 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 74866bf..5f9dba9 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1922,6 +1922,44 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
return 0;
}
+static int i915_sink_crc(struct seq_file *m, void *data)
+{
+ struct drm_info_node *node = m->private;
+ struct drm_device *dev = node->minor->dev;
+ struct intel_encoder *encoder;
+ struct intel_connector *connector;
+ struct intel_dp *intel_dp = NULL;
+ int ret;
+ u8 crc[6];
+
+ drm_modeset_lock_all(dev);
+ list_for_each_entry(connector, &dev->mode_config.connector_list,
+ base.head) {
+
+ if (connector->base.dpms != DRM_MODE_DPMS_ON)
+ continue;
+
+ encoder = to_intel_encoder(connector->base.encoder);
+ if (encoder->type != INTEL_OUTPUT_EDP)
+ continue;
+
+ intel_dp = enc_to_intel_dp(&encoder->base);
+
+ ret = intel_dp_sink_crc(intel_dp, crc);
+ if (ret)
+ goto out;
+
+ seq_printf(m, "%02x%02x%02x%02x%02x%02x\n",
+ crc[0], crc[1], crc[2],
+ crc[3], crc[4], crc[5]);
+ goto out;
+ }
+ ret = -ENODEV;
+out:
+ drm_modeset_unlock_all(dev);
+ return ret;
+}
+
static int i915_energy_uJ(struct seq_file *m, void *data)
{
struct drm_info_node *node = m->private;
@@ -3278,6 +3316,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
{"i915_dpio", i915_dpio_info, 0},
{"i915_llc", i915_llc, 0},
{"i915_edp_psr_status", i915_edp_psr_status, 0},
+ {"i915_sink_crc_eDP1", i915_sink_crc, 0},
{"i915_energy_uJ", i915_energy_uJ, 0},
{"i915_pc8_status", i915_pc8_status, 0},
{"i915_power_domain_info", i915_power_domain_info, 0},
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 7df5085..34d0e81 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2846,6 +2846,35 @@ intel_dp_probe_oui(struct intel_dp *intel_dp)
ironlake_edp_panel_vdd_off(intel_dp, false);
}
+int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc)
+{
+ struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
+ struct drm_device *dev = intel_dig_port->base.base.dev;
+ struct intel_crtc *intel_crtc =
+ to_intel_crtc(intel_dig_port->base.base.crtc);
+ u8 buf[1];
+
+ if (!intel_dp_aux_native_read(intel_dp, DP_TEST_SINK_MISC, buf, 1))
+ return -EAGAIN;
+
+ if (!(buf[0] & DP_TEST_CRC_SUPPORTED))
+ return -ENOTTY;
+
+ if (!intel_dp_aux_native_write_1(intel_dp, DP_TEST_SINK,
+ DP_TEST_SINK_START))
+ return -EAGAIN;
+
+ /* Wait 2 vblanks to be sure we will have the correct CRC value */
+ intel_wait_for_vblank(dev, intel_crtc->pipe);
+ intel_wait_for_vblank(dev, intel_crtc->pipe);
+
+ if (!intel_dp_aux_native_read(intel_dp, DP_TEST_CRC_R_CR, crc, 6))
+ return -EAGAIN;
+
+ intel_dp_aux_native_write_1(intel_dp, DP_TEST_SINK, 0);
+ return 0;
+}
+
static bool
intel_dp_get_sink_irq(struct intel_dp *intel_dp, u8 *sink_irq_vector)
{
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 9841f78..b19a43d 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -723,6 +723,7 @@ void intel_dp_stop_link_train(struct intel_dp *intel_dp);
void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode);
void intel_dp_encoder_destroy(struct drm_encoder *encoder);
void intel_dp_check_link_status(struct intel_dp *intel_dp);
+int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc);
bool intel_dp_compute_config(struct intel_encoder *encoder,
struct intel_crtc_config *pipe_config);
bool intel_dp_is_edp(struct drm_device *dev, enum port port);
--
1.8.1.2
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH] drm/i915: debugfs: Add support for probing DP sink CRC.
2014-01-24 15:36 ` Rodrigo Vivi
@ 2014-01-24 15:43 ` Damien Lespiau
2014-01-25 19:11 ` Daniel Vetter
0 siblings, 1 reply; 12+ messages in thread
From: Damien Lespiau @ 2014-01-24 15:43 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: Jani Nikula, Daniel Vetter, intel-gfx
On Fri, Jan 24, 2014 at 01:36:17PM -0200, Rodrigo Vivi wrote:
> This debugfs interface will allow intel-gpu-tools test case
> to verify if screen has been updated properly on cases like PSR.
>
> v2: Accepted all Daniel's suggestions:
> * grab modeset lock
> * loop over connector and check DPMS on
> * return errors
> * use _eDP1 suffix for easy future extension
> * don't cache crc_supported neither latest crc
> * return crc as a full array and read it at once with aux.
> * use 0 to turn TEST_SINK off.
> * split the drm_helpers definitions in another patch.
>
> v3: Accepted 2 Damien's suggestion: remove h from printf hexa
> and return ENODEV when eDP not present instead of EAGAIN.
>
> v4: Accepted 2 Jani' s suggestion: 1 path for unlock and remove
> _retry from aux read.
>
> v5: removing last missing useless _retry (by Damien)
>
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> Cc: Damien Lespiau <damien.lespiau@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
--
Damien
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH] drm/i915: debugfs: Add support for probing DP sink CRC.
2014-01-24 15:43 ` Damien Lespiau
@ 2014-01-25 19:11 ` Daniel Vetter
0 siblings, 0 replies; 12+ messages in thread
From: Daniel Vetter @ 2014-01-25 19:11 UTC (permalink / raw)
To: Damien Lespiau; +Cc: Jani Nikula, intel-gfx, Daniel Vetter
On Fri, Jan 24, 2014 at 03:43:58PM +0000, Damien Lespiau wrote:
> On Fri, Jan 24, 2014 at 01:36:17PM -0200, Rodrigo Vivi wrote:
> > This debugfs interface will allow intel-gpu-tools test case
> > to verify if screen has been updated properly on cases like PSR.
> >
> > v2: Accepted all Daniel's suggestions:
> > * grab modeset lock
> > * loop over connector and check DPMS on
> > * return errors
> > * use _eDP1 suffix for easy future extension
> > * don't cache crc_supported neither latest crc
> > * return crc as a full array and read it at once with aux.
> > * use 0 to turn TEST_SINK off.
> > * split the drm_helpers definitions in another patch.
> >
> > v3: Accepted 2 Damien's suggestion: remove h from printf hexa
> > and return ENODEV when eDP not present instead of EAGAIN.
> >
> > v4: Accepted 2 Jani' s suggestion: 1 path for unlock and remove
> > _retry from aux read.
> >
> > v5: removing last missing useless _retry (by Damien)
> >
> > Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> > Cc: Damien Lespiau <damien.lespiau@intel.com>
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
>
>
> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Queued for -next, thanks for the patch.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm: dp helper: Add DP test sink CRC definition.
2014-01-14 18:21 [PATCH 1/2] drm: dp helper: Add DP test sink CRC definition Rodrigo Vivi
2014-01-14 18:21 ` [PATCH 2/2] drm/i915: debugs: Add support for probing DP sink CRC Rodrigo Vivi
@ 2014-01-25 20:20 ` Daniel Vetter
1 sibling, 0 replies; 12+ messages in thread
From: Daniel Vetter @ 2014-01-25 20:20 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx, dri-devel
On Tue, Jan 14, 2014 at 04:21:49PM -0200, Rodrigo Vivi wrote:
> This address will be used to verify panel CRC for test and
> validation purposes.
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
checkpatch noticed some whitespace fail in here (spaces before tabs). I've
fixed it up.
-Daniel
> ---
> include/drm/drm_dp_helper.h | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index 1d09050..ba0b90d 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -279,11 +279,21 @@
>
> #define DP_TEST_PATTERN 0x221
>
> +#define DP_TEST_CRC_R_CR 0x240
> +#define DP_TEST_CRC_G_Y 0x242
> +#define DP_TEST_CRC_B_CB 0x244
> +
> +#define DP_TEST_SINK_MISC 0x246
> +#define DP_TEST_CRC_SUPPORTED (1 << 5)
> +
> #define DP_TEST_RESPONSE 0x260
> # define DP_TEST_ACK (1 << 0)
> # define DP_TEST_NAK (1 << 1)
> # define DP_TEST_EDID_CHECKSUM_WRITE (1 << 2)
>
> +#define DP_TEST_SINK 0x270
> +#define DP_TEST_SINK_START (1 << 0)
> +
> #define DP_SOURCE_OUI 0x300
> #define DP_SINK_OUI 0x400
> #define DP_BRANCH_OUI 0x500
> --
> 1.8.3.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2014-01-25 20:20 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2014-01-14 18:21 [PATCH 1/2] drm: dp helper: Add DP test sink CRC definition Rodrigo Vivi
2014-01-14 18:21 ` [PATCH 2/2] drm/i915: debugs: Add support for probing DP sink CRC Rodrigo Vivi
2014-01-16 17:55 ` [Intel-gfx] " Damien Lespiau
2014-01-16 18:09 ` Damien Lespiau
2014-01-23 18:15 ` [PATCH] drm/i915: debugfs: " Rodrigo Vivi
2014-01-24 10:10 ` Jani Nikula
2014-01-24 12:05 ` Rodrigo Vivi
2014-01-24 12:40 ` Damien Lespiau
2014-01-24 15:36 ` Rodrigo Vivi
2014-01-24 15:43 ` Damien Lespiau
2014-01-25 19:11 ` Daniel Vetter
2014-01-25 20:20 ` [Intel-gfx] [PATCH 1/2] drm: dp helper: Add DP test sink CRC definition Daniel Vetter
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